Patents by Inventor Richard Hsiao

Richard Hsiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6859347
    Abstract: A magnetic transducer including an electrically conductive shield (ECS) which is disposed between the substrate and first magnetic shield is described. The ECS is preferably embedded in an insulating undercoat layer. The ECS is preferably electrically isolated from the magnetic sensor element and is externally connected to a ground available in the disk drive through the arm electronics. Two alternative ways for connecting the ECS to a ground are described. In one embodiment which is only effective with single-ended input type arm electronics, the ECS is connected to a ground through a via to a lead pad for the read head which is connected to the ground of the arm electronics. In a second and more preferred embodiment a separate lead pad is included on the head to allow the ECS to be connected to electronic or case ground when the head is installed in the arm. The extent of the ECS should be sufficiently large to cover the read head portion of the transducer, i.e.
    Type: Grant
    Filed: January 4, 2001
    Date of Patent: February 22, 2005
    Assignee: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventors: Richard Hsiao, Klaas Berend Klaassen, Edward Hing Pong Lee, Timothy J. Moran, Vladimir Nikitin, Michael Paul Salo, Samuel Wei-San Yuan
  • Publication number: 20040264045
    Abstract: The present invention is a magnetic head having a helical induction coil and includes hard disk drive devices that utilize the magnetic head. The helical coil is fabricated around a magnetic pole yoke in a series of process steps that include a reactive ion etch (RIE) process step which is utilized to simultaneously form vertical interconnect vias and upper helical coil member trenches. Thereafter, in a single fabrication step, such as by electroplating, the vertical interconnect lines and the upper helical coil traces are created in a single fabrication step, such that they are integrally formed. The vertical interconnect lines provide an electrical connection between outer ends of previously formed lower helical coil traces and outer ends of the integrally formed upper helical coil traces, such that a helical coil is fabricated. In the preferred embodiment, the helical coil is composed of copper.
    Type: Application
    Filed: June 30, 2003
    Publication date: December 30, 2004
    Inventors: Frederick Hayes Dill, Robert Edward Fontana, Richard Hsiao, Hugo Alberto Emilio Santini
  • Publication number: 20040257701
    Abstract: A system and method are provided for manufacturing a coil structure for a magnetic head. Initially, an insulating layer is deposited with a photoresist layer deposited on the insulating layer. Moreover, a silicon dielectric layer is deposited on the photoresist layer as a hard mask. The silicon dielectric layer is then masked. A plurality of channels is subsequently formed in the silicon dielectric layer using reactive ion etching (i.e. CF4/CHF3). The silicon dielectric layer is then used as a hard mask to transfer the channel pattern in the photoresist layer using reactive ion etching with, for example, H2/N2/CH3F/C2H4 reducing chemistry. To obtain an optimal channel profile with the desired high aspect ratio, channel formation includes a first segment defining a first angle and a second segment defining a second angle. Thereafter, a conductive seed layer is deposited in the channels and the channels are filled with a conductive material to define a coil structure.
    Type: Application
    Filed: June 23, 2003
    Publication date: December 23, 2004
    Applicant: HITACHI GLOBAL STORAGE TECHNOLOGIES, INC.
    Inventors: Daniel Wayne Bedell, Richard Hsiao, James D. Jarratt, Patrick Rush Webb, Sue Siyang Zhang
  • Patent number: 6819527
    Abstract: A magnetic head having a helical induction coil. The helical coil is fabricated around a magnetic pole yoke in a series of process steps that include a reactive ion etch (RIE) process step which is utilized to simultaneously form vertical interconnect vias and upper helical coil member trenches. Thereafter, in a single fabrication step, such as by electroplating, the vertical interconnect lines and the upper helical coil traces are created in a single fabrication step, such that they are integrally formed. The vertical interconnect lines provide an electrical connection between outer ends of previously formed lower helical coil traces and outer ends of the integrally formed upper helical coil traces, such that a helical coil is fabricated. In the preferred embodiment, the helical coil is composed of copper.
    Type: Grant
    Filed: March 23, 2000
    Date of Patent: November 16, 2004
    Assignee: Hitachi Global Storage Technologies, Inc.
    Inventors: Frederick Hayes Dill, Robert Edward Fontana, Jr., Richard Hsiao, Hugo Alberto Emilio Santini
  • Patent number: 6804878
    Abstract: A method is provided of smoothing the perturbations on a surface, in particular the surface of a magnetic head slider, the method comprising several steps. At least one air-bearing surface to be smoothed is exposed to an ion species generated from a defined source to form a beam of incident radiation. The beam has a linear axis emanating from the source and thus forms an angle of incident radiation with respect to the surface to be smoothed. The at least one surface is smoothed by exposing the surface(s) to be smoothed to the beam of incident radiation, where the angle of incident radiation is less than 90° relative to a vertical axis drawn perpendicular to the surface to be smoothed. To make a corrosion resistant magnetic head slider, the method further comprises coating the smoothed surface with a layer of amorphous carbon.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: October 19, 2004
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Richard Thomas Campbell, Richard Hsiao, Yiping Hsiao, Son Van Nguyen, Thao John Pham
  • Patent number: 6795278
    Abstract: Methods and apparatus for protecting read sensors from damage caused by electrostatic discharge (ESD) during manufacturing are described. Two electrical connections are formed and utilized for ESD protection: one primarily for early protection of the sensors (i.e. prior to cutting and lapping the wafer to form the ABS) and the other primarily for later protection of the sensors (i.e. after cutting and lapping the wafer to form the ABS). The first electrical connection is created between the read sensor and the first and second shields, and is severed when the wafer is cut and lapped along the ABS. The second electrical connection is formed between the sensor leads and the first and second shields, and is exposed on an outside surface of the magnetic head. The second electrical connection is severed late in the manufacturing process, preferably by laser-deletion.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: September 21, 2004
    Assignee: International Business Machines Corporation
    Inventors: James Devereaux Jarrett, Richard Hsiao, Ciaran Avram Fox, Edward Hin Pong Lee, Thomas Robert Albrecht
  • Publication number: 20040177493
    Abstract: A Damascene process is provided for manufacturing a coil structure for a magnetic head. During the manufacturing process, an insulating layer is initially deposited after which a photoresist layer is deposited. A silicon dielectric layer is then deposited on the photoresist layer. After masking the silicon dielectric layer, at least one channel is etched in the photoresist layer and the silicon dielectric layer. Then, a conductive seed layer is deposited in the at least one channel. The at least one channel is then ready to be filled with a conductive material and chemically/mechanically polished to define a coil structure.
    Type: Application
    Filed: March 31, 2004
    Publication date: September 16, 2004
    Inventors: Richard Hsiao, Prakash Kasiraj, Quang Le, Paul Phong Nguyen, Son Van Nguyen, Denny D. Tang, Patrick Rush Webb
  • Patent number: 6785101
    Abstract: The first and second side surfaces of either a bottom spin valve sensor or a top spin valve sensor are notched so as to enable a reduction in the magnetoresistive coefficient of side portions of the sensor beyond the track width region thereby minimizing side reading by the sensor. The first and second notches of the spin valve sensor are then filled with layers in various embodiments of the invention to complete the spin valve sensor.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: August 31, 2004
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Patrick Rush Webb, Mustafa Pinarbasi, Richard Hsiao, Hardayal Singh Gill
  • Patent number: 6776917
    Abstract: The method for controlling the depth of polishing during a CMP process involves the deposition of a polishing stop layer at an appropriate point in the device fabrication process. The stop layer is comprised of a substance that is substantially more resistant to polishing with a particular polishing slurry that is utilized in the CMP process than a polishable material layer. Preferred stop layer materials of the present invention are tantalum and diamond-like carbon (DLC), and the polishable layer may consist of alumina. In one embodiment of the present invention the stop layer is deposited directly onto the top surface of components to be protected during the CMP process. A polishable layer is thereafter deposited upon the stop layer, and the CMP polishing step removes the polishable material layer down to the portions of the stop layer that are deposited upon the top surfaces of the components. The stop layer is thereafter removed from the top surface of the components.
    Type: Grant
    Filed: January 3, 2001
    Date of Patent: August 17, 2004
    Assignee: International Business Machines Corporation
    Inventors: Richard Hsiao, Son Van Nguyen, Thao Pham, Eugene Zhao
  • Patent number: 6741422
    Abstract: Following the deposition of an insulation layer, a patterned P2 pole tip seed layer is deposited. Significantly, the pole tip seed layer is not deposited beneath the induction coil area of the magnetic head. A dielectric layer is next deposited and a patterned RIE etching mask that includes both a P2 pole tip trench opening and an induction coil trench opening is fabricated upon the dielectric layer. Thereafter, in a single RIE etching step, the P2 pole tip trench is etched through the dielectric material down to the seed layer, and the induction coil trench is etched through the dielectric material down to the insulation layer. The P2 pole tip is first electroplated up into its trench, an induction coil seed layer is next deposited, and the induction coil is then electroplated up into the induction coil trench.
    Type: Grant
    Filed: June 18, 2001
    Date of Patent: May 25, 2004
    Assignee: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventors: Richard Hsiao, Hugo Alberto Emilio Santini
  • Publication number: 20040090715
    Abstract: A first read gap layer has a resistance RG1 between a first shield layer and one of the first and second lead layers of a read head and the second read gap layer has a resistance RG2 between a second shield layer and said one of the first and second lead layers of the read head. A connection is provided via a plurality of resistors between a first node and each of the first and second shield layers wherein the plurality of resistors includes at least first and second resistors RS1 and RS2 and the first node is connected to said one of the first and second lead layers. A second node is located between the first and second resistors RS1 and RS2. An operational amplifier has first and second inputs connected to the first and second nodes respectively so as to be across the first resistor RS1 and has an output connected to the first node for maintaining the first and second nodes at a common voltage potential. In a first embodiment the first and second shield layers are shorted together.
    Type: Application
    Filed: June 30, 2003
    Publication date: May 13, 2004
    Applicant: Hitachi Global Storage Technologies
    Inventors: Richard Hsiao, James D. Jarratt, Emo Hilbrand Klaassen, Ian Robson McFadyen, Timothy J. Moran
  • Publication number: 20040075938
    Abstract: A Damascene process is provided for manufacturing a coil structure for a magnetic head. During the manufacturing process, an insulating layer is initially deposited after which a photoresist layer is deposited. A silicon dielectric layer is then deposited on the photoresist layer. After masking the silicon dielectric layer, at least one channel is etched in the photoresist layer and the silicon dielectric layer. Then, a conductive seed layer is deposited in the at least one channel. The at least one channel is then ready to be filled with a conductive material and chemically/mechanically polished to define a coil structure.
    Type: Application
    Filed: November 19, 2003
    Publication date: April 22, 2004
    Applicant: HITACHI GLOBAL STORAGE TECHNOLOGIES
    Inventors: Richard Hsiao, Prakash Kasiraj, Quang Le, Paul Phong Nguyen, Son Van Nguyen, Denny D. Tang, Patrick Rush Webb
  • Patent number: 6723252
    Abstract: The present invention includes a two-step etching process for notching the P1 pole of the write head element of a magnetic head. In a first step, the preferred embodiment utilizes a combination of C2F6 and argon gases (designated as C2F6/Ar) as the etchant gas to preferentially etch portions of the alumna write gap layer. Thereafter, in the second step, argon is used as the etchant gas to preferentially etch the P1 pole material. The C2F6/Ar etchant gas preferably includes C2F6 gas in a concentration range of from 50% to 90%, with a preferred concentration range being from 70% to 80%. The etching of the alumna write gap layer is preferably conducted with a first echant ion beam angle of from 5° to 30°, and a second etchant ion beam angle of from 65° to 85°.
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: April 20, 2004
    Assignee: International Business Machines Corporation
    Inventors: Richard Hsiao, John I. Kim
  • Publication number: 20040069746
    Abstract: During manufacture, a magnetoresistive sensor having a ferromagnetic free layer is commonly provided with a tantalum cap layer. The tantalum cap layer provides protection to the sensor during manufacture and then is typically removed after performing annealing. The removal of the tantalum cap with a fluorine reactive ion etch leaves low volatility tantalum/fluorine byproducts. The present invention provides a method of using an argon/hydrogen reactive ion etch to remove the tantalum/fluorine byproducts. The resulting sensor has far less damage resulting from the presence of the fluorine byproducts.
    Type: Application
    Filed: October 15, 2002
    Publication date: April 15, 2004
    Inventors: Richard Hsiao, Wipul Pemsiri Jayasekara, Son Van Nguyen, Sue Zhang
  • Publication number: 20040070873
    Abstract: A first embodiment of the mushroom plating process of the present invention starts with an overplated component which includes an enlarged mushroom head having outer portions which overhang a resist layer. The next step in the first process embodiment is a heating step in which the resist layer is hard baked. Thereafter, using a dry etch process, such as a reactive ion etch (RIE) process, the hard baked resist layer is removed in all areas except beneath the overhang of the mushroom head. The area beneath the overhang thereby remains filled with hard baked resist. Thereafter, the device is ultimately encapsulated such that no voids and/or redeposition problems exist under the overhang due to the presence of the hard baked resist. In an alternative process embodiment of the present invention the dry etch process is conducted first upon the resist layer, such that the resist layer is removed in all areas except under the overhang.
    Type: Application
    Filed: July 9, 2003
    Publication date: April 15, 2004
    Inventors: Thomas Edward Dinan, Richard Hsiao, John I. Kim, Ashok Lahiri, Clinton David Snyder
  • Publication number: 20040070875
    Abstract: Following the deposition of an insulation layer, a patterned P2 pole tip seed layer is deposited. Significantly, the pole tip seed layer is not deposited beneath the induction coil area of the magnetic head. A dielectric layer is next deposited and a patterned RIE etching mask that includes both a P2 pole tip trench opening and an induction coil trench opening is fabricated upon the dielectric layer. Thereafter, in a single RIE etching step, the P2 pole tip trench is etched through the dielectric material down to the seed layer, and the induction coil trench is etched through the dielectric material down to the insulation layer. The P2 pole tip is first electroplated up into its trench, an induction coil seed layer is next deposited, and the induction coil is then electroplated up into the induction coil trench.
    Type: Application
    Filed: July 31, 2003
    Publication date: April 15, 2004
    Inventors: Richard Hsiao, Hugo Alberto Emilio Santini
  • Publication number: 20040047072
    Abstract: A write element includes a first pole pedestal and a second pole pedestal opposing the first pole pedestal and defining a write gap between the first and second pole pedestals. A first layer of CoFeON is film positioned between the first pole pedestal and the write gap. A second layer of CoFeON film is positioned between the second pole pedestal and the write gap.
    Type: Application
    Filed: September 11, 2002
    Publication date: March 11, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES
    Inventors: Brian E. Brusca, Joel S. Forrest, Richard Hsiao, James D. Jarratt, Brian R. York
  • Publication number: 20040027718
    Abstract: The electroplated components of a magnetic head of the present invention are fabricated utilizing a seed layer that is susceptible to reactive ion etch removal techniques. A preferred seed layer is comprised of tungsten or titanium. Following the electroplating of the components utilizing a fluorine species reactive ion etch process the seed layer is removed, and significantly, the fluorine RIE process creates a gaseous tungsten or titanium fluoride compound removal product. The problem of seed layer redeposition along the sides of the electroplated components is overcome because the gaseous fluoride compound is not redeposited. The present invention also includes an enhanced two part seed layer, where the lower part is tungsten, titanium or tantalum and the upper part is composed of the material that constitutes the component to be electroplated.
    Type: Application
    Filed: August 1, 2003
    Publication date: February 12, 2004
    Inventors: Richard Hsiao, Neil Leslie Robertson, Patrick Rush Webb
  • Patent number: 6678127
    Abstract: A first read gap layer has a resistance RG1 between a first shield layer and one of the first and second lead layers of a read head and the second read gap layer has a resistance RG2 between a second shield layer and said one of the first and second lead layers of the read head. A connection is provided via a plurality of resistors between a first node and each of the first and second shield layers wherein the plurality of resistors includes at least first and second resistors RS1 and RS2 and the first node is connected to said one of the first and second lead layers. A second node is located between the first and second resistors RS1 and RS2. An operational amplifier has first and second inputs connected to the first and second nodes respectively so as to be across the first resistor RS1 and has an output connected to the first node for maintaining the first and second nodes at a common voltage potential. In a first embodiment the first and second shield layers are shorted together.
    Type: Grant
    Filed: January 2, 2001
    Date of Patent: January 13, 2004
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Richard Hsiao, James D. Jarratt, Emo Hilbrand Klaassen, Ian Robson McFadyen, Timothy J. Moran
  • Publication number: 20040001282
    Abstract: The magnetic head includes a P2 pole tip in which the P2 pole tip material is electroplated upon a sidewall of the P2 pole tip photolithographic trench. To accomplish this, a block of material is deposited upon a write gap layer, such that a generally straight, vertical sidewall of the block of material is disposed at the P2 pole tip location. Thereafter, an electroplating seed layer is deposited upon the sidewall. A P2 pole tip trench is photolithographically fabricated such that the sidewall (with its deposited seed layer) is exposed within the P2 pole tip trench. Thereafter, the P2 pole tip is formed by electroplating pole tip material upon the seed layer and outward from the sidewall within the trench, The width of the P2 pole tip is thus determined by the quantity of pole tip material that is deposited upon the sidewall.
    Type: Application
    Filed: June 30, 2003
    Publication date: January 1, 2004
    Inventors: Thomas Edward Dinan, Richard Hsiao