Patents by Inventor Robert M. Wallace

Robert M. Wallace has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6258637
    Abstract: A method of preparing a surface for and forming a thin film on a single-crystal silicon substrate is disclosed. One embodiment of his method comprises forming an oxidized silicon layer (which may be a native oxide) on at least one region of the substrate, and thermally annealing the substrate in a vacuum while supplying a silicon-containing flux to the oxide surface, thus removing the oxidized silicon layer. Preferably, the thin film is formed immediately after removal of the oxidized silicon layer. The silicon-containing flux is preferably insufficient to deposit a silicon-containing layer on top of the oxidized silicon layer, and yet sufficient to substantially inhibit an SiO-forming reaction between the silicon substrate and the oxidized silicon layer. The method of the invention allows for growth or deposition of films which have exceptionally smooth interfaces (less than 0.1 nm rms roughness) with the underlying silicon substrate at temperatures less than 800° C.
    Type: Grant
    Filed: December 2, 1999
    Date of Patent: July 10, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Glen D. Wilk, Yi Wei, Robert M. Wallace
  • Patent number: 6245606
    Abstract: This invention pertains generally to forming thin aluminum oxides at low temperatures, and more particularly to forming uniformly thick, aluminum gate oxides. We disclose a low temperature method for forming a thin, uniform aluminum gate oxide 16 on a silicon surface 12. This method includes providing a partially completed integrated circuit on a semiconductor substrate 10 with a clean, hydrogen terminated or atomically flat, silicon surface 12; forming a uniformly thick aluminum layer 13; and stabilizing the substrate at a first temperature. The method further includes exposing the aluminum layer to an atmosphere 14 including ozone, while maintaining the substrate 10 at the first temperature. In this method, the exposing step creates a uniformly thick, aluminum oxide film 16. This method is suitable for room temperature processing.
    Type: Grant
    Filed: October 20, 1999
    Date of Patent: June 12, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Glen D. Wilk, Robert M. Wallace
  • Publication number: 20010002709
    Abstract: A method of making a semiconductor device and the device. The device, according to a first embodiment, is fabricated by providing a silicon (111) surface, forming on the surface a dielectric layer of crystalline silicon nitride and forming an electrode layer on the dielectric layer of silicon nitride. The silicon (111) surface is cleaned and made atomically flat. The dielectric layer if formed of crystalline silicon nitride by placing the surface in an ammonia ambient at a pressure of from about 1×10−7 to about 1×10−5 Torr at a temperature of from about 850° C. to about 1000° C. The electrode layer is heavily doped silicon. According to a second embodiment, there is provided a silicon (111) surface on which is formed a first dielectric layer of crystalline silicon nitride having a thickness of about 2 monolayers.
    Type: Application
    Filed: December 27, 2000
    Publication date: June 7, 2001
    Inventors: Robert M. Wallace, Glen D. Wilk, Yi Wei, Sunil V. Hattangady
  • Patent number: 6159829
    Abstract: An enhancement of an electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure during an anneal in an atmosphere containing hydrogen gas. Device operation is enhanced by concluding this anneal step with a sudden cooling. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronics elements on the same silicon substrate.
    Type: Grant
    Filed: April 22, 1998
    Date of Patent: December 12, 2000
    Inventors: William L. Warren, Karel J. R. Vanheusden, Daniel M. Fleetwood, Roderick A. B. Devine, Leo B. Archer, George A. Brown, Robert M. Wallace
  • Patent number: 6150242
    Abstract: A method of forming a layer of crystalline silicon over silicon oxide and a resonant tunnel diode wherein there is provided a sufficiently clean (surface impurities<10.sup.13 /cm.sup.2), atomically smooth (rms roughness<3 Angstroms) crystalline silicon surface. Spaced apart regions of silicon oxide are formed on the surface sufficiently thin so that deposited silicon over the surface and silicon oxide will be capable of using the surface as a seed to form crystalline silicon with deposited silicon extending over the silicon oxide. The silicon is then deposited over the surface including the silicon oxide to provide the crystalline silicon over silicon oxide.
    Type: Grant
    Filed: March 25, 1999
    Date of Patent: November 21, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Jan Paul Van der Wagt, Glen D. Wilk, Robert M. Wallace
  • Patent number: 6143634
    Abstract: Channel-hot-carrier reliability can be improved by deuterium passivation of the gate interface. By performing high temperature steps (above 300 degrees Celsius) in a deuterium-containing ambient, harmful depletion of deuterium due to diffusion away from the gate interface is avoided.
    Type: Grant
    Filed: July 28, 1998
    Date of Patent: November 7, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Robert M. Wallace, Peijun Chen
  • Patent number: 6140243
    Abstract: An integrated circuit fabrication process in which residual fluorine contamination on metal surfaces after ashing is removed by exposure to an NH.sub.3 /O.sub.2 plasma.
    Type: Grant
    Filed: December 11, 1997
    Date of Patent: October 31, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Robert M. Wallace, Peijun Chen, S. Charles Baber, Steven A. Henck
  • Patent number: 6071751
    Abstract: Channel-hot-carrier reliability can be improved by deuterium sintering. However, the benefits obtained by deuterium sintering can be greatly reduced or destroyed by thermal processing steps which break Si--H and Si--D bonds. A solution is to increase the deuterium concentration near the interface to avoid subsequent depletion of deuterium due to diffusion. By using a rapid quench of a sintered wafer, the deuterium concentration near the interface is increased, because the rapid quench impedes the ability of the deuterium to diffuse away from the gate oxide interface.
    Type: Grant
    Filed: July 28, 1998
    Date of Patent: June 6, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Robert M. Wallace, Kenneth C. Harvey
  • Patent number: 6040230
    Abstract: An embodiment of the instant invention is a method of forming a nano-rugged silicon-containing layer, the method comprising the steps of: providing a first silicon-containing layer (steps 202 or 802); providing a patterning layer over the first silicon-containing layer (steps 204 or 804); the patterning layer comprised of an amorphous substance; providing a second silicon-containing layer (steps 206 or 808) over the patterning layer; and wherein the patterning layer creates a nano-rugged texture in the second silicon-containing layer. Preferably, the first and second silicon-containing layers are comprised of polycrystalline silicon. In an alternative embodiment, the patterning layer is comprised of a material which has small holes such that the step of providing the second silicon-containing layer utilizes the first silicon-containing layer as a seed layer through the small holes so as to form the second silicon-containing layer.
    Type: Grant
    Filed: March 13, 1998
    Date of Patent: March 21, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: John Mark Anthony, Robert M. Wallace, Yi Wei, Glen Wilk
  • Patent number: 6024801
    Abstract: A method of cleaning and treating a device, including those of the micromechanical (10) and semiconductor type. The surface of a device, such as the landing electrode (22) of a digital micromirror device (10), is first cleaned with a supercritical fluid (SCF) in a chamber (50) to remove soluble chemical compounds, and then maintained in the SCF chamber until and during the subsequent passivation step. Passivants including PFDA and PFPE are suitable for the present invention. By maintaining the device in the SCF chamber, and without exposing the device to, for instance, the ambient of a clean room, organic and inorganic contaminants cannot be deposited upon the cleaned surface prior to the passivation step. The present invention derives technical advantages by providing an improved passivated surface that is suited to extend the useful operation life of devices, including those of the micromechanical type, reducing stiction forces between contacting elements such as a mirror and its landing electrode.
    Type: Grant
    Filed: December 9, 1996
    Date of Patent: February 15, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Robert M. Wallace, Monte A. Douglas
  • Patent number: 6020243
    Abstract: A field effect semiconductor device comprising a high permittivity zirconium (or hafnium) silicon-oxynitride gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A zirconium silicon-oxynitride gate dielectric layer 36 is formed over this substrate, followed by a conductive gate 38. Zirconium silicon-oxynitride gate dielectric layer 36 has a dielectric constant is significantly higher than the dielectric constant of silicon dioxide. However, the zirconium silicon-oxynitride gate dielectric may also be designed to have the advantages of silicon dioxide, e.g. high breakdown, low interface state density, and high stability.
    Type: Grant
    Filed: July 15, 1998
    Date of Patent: February 1, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Robert M. Wallace, Richard A. Stoltz, Glen D. Wilk
  • Patent number: 6020247
    Abstract: A method of preparing a surface for and forming a thin film on a single-crystal silicon substrate is disclosed. One embodiment of his method comprises forming an oxidized silicon layer (which may be a native oxide) on at least one region of the substrate, and thermally annealing the substrate in a vacuum while supplying a silicon-containing flux to the oxide surface, thus removing the oxidized silicon layer. Preferably, the thin film is formed immediately after removal of the oxidized silicon layer. The silicon-containing flux is preferably insufficient to deposit a silicon-containing layer on top of the oxidized silicon layer, and yet sufficient to substantially inhibit an SiO-forming reaction between the silicon substrate and the oxidized silicon layer. The method of the invention allows for growth or deposition of films which have exceptionally smooth interfaces (less than 0.1 nm rms roughness) with the underlying silicon substrate at temperatures less than 800.degree. C.
    Type: Grant
    Filed: July 31, 1997
    Date of Patent: February 1, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Glen D. Wilk, Yi Wei, Robert M. Wallace
  • Patent number: 6013553
    Abstract: A field effect semiconductor device comprising a high permittivity zirconium (or hafnium) oxynitride gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A zirconium oxynitride gate dielectric layer 36 is formed over this substrate, followed by a conductive gate 38. Zirconium oxynitride gate dielectric layer 36 has a dielectric constant is significantly higher than the dielectric constant of silicon dioxide.
    Type: Grant
    Filed: July 15, 1998
    Date of Patent: January 11, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Robert M. Wallace, Richard A. Stoltz, Glen D. Wilk
  • Patent number: 5881505
    Abstract: A free-standing cremation memorial for holding cremated remains has a plurality of chambers in a vertical portion of the structure as well as a number of chambers in the base unit. A base member prefabricated of aluminum framework with at least about 10 underground chambers is provided. An upright framework supported on said base in which a large number of niches is provided. A base member, which is supported on concrete footings, is a three-dimensional framework which provides support for the upright portion of the cremation memorial, which is also prefabricated framework.
    Type: Grant
    Filed: February 7, 1997
    Date of Patent: March 16, 1999
    Inventors: Alma J. Larkin, III, Robert M. Wallace
  • Patent number: 5830532
    Abstract: A method for producing a porous film on a silicon substrate is described. The substrate 14 is placed in a vacuum chamber in the presence of oxygen at specified pressure and temperature for a period of time to form a thin oxide film 10 thereon. Then the conditions in the chamber are altered so that voids 14 of a desired dimension are formed in the oxide film 10. Alternatively, a substrate 20 is subjected to specific conditions in the vacuum chamber whereat oxide islands 22 nucleate on the surface. As the islands grow, they eventually cover most of the surface leaving voids 24 of the desired size.
    Type: Grant
    Filed: March 18, 1997
    Date of Patent: November 3, 1998
    Assignee: Texas Instruments Corporated
    Inventors: Shaoping Tang, Robert M. Wallace, Yi Wei
  • Patent number: 5689151
    Abstract: An anode plate (10) for use in a field emission flat panel display device (8) comprises a transparent substrate (26) having a plurality of spaced-apart, electrically conductive regions (28) which form the anode electrode of the display device (8). The conductive regions (28) are covered by a luminescent material (24). A getter material (29) is deposited on the substrate (26) and between the conductive regions (28) of the anode plate (10). The getter material (29) is preferably an electrically nonconductive, high porosity, and low density material, such as an aerogel or xerogel. Methods of fabricating the getter material (29) on the anode plate (10) are disclosed.
    Type: Grant
    Filed: September 28, 1995
    Date of Patent: November 18, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Robert M. Wallace, John M. Anthony, Bruce E. Gnade, Chih-Chen Cho
  • Patent number: 5614785
    Abstract: An anode plate (10) for use in a field emission flat panel display device (8) includes a transparent substrate (26) having a plurality of spaced-apart, electrically conductive regions (28) are covered by a luminescent material (24) and from the anode electrode. A getter material (29) of porous silicon is deposited on the substrate (26) between the conductive regions (28) of the anode plate (10). The getter material (29) of porous silicon is preferably electrically nonconductive, opaque, and highly porous. Included are methods of fabricating the getter material (29) on the anode plate (10).
    Type: Grant
    Filed: September 28, 1995
    Date of Patent: March 25, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Robert M. Wallace, Bruce E. Gnade, Wiley P. Kirk
  • Patent number: 5610438
    Abstract: The present invention relates to micro-mechanical devices including actuators, motors and sensors with improved operating characteristics. A micro-mechanical device (10) comprising a DMD-type spatial light modulator with a getter (100) located within the package (52). The getter (100) is preferably specific to water, larger organic molecules, various gases, or other high surface energy substances. The getter is a non-evaporable getter (NEG) to permit the use of active metal getter systems without their evaporation on package surfaces.
    Type: Grant
    Filed: March 8, 1995
    Date of Patent: March 11, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Robert M. Wallace, Douglas A. Webb
  • Patent number: 5606177
    Abstract: A resonant tunneling diode (400) made of a silicon quantum well (406) with silicon oxide tunneling barriers (404, 408). The tunneling barriers have openings (430) of size smaller than the electron wave packet spread to insure crystal alignment through the diode without affecting the tunneling barrier height, and the openings (430) have an irregular (nonperiodic) shape.
    Type: Grant
    Filed: December 6, 1994
    Date of Patent: February 25, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Robert M. Wallace, Alan C. Seabaugh
  • Patent number: 5523878
    Abstract: A method of forming of a monomolecular coating (19) for surfaces of contacting elements (11, 17) of micro-mechanical devices (10), specifically, devices that have moving elements that contact other elements and that tend to stick as a result of the contact. The method uses liquid deposition, with the device being placed in a solution that contains a precursor to the formation of the coating. The precursor is chosen based on coordination chemistry between the precursor and the surface to be coated.
    Type: Grant
    Filed: June 30, 1994
    Date of Patent: June 4, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Robert M. Wallace, Douglas A. Webb, Bruce E. Gnade