Abstract: Disclosed are techniques for flash memory management, including receiving data from a host, writing the data to a flash memory device in the order it was received from the host, and providing at least one data structure configured to locate the data written to the flash memory device.

Abstract: A method for flash memory management comprises providing a head pointer configured to define a first location in a flash memory, and a tail pointer configured to define a second location in a flash memory. The head pointer and tail pointer define a payload data area. Payload data is received from a host, and written to the flash memory in the order it was received. The head pointer and tail pointer are updated such that the payload data area moves in a circular manner within the flash memory.

Abstract: A storage system controller (302) includes a plurality of media controllers (301), a local microprocessor (306), and a host interface logic (310), operably coupled by a multi-drop parallel bus. The multi-drop parallel bus includes a control bus (324), a payload data bus (320), a real-time ready-status (data ready) signaling bus (322) and a general microprocessor bus (330). Each media controller has a storage media (311) operably coupled thereto. Each media controller includes a parameter storage (404), a media interface circuit (406), a control data state machine (408), a command sequencer state machine (410), a media-side multi-mode transfer state machine (412), a dual-port memory (402), a memory controller (420), and a host-side transfer state machine (430). The host interface logic and the media controllers are implemented in one or more Field Programmable Gate Arrays.

Abstract: A storage system controller (302) includes a plurality of media controllers (301), a local microprocessor (306), and a host interface logic (310), operably coupled by a multi-drop bus. The multi-drop bus includes a control bus (324), a payload data bus (320), a real-time ready-status (data ready) signaling bus (322) and a general microprocessor bus (330). Each media controller has a storage media (311) operably coupled thereto. Each media controller includes a parameter storage (404), a media interface circuit (406), a control data state machine (408), a command sequencer state machine (410), a media-side multi-mode transfer state machine (412), a dual-port memory (402), a memory controller (420), and a host-side transfer state machine (430). The host interface logic and the media controllers are implemented in one or more Field Programmable Gate Arrays.

Abstract: A storage system controller (302) includes a plurality of media controllers (301), a local microprocessor (306), and a host interface logic (310), operably coupled by a multi-drop parallel bus. The multi-drop parallel bus includes a control bus (324), a payload data bus (320), a real-time ready-status (data ready) signaling bus (322) and a general microprocessor bus (330). Each media controller has a storage media (311) operably coupled thereto. Each media controller includes a parameter storage (404), a media interface circuit (406), a control data state machine (408), a command sequencer state machine (410), a media-side multi-mode transfer state machine (412), a dual-port memory (402), a memory controller (420), and a host-side transfer state machine (430). The host interface logic and the media controllers are implemented in one or more Field Programmable Gate Arrays.

Abstract: An apparatus for measuring flatness of a surface includes a locator element slidingly engageable with a slider element in a first direction, and a height measuring instrument having a linear probing device is mounted to the slider element. An alignment feature is used for limiting relative motion between the sliding element and the locator element to the first direction when the slider element is engaged with the locator element. An exemplary embodiment includes a locator block having a top side and a bottom side and a slider block engageable with the locator block on the top side. An elongated aperture is disposed through the locator block and is elongated in the first direction. A mechanical dial indicator with a plunger rod projecting is mounted in the slider block and the plunger rod is positionable through the elongated aperture.

Abstract: A cable tester, which is adapted to be used by persons not expertly skilled in the technical characteristics of local area networks (LANs), is disclosed. The tester incorporates a time domain reflectometer which starts a counter upon the generation of an incident signal pulse and utilizes a comparator which compares signals present on a cable under test to a controllable amplitude to halt the timer. The tester exhibits an output impedance which is greater than the impedance of a cable being tested. The tester additionally measures instantaneous amplitude levels of signals present on the cable being tested, resistance, continuity, noise levels, and data activity on a network of which the cable is a part. In addition, the tester includes a display and a sound generally device. Software programming compensates for impedance mismatches with the cable and data present on an active network being tested.

Abstract: An apparatus and method is disclosed for cooling a molten stream of glass flowing in a firebrick hearth from an entrance end to an exit end of a glass furnace forehearth, the method comprising the steps of: cooling the bottom of the hearth which cools the molten glass by forcing air through ducts in the hearth bottom insulation; cooling each side of the hearth which cools the molten glass by forcing air through ducts along the side of the hearth.

Abstract: A combined microphone and accessory device is disclosed for operation with a transmitter radio having a microphone audio circuit and a transmitter activating circuit. The transmitter activating circuit has a first and a second terminal with a potential established therebetween for activating the transmitter radio upon conduction of a given current level between the first and second terminals. The invention comprises a microphone housing having a microphone adapted for connection to the microphone audio circuit of the transmitter radio. A microphone key switch is mounted to the microphone housing and adapted for connection to the transmitter activating circuit for conducting the given current level between the first and second terminals upon closing the microphone key switch to activate the transmitter radio. An accessory device such as an illumination device, a timer or a calculator, is mounted in the microphone housing and is powered by a rechargeable battery within the microphone housing.