Patents by Inventor Roland Rupp

Roland Rupp has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220293558
    Abstract: A method for forming semiconductor devices includes: attaching a glass structure to a wide band-gap semiconductor wafer having a plurality of semiconductor devices; forming at least one pad structure electrically connected to at least one doping region of a semiconductor substrate of the wide band-gap semiconductor wafer, by forming electrically conductive material within at least one opening extending through the glass structure; and reducing a thickness of the wide band-gap semiconductor wafer after attaching the glass structure. Additional methods for forming semiconductor devices are described.
    Type: Application
    Filed: June 1, 2022
    Publication date: September 15, 2022
    Inventors: Roland Rupp, Alexander Breymesser, Andre Brockmeier, Carsten von Koblinski, Francisco Javier Santos Rodriguez, Ronny Kern
  • Publication number: 20220285283
    Abstract: A power semiconductor device includes a semiconductor substrate having a wide bandgap semiconductor material and a first surface, an insulation layer above the first surface of the semiconductor substrate, the insulation layer including at least one opening extending through the insulation layer in a vertical direction, a front metallization above the insulation layer with the insulation layer being interposed between the front metallization and the first surface of the semiconductor substrate, and a metal connection arranged in the opening of the insulation layer and electrically conductively connecting the front metallization with the semiconductor substrate; wherein the front metallization includes at least one layer that is a metal or a metal alloy having a higher melting temperature than an intrinsic temperature of the wide bandgap semiconductor material of the semiconductor substrate.
    Type: Application
    Filed: May 24, 2022
    Publication date: September 8, 2022
    Inventors: Edward Fuergut, Ravi Keshav Joshi, Ralf Siemieniec, Thomas Basler, Martin Gruber, Jochen Hilsenbeck, Dethard Peters, Roland Rupp, Wolfgang Scholz
  • Patent number: 11417528
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a carbon structure on a handle substrate at a first surface of the handle substrate. The method further includes attaching a first surface of a semiconductor substrate to the first surface of the handle substrate. The method further includes processing the semiconductor substrate and performing a separation process to separate the handle substrate from the semiconductor substrate. The separation process comprises modifying the carbon structure.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: August 16, 2022
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Francisco Javier Santos Rodriguez, Roland Rupp, Hans-Joachim Schulze
  • Patent number: 11393784
    Abstract: A method for forming semiconductor devices includes attaching a glass structure to a wide band-gap semiconductor wafer having a plurality of semiconductor devices. The method further includes forming at least one pad structure electrically connected to at least one doping region of a semiconductor substrate of the wide band-gap semiconductor wafer, by forming electrically conductive material within at least one opening extending through the glass structure.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: July 19, 2022
    Assignee: Infineon Technologies AG
    Inventors: Roland Rupp, Alexander Breymesser, Andre Brockmeier, Carsten von Koblinski, Francisco Javier Santos Rodriguez, Ronny Kern
  • Patent number: 11373863
    Abstract: A wafer composite includes a handle substrate, an auxiliary layer formed on a first main surface of the handle substrate, and a silicon carbide structure formed over the auxiliary layer. The handle substrate is subjected to laser radiation that modifies crystalline material along a focal plane in the handle substrate. The focal plane is parallel to the first main surface. The auxiliary layer is configured to stop propagation of microcracks that the laser radiation may generate in the handle substrate.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: June 28, 2022
    Assignee: Infineon Technologies AG
    Inventors: Roland Rupp, Mihai Draghici, Tobias Franz Wolfgang Hoechbauer, Wolfgang Lehnert, Matteo Piccin
  • Patent number: 11367683
    Abstract: A silicon carbide device includes a silicon carbide substrate, a contact layer including nickel, silicon and aluminum, a barrier layer structure including titanium and tungsten, and a metallization layer including copper. The contact layer is located on the silicon carbide substrate. The contact layer is located between the silicon carbide substrate and at least a part of the barrier layer structure. The barrier layer structure is located between the silicon carbide substrate and the metallization layer.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: June 21, 2022
    Assignee: Infineon Technologies AG
    Inventors: Edward Fuergut, Ravi Keshav Joshi, Ralf Siemieniec, Thomas Basler, Martin Gruber, Jochen Hilsenbeck, Dethard Peters, Roland Rupp, Wolfgang Scholz
  • Publication number: 20220168255
    Abstract: The present invention relates to pharmaceutical compositions containing dimethyl fumarate (DMF), More specifically, the present invention relates to a pharmaceutical composition for oral use in treating hyperproliferative, inflammatory or autoimmune disorders by administering a low daily dosage in the range of 410 mg±5% or 400 mg±5% dimethyl fumarate, wherein the pharmaceutical formulation is in the form of an erosion matrix tablet.
    Type: Application
    Filed: February 16, 2022
    Publication date: June 2, 2022
    Inventors: Christin Galetzka, Chris Rundfeldt, Roland Rupp, Peder M. Andersen
  • Publication number: 20220079884
    Abstract: A pharmaceutical formulation comprising an erosion matrix comprising one or more fumaric acid esters as well as one or more rate-controlling agents, wherein erosion of said erosion matrix permits controlled release of said fumaric acid ester(s).
    Type: Application
    Filed: October 12, 2021
    Publication date: March 17, 2022
    Inventors: Henrik Nilsson, Roland Rupp
  • Patent number: 11251269
    Abstract: An embodiment of a semiconductor device includes a trench gate structure extending from a first surface into a silicon carbide semiconductor body along a vertical direction. A body region of a first conductivity type adjoins a sidewall of the trench gate structure and includes a first body sub-region adjoining the sidewall and a second body sub-region adjoining the sidewall. At least one profile of dopants of the first conductivity type along the vertical direction includes a first doping peak in the first body sub-region and a second doping peak in the second body sub-region. A doping concentration of the first doping peak is larger than a doping concentration of the second doping peak.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: February 15, 2022
    Assignee: Infineon Technologies AG
    Inventors: Reinhard Ploss, Thomas Aichinger, Roland Rupp, Hans-Joachim Schulze
  • Patent number: 11239384
    Abstract: A semiconductor ingot is sliced to obtain a semiconductor slice with a front side surface and a rear side surface parallel to the front side surface. A passivation layer is formed directly on at least one of the front side surface and the rear side surface. A barrier layer including least one of silicon carbide, a ternary nitride, and a ternary carbide is formed on the rear side surface.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: February 1, 2022
    Assignee: INFINEON TECHNOLOGIESAG
    Inventors: Francisco Javier Santos Rodriguez, Roland Rupp, Hans-Joachim Schulze
  • Publication number: 20220028980
    Abstract: A semiconductor device includes a trench structure extending from a first surface into a silicon carbide semiconductor body, the trench structure having a gate electrode that is dielectrically insulated from the semiconductor body, a shielding region adjoining a bottom of the trench structure and forming a first pn junction with a drift structure of the semiconductor body, a body region forming a second pn junction with the drift structure, a source zone arranged between the first surface and the body region and forming a third pn junction with the source zone, wherein a contact portion of the body region extends to the first surface, wherein the source zone surrounds the contact portion of the body region at the first surface, and wherein the trench structure forms an enclosed loop at the first surface that surrounds the source zone and the contact portion of the body region at the first surface.
    Type: Application
    Filed: October 7, 2021
    Publication date: January 27, 2022
    Inventors: Andreas Meiser, Caspar Leendertz, Anton Mauder, Roland Rupp
  • Publication number: 20220005742
    Abstract: A semiconductor device includes a semiconductor body comprising a first surface and an edge surface, a contact electrode formed on the first surface and comprising an outer edge side, and a passivation layer section conformally covering the outer edge side of the contact electrode. The passivation layer section is a multi-layer stack comprising a first layer, a second layer, and a third layer. Each of the first, second and third layers include outer edge sides facing the edge surface and opposite facing inner edge sides. The outer edge side of the contact electrode is disposed laterally between the inner edge sides and the outer edge sides of each layer.
    Type: Application
    Filed: September 22, 2021
    Publication date: January 6, 2022
    Inventors: Jens Peter Konrath, Christian Hecht, Roland Rupp, Andre Kabakow
  • Patent number: 11195946
    Abstract: A method of manufacturing semiconductor devices includes: forming source regions of a first conductivity type in a SiC-based semiconductor substrate, wherein dopants are introduced selectively through first segments of first mask openings in a first dopant mask and wherein a longitudinal axis of the first mask opening extends into a first horizontal direction; forming pinning regions of a complementary second conductivity type, wherein dopants are selectively introduced through second segments of the first mask openings and wherein the first and second segments alternate along the first horizontal direction; and forming body regions of the second conductivity type, wherein dopants are selectively introduced through second mask openings in a second dopant mask, wherein a width of the second mask openings along a second horizontal direction orthogonal to the first horizontal direction is greater than a width of the first mask openings.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: December 7, 2021
    Assignee: Infineon Technologies AG
    Inventors: Andreas Peter Meiser, Romain Esteve, Roland Rupp
  • Publication number: 20210359087
    Abstract: A method of forming a semiconductor device and a semiconductor device are provided. The method includes forming a graphene layer at a first side of a silicon carbide substrate having at least next to the first side a first defect density of at most 5*102/cm2; attaching an acceptor layer at the graphene layer to form a wafer-stack, the acceptor layer comprising silicon carbide having a second defect density higher than the first defect density; forming an epitaxial silicon carbide layer; splitting the wafer-stack along a split plane in the silicon carbide substrate to form a device wafer comprising the graphene layer and a silicon carbide split layer at the graphene layer; and further processing the device wafer at the upper side.
    Type: Application
    Filed: July 29, 2021
    Publication date: November 18, 2021
    Inventors: Hans-Joachim Schulze, Roland Rupp
  • Patent number: 11173123
    Abstract: A pharmaceutical formulation comprising an erosion matrix comprising one or more fumaric acid esters as well as one or more rate-controlling agents, wherein erosion of said erosion matrix permits controlled release of said fumaric acid ester(s).
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: November 16, 2021
    Assignee: BIOGEN SWISS MANUFACTURING GMBH
    Inventors: Henrik Nilsson, Roland Rupp
  • Patent number: 11177354
    Abstract: A method of manufacturing a silicon carbide device includes: forming a trench in a process surface of a silicon carbide substrate that has a body layer forming second pn junctions with a drift layer structure, wherein the body layer is between the process surface and the drift layer structure and wherein the trench exposes the drift layer structure; implanting dopants through a bottom of the trench to form a shielding region that forms a first pn junction with the drift layer structure; forming dielectric spacers on sidewalls of the trench; and forming a buried portion of an auxiliary electrode in a bottom section of the trench, the buried portion adjoining the shielding region.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: November 16, 2021
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Caspar Leendertz, Anton Mauder, Roland Rupp
  • Publication number: 20210351077
    Abstract: A method for processing a wide band gap semiconductor wafer includes: depositing a support layer including semiconductor material at a back side of a wide band gap semiconductor wafer, the wide band gap semiconductor wafer having a band gap larger than the band gap of silicon; depositing an epitaxial layer at a front side of the wide band gap semiconductor wafer; and splitting the wide band gap semiconductor wafer along a splitting region to obtain a device wafer comprising at least a part of the epitaxial layer, and a remaining wafer comprising the support layer.
    Type: Application
    Filed: July 22, 2021
    Publication date: November 11, 2021
    Inventors: Francisco Javier Santos Rodriguez, Günter Denifl, Tobias Hoechbauer, Martin Huber, Wolfgang Lehnert, Roland Rupp, Hans-Joachim Schulze
  • Patent number: 11158557
    Abstract: A semiconductor device includes a semiconductor body comprising a first surface and an edge surface, a contact electrode formed on the first surface and comprising an outer edge side, and a passivation layer section conformally covering the outer edge side of the contact electrode. The passivation layer section is a multi-layer stack comprising a first layer, a second layer, and a third layer. Each of the first, second and third layers comprise outer edge sides facing the edge surface and opposite facing inner edge sides. The outer edge side of the contact electrode is disposed laterally between the inner edge sides and the outer edge sides of each layer. The inner and outer edge sides of the third layer are closer to the outer edge side of the electrode than the respective inner and outer edge sides of the first and second layer.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: October 26, 2021
    Assignee: Infineon Technologies AG
    Inventors: Jens Peter Konrath, Christian Hecht, Roland Rupp, Andre Kabakow
  • Patent number: 11145755
    Abstract: A semiconductor component includes a SiC semiconductor body having an active region and an edge termination structure at least partly surrounding the active region. A drift zone of a first conductivity type is formed in the SiC semiconductor body. The edge termination structure includes: a first doped region of a second conductivity type between a first surface of the SiC semiconductor body and the drift zone, the first doped region at least partly surrounding the active region and being spaced apart from the first surface; a plurality of second doped regions of the second conductivity type between the first surface and the first doped region; and third doped regions of the first conductivity type separating adjacent second doped regions of the plurality of second doped regions from one another in a lateral direction.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: October 12, 2021
    Assignee: Infineon Technologies AG
    Inventors: Larissa Wehrhahn-Kilian, Rudolf Elpelt, Roland Rupp, Ralf Siemieniec, Bernd Zippelius
  • Publication number: 20210313431
    Abstract: A method for producing a silicon carbide component includes forming a silicon carbide layer on an initial wafer, forming a doping region of the silicon carbide component to be produced in the silicon carbide layer, and forming an electrically conductive contact structure of the silicon carbide component to be produced on a surface of the silicon carbide layer. The electrically conductive contact structure electrically contacts the doping region. Furthermore, the method includes splitting the silicon carbide layer or the initial wafer after forming the electrically conductive contact structure, such that a silicon carbide substrate at least of the silicon carbide component to be produced is split off.
    Type: Application
    Filed: June 17, 2021
    Publication date: October 7, 2021
    Inventors: Roland Rupp, Ronny Kern