Abstract: A system and method to generate memory test patterns for the calibration of a delay locked loop (DLL) using pseudo random bit sequences (PRBS) generated through a pair of liner feedback shift registers (LFSR). The generated patterns are implemented on the system data bus as test patterns that closely simulate run-time switching conditions on the system bus, so as to allow more accurate calibration of the DLL. Test data write/read operations may be performed while signals for the test patterns are present on various bit lines in the data bus so as to allow for accurate determination or adjustment of the value for the delay to be provided by the DLL to the strobe signals during memory data reading operations at run time. Memory chips may also be tested over an operating range of values using the generated test patterns.

Abstract: A method and associated apparatus are provided for improving the performance of a high speed data bus, such as a memory bus, using selectively activated receiver and driver pairs. Each receiver and driver pair may be selectively activated to permit data communication on a segment of the high speed data bus coupled to the activated receiver and driver pair. Each receiver and driver pair may also be deactivated, thereby disconnecting at least a respective segment of the high speed data bus, so that communicating system components may be connected in a substantially stubless environment.

Abstract: A method and associated apparatus is provided for improving the performance of a high speed memory bus using switches. Bus reflections caused by electrical stubs are substantially eliminated by connecting system components in a substantially stubless configuration using a segmented bus wherein bus segments are connected through switches. The switches disconnect unused bus segments during operations so that communicating devices are connected in an substantially point-to-point communication path.

Abstract: A registered memory module includes several memory devices coupled to a register through a plurality of transmission lines forming a symmetrical tree topology. The tree includes several branches each of which includes two transmission lines coupled only at its ends to either another transmission line or one of the memory devices. The branches are arranged in several layers of hierarchy, with the transmission lines in branches having the same hierarchy having the same length. Each transmission line preferably has a characteristic impedance that is half the characteristic impedance of any pair of downstream transmission lines to which it is coupled to provide impedance matching. A dedicated transmission line is used to couple an additional memory device, which may or may not be an error checking memory device, to the register.

Abstract: A method and associated apparatus is provided for improving the performance of a high speed memory bus by substantially eliminating bus reflections caused by electrical stubs. The stubs are substantially eliminated by connecting system components in a substantially stubless configuration using a looping bus for continuing the looping bus through each device. The invention also provides an interface circuit that enables data communications between devices of different technologies. The interface circuit connects to the looping data bus and includes a circuit for providing voltage level, encoding type, and data rate conversions for data received from the looping data bus and intended for use on a second data bus connected to the interface circuit.

Abstract: A method and associated apparatus are provided for improving the performance of a high speed data bus, such as a memory bus, using selectively activated receiver and driver pairs. Each receiver and driver pair may be selectively activated to permit data communication on a segment of the high speed data bus coupled to the activated receiver and driver pair. Each receiver and driver pair may also be deactivated, thereby disconnecting at least a respective segment of the high speed data bus, so that communicating system components may be connected in a substantially stubless environment.

Abstract: The signal integrity of a high speed heavily loaded multidrop memory bus is often degraded due the numerous impedance mismatches. The impedance mismatches causes the bus to exhibit a nonlinear frequency response, which diminishes signal integrity and limits the bandwidth of the bus. A compensating element, such as a capacitor which ties the bus to a reference plane (e.g., a ground potential), or an inductor wired in series with the bus, is located approximately midway between the memory controller and the memory slots. The use of the compensating element equalizes signal amplitudes and minimizes phase errors of signals in an interested frequency range and diminishes the amplitudes of high frequency signals which exhibit high degrees of phase error. The resulting bus structure has increased desirable harmonic content with low phase error, thereby permitting the bus to exhibit better rise time performance and permitting a higher data transfer rate.

Abstract: The signal integrity of a high speed heavily loaded multidrop memory bus is often degraded due the numerous impedance mismatches. The impedance mismatches causes the bus to exhibit a nonlinear frequency response, which diminishes signal integrity and limits the bandwidth of the bus. A compensating element, such as a capacitor which ties the bus to a reference plane (e.g., a ground potential), or an inductor wired in series with the bus, is located approximately midway between the memory controller and the memory slots. The use of the compensating element equalizes signal amplitudes and minimizes phase errors of signals in an interested frequency range and diminishes the amplitudes of high frequency signals which exhibit high degrees of phase error. The resulting bus structure has increased desirable harmonic content with low phase error, thereby permitting the bus to exhibit better rise time performance and permitting a higher data transfer rate.

Abstract: The present invention includes phase shifters, interrogators, methods of shifting a phase angle of a signal, and methods of operating an interrogator. One aspect of the present invention provides a phase shifter including a first power divider configured to receive a signal and provide plural quadrature components of the signal; plural mixers coupled with the first power divider and configured to scale the quadrature components using a phase shift angle; and a second power divider coupled with the mixers and configured to combine the scaled quadrature components to shift the phase angle of the input signal by the phase shift angle.

Abstract: The present invention includes phase shifters, interrogators, methods of shifting a phase angle of a signal, and methods of operating an interrogator. One aspect of the present invention provides a phase shifter including a first power divider configured to receive a signal and provide plural quadrature components of the signal; plural mixers coupled with the first power divider and configured to scale the quadrature components using a phase shift angle; and a second power divider coupled with the mixers and configured to combine the scaled quadrature components to shift the phase angle of the input signal by the phase shift angle.

Abstract: The present invention includes backscatter communication systems, interrogators, methods of communicating in a backscatter system, and backscatter communication methods. According to one aspect of the present invention, a backscatter communication system includes an interrogator including a transmitter configured to output a forward link communication and a receiver configured to receive a return link communication having a carrier signal, the receiver being configured to reduce the amplitude of the carrier signal of the return link communication; and a communication device configured to modulate the carrier signal to communicate the return link communication responsive to reception of the forward link communication.

Abstract: The present invention provides backscatter interrogators, communication systems and backscatter communication methods. According to one aspect of the present invention, a backscatter interrogator includes a data path configured to communicate a data signal; a signal generator configured to generate a carrier signal; and a modulator coupled with the data path and the signal generator, the modulator being configured to spread the data signal to define a spread data signal and amplitude modulate the carrier signal using the spread data signal, the modulator being further configured to phase modulate the carrier signal.

Abstract: The present invention relates to wireless communication systems, interrogators and methods of communicating within a wireless communication system. One aspect of the present invention provides a wireless communication system including at least one remote communication device configured to communicate a return link wireless signal; an interrogator including: a communication station configured to receive the return link wireless signal and to generate a return link communication signal corresponding to the return link wireless signal; communication circuitry coupled with the communication station and configured to communicate the return link communication signal; and a housing remotely located with respect to the communication station and including circuitry configured to receive the return link communication signal from the communication circuitry and to process the return link communication signal.

Abstract: A method and associated apparatus is provided for improving the performance of a high speed memory bus using switches. Bus reflections caused by electrical stubs are substantially eliminated by connecting system components in a substantially stubless configuration using a segmented bus wherein bus segments are connected through switches. The switches disconnect unused bus segments during operations so that communicating devices are connected in an substantially point-to-point communication path.

Abstract: The present invention relates to wireless communication systems, interrogators and methods of communicating within a wireless communication system. One aspect of the present invention provides a wireless communication system including at least one remote communication device configured to communicate a return link wireless signal; an interrogator including: a communication station configured to receive the return link wireless signal and to generate a return link communication signal corresponding to the return link wireless signal; communication circuitry coupled with the communication station and configured to communicate the return link communication signal; and a housing remotely located with respect to the communication station and including circuitry configured to receive the return link communication signal from the communication circuitry and to process the return link communication signal.

Abstract: An active termination circuit is incorporated into the devices connected to a multidrop bus. By including the active termination circuit on the devices instead of the bus, termination resistors can be removed from the system PCB, which saves costs and frees up precious space on the PCB. The active termination circuit has a termination enabled state and a termination disabled state. The active termination circuit is selectively placed into the enabled or disabled states in specified devices depending upon, for example, device location or communication traffic on the bus. The multidrop system can also utilize a separate passive termination mechanism in combination with the active termination circuits utilized in the devices.

Abstract: The present invention provides backscatter interrogators, communication systems and backscatter communication methods. According to one aspect of the present invention, a backscatter interrogator includes a data path configured to communicate a data signal; a signal generator configured to generate a carrier signal; and a modulator coupled with the data path and the signal generator, the modulator being configured to spread the data signal to define a spread data signal and amplitude modulate the carrier signal using the spread data signal, the modulator being further configured to phase modulate the carrier signal.

Abstract: The present invention includes interrogators, communication systems, communication methods, and methods of processing a communication signal. One aspect of the present invention provides a backscatter system interrogator including a downconverter configured to receive a backscatter communication signal having a first frequency and convert the backscatter communication signal having the first frequency to a subcarrier signal having a second frequency less than the first frequency; a filter coupled with the downconverter and configured to filter direct path energy from the subcarrier signal; and a gain control coupled with the filter and configured to adjust the gain of the filtered subcarrier signal.

Abstract: An antenna, system and method for transmitting and receiving RF signals over a first frequency band using a single antenna or two closely spaced antennas. In one embodiment, the antenna is configured to receive first signals in the first frequency band having a first rotational polarization and to transmit second signals in the first frequency band and having a second rotational polarization. The second signals may be transmitted in response to the first signals. The first signals may be preferentially routed to a receiver using signal conditioning circuitry that also routes the second signals from a transmitter to the antenna but not to the receiver.

Abstract: The present invention includes backscatter communication systems, interrogators, methods of communicating in a backscatter system, and backscatter communication methods. According to one aspect of the present invention, a backscatter communication system includes an interrogator including a transmitter configured to output a forward link communication and a receiver configured to receive a return link communication having a carrier signal, the receiver being configured to reduce the amplitude of the carrier signal of the return link communication; and a communication device configured to modulate the carrier signal to communicate the return link communication responsive to reception of the forward link communication.