Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a semiconductor member, and a first crystal member. A direction from the first electrode toward the second electrode is aligned with a first direction. A position in the first direction of the third electrode is between positions in the first direction of the first electrode and the second electrode. The semiconductor member includes at least one selected from the group consisting of silicon carbide, silicon, carbon, and germanium. The semiconductor member includes a first region, and first and second partial regions. The first region is between the first and second electrodes in the first direction. A second direction from the first region toward the third electrode crosses the first direction. The first crystal member is provided between the first and third electrodes in the second direction.

Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to fourth semiconductor regions, and a first insulating portion. The first semiconductor region includes first to third partial regions. The first partial region is provided between the first electrode and the second electrode. The second partial region is provided between the first and third electrodes. The second semiconductor region includes fourth to sixth partial regions. The fourth partial region is provided between the first partial region and the second electrode. The fifth partial region is provided between the third semiconductor region and at least a portion of the second partial region. The sixth partial region is provided between the third partial region and the third semiconductor region. The fourth semiconductor region is provided between the first and fourth partial regions. The first insulating portion is provided between the second partial region and the third electrode.

Abstract: A semiconductor device according to embodiments includes, a SiC substrate, SiC layer, a trench having a side face and a bottom face, a first conductivity type first SiC region, a second conductivity type second SiC region between the first SiC region and the SiC substrate, a first conductivity type third SiC region between the second SiC region and the SiC substrate, a boundary between the second SiC region and the third SiC region provided at a side of the side face, the boundary including a first region, a distance between the first region and a front face of the SiC layer increasing as a distance from the side face to the first region increasing, and distance from the side face to the first region being 0 ?m or more and 0.3 ?m or less, a gate insulating film and gate insulating film.

Abstract: According to one embodiment, a semiconductor device includes a base body including silicon carbide, a first semiconductor region including silicon carbide and a first element, and a second semiconductor region including silicon carbide and the first element. The first semiconductor region includes first and second intermediate regions. A first concentration of the first element in the first intermediate region satisfies a first or a second condition. In the first condition, the first concentration is lower than a second concentration of the first element in the second intermediate region. In the second condition, the first concentration is higher than a third concentration of a second element included in the first intermediate region, the second concentration is higher than a fourth concentration of the second element in the second intermediate region, and a difference between the first and third concentrations is smaller than a difference between the second and fourth concentrations.

Abstract: According to one embodiment, a semiconductor device includes a first element. The first element includes a first electrode, a second electrode and first to fourth semiconductor regions. The second electrode includes a first conductive region and a second conductive region. The first semiconductor region is provided between the first electrode and the first conductive region and between the first electrode and the second conductive region. The second semiconductor region includes a first partial region and a second partial region. The first partial region is provided between the first electrode and the first conductive region. The second partial region is provided between the first electrode and the second conductive region. The third semiconductor region is provided between the second partial region and the second conductive region. The fourth semiconductor region is provided between the third semiconductor region and the second conductive region.

Abstract: A semiconductor device according to embodiments described herein includes a p-type SiC layer, a gate electrode, and a gate insulating layer between the SiC layer and the gate electrode. The gate insulating layer includes a first layer, a second layer, a first region, and a second region. The second layer is between the first layer and the gate electrode and has a higher oxygen density than the first layer. The first region is provided across the first layer and the second layer, includes a first element from F, D, and H, and has a first concentration peak of the first element. The second region is provided in the first layer, includes a second element from Ge, B, Al, Ga, In, Be, Mg, Ca, Sr, Ba, Sc, Y, La, and lanthanoid, and has a second concentration peak of the second element and a third concentration peak of C.

Abstract: According to one embodiment, a semiconductor device includes first to fourth semiconductor regions, a first electrode, and a first insulating film. The first semiconductor region includes a first partial region and a second partial region. The second semiconductor region is separated from the first partial region. The third semiconductor region is provided between the first partial region and the second semiconductor region. The third semiconductor region includes a third partial region and a fourth partial region. The first electrode is separated from the second partial region and is separated from the second semiconductor region and the third semiconductor region. The first insulating film includes a first insulating region and a second insulating region. The fourth semiconductor region includes a first portion. The first portion is provided between the fourth partial region and at least a portion of the first insulating film.

Abstract: A semiconductor device according to embodiments includes, a SiC substrate, SiC layer, a trench having a side face and a bottom face, a first conductivity type first SiC region, a second conductivity type second SiC region between the first SiC region and the SiC substrate, a first conductivity type third SiC region between the second SiC region and the SiC substrate, a boundary between the second SiC region and the third SiC region provided at a side of the side face, the boundary including a first region, a distance between the first region and a front face of the SiC layer increasing as a distance from the side face to the first region increasing, and distance from the side face to the first region being 0 ?m or more and 0.3 ?m or less, a gate insulating film and gate insulating film.

Abstract: A semiconductor device according to an embodiment includes a silicon carbide layer having a first and second plane, first and second trench extending in first direction, and in the silicon carbide layer, n-type first region, p-type second region between the n-type first region and the first plane and between the first and second trench, p-type fifth region covering bottom of the first trench, p-type sixth region covering bottom of the second trench, n-type seventh region between the fifth region and the second region, n-type eighth region between the sixth and second regions, p-type ninth regions contacting the fifth and second regions, and p-type tenth regions contacting the sixth region and the second region, the ninth and tenth regions repeatedly disposed in the first direction, and a line segment connecting the ninth region and the tenth region is oblique with respect to second direction perpendicular to the first direction.

Abstract: A semiconductor device of an embodiment includes a silicon carbide layer having a first and a second plane, a trench, a gate electrode in the trench, an n-type first silicon carbide region, a p-type second silicon carbide region and a p-type third silicon carbide region provided between the first silicon carbide region and the first plane and interposing the trench therebetween, a p-type sixth silicon carbide region between the first silicon carbide region and the second silicon carbide region, a p-type seventh silicon carbide region between the first silicon carbide region and the third silicon carbide region, an eighth silicon carbide region between the first silicon carbide region and the sixth silicon carbide region, and a ninth silicon carbide region between the first silicon carbide region and the seventh silicon carbide region. The eighth silicon carbide region has a plurality of first regions extending toward the ninth silicon carbide region.

Abstract: A semiconductor device according to embodiments described herein includes a p-type SiC layer, a gate electrode, and a gate insulating layer between the SiC layer and the gate electrode. The gate insulating layer includes a first layer, a second layer, a first region, and a second region. The second layer is between the first layer and the gate electrode and has a higher oxygen density than the first layer. The first region is provided across the first layer and the second layer, includes a first element from F, D, and H, and has a first concentration peak of the first element. The second region is provided in the first layer, includes a second element from Ge, B, Al, Ga, In, Be, Mg, Ca, Sr, Ba, Sc, Y, La, and lanthanoid, and has a second concentration peak of the second element and a third concentration peak of C.

Abstract: A semiconductor device according to an embodiment includes a SiC layer, an electrode electrically connected to the SiC layer and an impurity region provided between the SiC layer and the electrode. The impurity region includes first position and second position, the first position having highest concentration of an impurity in the impurity region, the highest concentration being not lower than 1×1020 cm?3 and not higher than 5×1022 cm?3, the second position having concentration of the impurity one digit lower than the highest concentration, the first position being between the electrode and the second position, a distance between the first position and the second position being 50 nm or shorter.

Abstract: According to one embodiment, a semiconductor device includes a first conductive portion, a first extension portion, a first conductive region, a first extension region, a semiconductor portion, and an insulating portion. The first conductive portion includes a first portion, a second portion, a third portion, a fourth portion, a fifth portion, and a sixth portion. The first extension portion is electrically connected to the first conductive portion. The first conductive region is provided between the first portion and the second portion, between the third portion and the fourth portion, and between the fifth portion and the sixth portion. The first extension region is electrically connected to the first conductive region. The semiconductor portion includes silicon carbide and includes first to third semiconductor regions. The insulating portion is provided between the first conductive portion and the semiconductor portion and between the first extension portion and the semiconductor portion.

Abstract: A semiconductor device of an embodiment includes a silicon carbide layer; a gate electrode; a gate insulating layer disposed between the silicon carbide layer and the gate electrode; a first region disposed in the silicon carbide layer and containing nitrogen (N); and a second region disposed between the first region and the gate insulating layer, and containing at least one element selected from the group consisting of nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), scandium (Sc), yttrium (Y), lanthanum (La), lanthanoids (Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu), hydrogen (H), deuterium (D), and fluorine (F).

Abstract: A semiconductor device according to an embodiment includes a SiC layer, an electrode electrically connected to the SiC layer and an impurity region provided between the SiC layer and the electrode. The impurity region includes first position and second position, the first position having highest concentration of an impurity in the impurity region, the highest concentration being not lower than 1×1020 cm?3 and not higher than 5×1022 cm?3, the second position having concentration of the impurity one digit lower than the highest concentration, the first position being between the electrode and the second position, a distance between the first position and the second position being 50 nm or shorter.

Abstract: According to one embodiment, a semiconductor device includes a first element. The first element includes a first electrode, a second electrode and first to fourth semiconductor regions. The second electrode includes a first conductive region and a second conductive region. The first semiconductor region is provided between the first electrode and the first conductive region and between the first electrode and the second conductive region. The second semiconductor region includes a first partial region and a second partial region. The first partial region is provided between the first electrode and the first conductive region. The second partial region is provided between the first electrode and the second conductive region. The third semiconductor region is provided between the second partial region and the second conductive region. The fourth semiconductor region is provided between the third semiconductor region and the second conductive region.

Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to fourth semiconductor regions, and a first insulating portion. The first semiconductor region includes first to third partial regions. The first partial region is provided between the first electrode and the second electrode. The second partial region is provided between the first and third electrodes. The second semiconductor region includes fourth to sixth partial regions. The fourth partial region is provided between the first partial region and the second electrode. The fifth partial region is provided between the third semiconductor region and at least a portion of the second partial region. The sixth partial region is provided between the third partial region and the third semiconductor region. The fourth semiconductor region is provided between the first and fourth partial regions. The first insulating portion is provided between the second partial region and the third electrode.

Abstract: A semiconductor device of an embodiment includes a silicon carbide layer having a first plane and a second plane; a trench having a first side face, a second side face, and a bottom face; a first silicon carbide region of a first conductivity type; a second silicon carbide region and a third silicon carbide region of a second conductivity type, the third silicon carbide region and the second silicon carbide region sandwiching the trench; a sixth silicon carbide region of a second conductivity type in contact with the second side face and the bottom face; and a gate electrode in the trench. The first side face has a first region having a first inclination angle. The off angle of the first region with respect to a {0-33-8} face is no more than 2 degrees. A second inclination angle of the second side face is larger the first inclination angle.

Abstract: A semiconductor device of an embodiment includes a silicon carbide layer having a first plane and a second plane; a trench having a first side face, a second side face, and a bottom face; a first silicon carbide region of a first conductivity type; a second silicon carbide region and a third silicon carbide region of a second conductivity type, the third silicon carbide region and the second silicon carbide region sandwiching the trench; a sixth silicon carbide region of a second conductivity type in contact with the second side face and the bottom face; and a gate electrode in the trench. The first side face has a first region having a first inclination angle. The off angle of the first region with respect to a {0-33-8} face is no more than 2 degrees. A second inclination angle of the second side face is larger the first inclination angle.

Abstract: According to one embodiment, a semiconductor device includes a first conductive portion, a first extension portion, a first conductive region, a first extension region, a semiconductor portion, and an insulating portion. The first conductive portion includes a first portion, a second portion, a third portion, a fourth portion, a fifth portion, and a sixth portion. The first extension portion is electrically connected to the first conductive portion. The first conductive region is provided between the first portion and the second portion, between the third portion and the fourth portion, and between the fifth portion and the sixth portion. The first extension region is electrically connected to the first conductive region. The semiconductor portion includes silicon carbide and includes first to third semiconductor regions. The insulating portion is provided between the first conductive portion and the semiconductor portion and between the first extension portion and the semiconductor portion.