Abstract: Active areas of integrated circuits can be formed by implanting first ions into a first active area of a substrate adjacent to an isolation structure in the substrate and between a source and a drain region of the integrated circuit to provide a first concentration of ions in the first active area. Second ions are implanted into the first active area and a second active area of the substrate adjacent to the first active area and spaced-apart from the isolation structure on the substrate to provide a second concentration of ions in the second active area and a third concentration of ions in the first active area that is greater than the first and second concentrations. As a result, the level of ion concentration can be higher at the edge of an active channel region than at the center of the channel.

Abstract: Methods for manufacturing a storage node of a capacitor of a semiconductor device and a storage node manufactured by these methods are provided. An exemplary method for manufacturing a storage node of a capacitor of a semiconductor device includes forming a mold layer on a semiconductor substrate, forming a mold for the storage node by patterning the mold layer by a photolithography process, introducing a photomask which includes a plurality of light transmitting patterns separated from each other and which define the region to be occupied by the storage node, and forming a storage node that has the shape formed by the mold. The photolithography process is performed with the occurrence of a pattern bridge phenomenon, e.g., the transferred light transmitting patterns are connected to each other in a pattern transferred from the light transmitting patterns to the mold.

Abstract: A semiconductor device is manufactured by forming a first insulating layer on a semiconductor substrate. First contact pads and second contact pads are formed that penetrate through the first insulating layer and are electrically connected to the semiconductor substrate. A second insulating layer is formed that has guide contact holes that expose upper surfaces of the first contact pads. An etch stopper is formed on bottoms and sidewalls of the guide contact holes of the second insulating layer. Bit lines are formed that are electrically connected to the semiconductor substrate by the second contact pads. The bit lines are electrically isolated from the first contact pads.

Abstract: DRAM cells include a common drain region in an integrated circuit substrate and first and second source regions in the integrated circuit substrate, a respective one of which is laterally offset from the common drain region along respective first and second opposite directions. First and second storage nodes are provided on the integrated circuit substrate, a respective one of which is electrically connected to a respective one of the first and second source regions. The first and second storage nodes are laterally offset from the respective first and second source regions along the first direction.

Abstract: Methods for manufacturing a storage node of a capacitor of a semiconductor device and a storage node manufactured by these methods are provided. An exemplary method for manufacturing a storage node of a capacitor of a semiconductor device includes forming a mold layer on a semiconductor substrate, forming a mold for the storage node by patterning the mold layer by a photolithography process, introducing a photomask which includes a plurality of light transmitting patterns separated from each other and which define the region to be occupied by the storage node, and forming a storage node that has the shape formed by the mold. The photolithography process is performed with the occurrence of a pattern bridge phenomenon, e.g., the transferred light transmitting patterns are connected to each other in a pattern transferred from the light transmitting patterns to the mold.

Abstract: Methods of fabricating integrated circuit devices include forming a trench in a face of an integrated circuit substrate. The trench has a trench sidewall and a trench floor. The method further including forming a first insulating layer on the trench sidewall that exposes at least part of the trench floor and forming a conductive plug in the trench on the trench floor. The conductive plug is electrically connected to the substrate at the trench floor through the trench sidewall that exposes the at least part of the trench floor. The conductive plug also has a plug top opposite the trench floor that is recessed beneath the face of the substrate. The method further includes forming a second insulating layer on the plug top.

Abstract: Integrated circuit devices include an integrated circuit substrate having a face and a trench in the face. The trench has a trench sidewall and a trench floor. A first insulating layer is provided on the trench sidewall that exposes at least part of the trench floor and a conductive plug is provided in the trench on the trench floor. The conductive plug is electrically connected to the substrate at the trench floor through the trench sidewall that exposes the at least part of the trench floor. The conductive plug also has a plug top opposite the trench floor that is recessed beneath the face of the substrate. A second insulating layer is provided on the plug top. Methods of fabricating integrated circuit devices include forming a trench in a face of an integrated circuit substrate. The trench has a trench sidewall and a trench floor.

Abstract: Active areas of integrated circuits can be formed by implanting first ions into a first active area of a substrate adjacent to an isolation structure in the substrate and between a source and a drain region of the integrated circuit to provide a first concentration of ions in the first active area. Second ions are implanted into the first active area and a second active area of the substrate adjacent to the first active area and spaced-apart from the isolation structure on the substrate to provide a second concentration of ions in the second active area and a third concentration of ions in the first active area that is greater than the first and second concentrations. As a result, the level of ion concentration can be higher at the edge of an active channel region than at the center of the channel.

Abstract: Integrated circuit devices include an integrated circuit substrate having a face and a trench in the face. The trench has a trench sidewall and a trench floor. A first insulating layer is provided on the trench sidewall that exposes at least part of the trench floor and a conductive plug is provided in the trench on the trench floor. The conductive plug is electrically connected to the substrate at the trench floor through the trench sidewall that exposes the at least part of the trench floor. The conductive plug also has a plug top opposite the trench floor that is recessed beneath the face of the substrate. A second insulating layer is provided on the plug top. Methods of fabricating integrated circuit devices include forming a trench in a face of an integrated circuit substrate. The trench has a trench sidewall and a trench floor.