Abstract: A complementary metal oxide semiconductor (CMOS) device with a three dimensional integration structure and a method for fabricating the same are provided. An image sensor includes a first substrate in which a photo detection device is formed; a second substrate in which a peripheral circuit is formed, wherein the first substrate and the second substrate are bonded through a plurality of bonding pads formed on both the first substrate and the second substrate, and a back side of the first substrate is turned upside down; and a microlens formed on a top portion of the back side of the first substrate.

Abstract: A redundancy program circuit and methods thereof. The redundancy program circuit may include a master fuse circuit with a master fuse outputting an operation enable signal to indicate a master fuse operating status, at least one control fuse circuit including at least one control fuse, the at least one control fuse circuit outputting an operating status signal for the at least one control fuse and a multiplexing unit configured to multiplex decoding address signal bits based on at least one of the operating status signal and the operation enable signal.

Abstract: An auto-precharge control circuit in a semiconductor memory and method thereof, where the auto-precharge starting point may vary. The auto-precharge starting point may vary in response to at least one control signal. The auto-precharge starting point may vary in accordance with frequency and/or latency information. The auto-precharge starting point may vary in response to at least one control signal including clock frequency information. The auto-precharge starting point may vary depending on a latency signal received from a mode register setting command.

Abstract: An auto-precharge control circuit in a semiconductor memory and method thereof, where the auto-precharge starting point may vary. The auto-precharge starting point may vary in response to at least one control signal. The auto-precharge starting point may vary in accordance with frequency and/or latency information. The auto-precharge starting point may vary in response to at least one control signal including clock frequency information. The auto-precharge starting point may vary depending on a latency signal received from a mode register setting command.

Abstract: A redundancy program circuit and methods thereof. The redundancy program circuit may include a master fuse circuit with a master fuse outputting an operation enable signal to indicate a master fuse operating status, at least one control fuse circuit including at least one control fuse, the at least one control fuse circuit outputting an operating status signal for the at least one control fuse and a multiplexing unit configured to multiplex decoding address signal bits based on at least one of the operating status signal and the operation enable signal.

Abstract: A redundancy program circuit and methods thereof. The redundancy program circuit may include a master fuse circuit with a master fuse outputting an operation enable signal to indicate a master fuse operating status, at least one control fuse circuit including at least one control fuse, the at least one control fuse circuit outputting an operating status signal for the at least one control fuse and a multiplexing unit configured to multiplex decoding address signal bits based on at least one of the operating status signal and the operation enable signal.

Abstract: A multiprocessor system includes a first processor coupled to a first bus, a second processor coupled to a second bus, a first memory coupled to the first bus and the second bus, and a second memory coupled to the second bus. The first processor is configured to access the first memory through the first bus, and the second processor is configured to access the first memory and the second memory through the second bus.

Abstract: In a self refresh period control circuit for controlling a refresh period of a semiconductor memory device in response to operating temperature of the device, a temperature sensor part generates a first period control signal in response to a self refresh start signal or self refresh completion signal, senses operating temperature of the semiconductor memory device in response to a clock signal generated by the self refresh start signal, and generates a corresponding second period control signal. A period magnification control part controls a self refresh period in response to the first and second period control signals. Accordingly, a refresh period characteristic change based on operating temperature, which is causable by an initial self refresh, is implemented.

Abstract: A semiconductor memory device including a plurality of ports, at least one shared memory region of a memory cell array accessible through the ports, and a data transmission controller coupled to the shared memory region and the ports. The data transmission controller is configured to apply a read command of a read operation to the shared memory region after a write command of a write operation before applying any other commands to the shared memory region when at least a portion of a write address associated with the write operation and at least a portion of a read address associated with the read operation are substantially equivalent.

Abstract: Disclosed in a method of forming a copper wiring in a semiconductor device. A copper layer buries a damascene pattern in which an interlayer insulating film of a low dielectric constant. The copper layer is polished by means of a chemical mechanical polishing process to form a copper wiring within a damascene pattern. At this time, the chemical mechanical polishing process is overly performed so that the top surface of the copper wiring is concaved and is lower than the surface of the interlayer insulating film of the low dielectric constant neighboring it. Furthermore, an annealing process is performed so that the top surface of the copper wiring is changed from the concaved shape to a convex shape while stabilizing the copper wiring. A copper anti-diffusion insulating film is then formed on the entire structure including the top surface of the copper wiring having the convex shape.

Abstract: A plate for forming the metal wires has an engraved pattern for forming a plurality of trenches and an engraved pattern for forming a plurality of via holes. An insulating film pattern in which the trenches and the via holes are shaped is obtained using the plate. Also, a metal is buried into the trenches and the via holes by means of a damascene process to form upper metal wires electrically connected to lower metal wires. In the invention, photolithography and etch processes are not employed. For this reason, reduction in the yield and reliability due to defects occurring in the photolithography and etch processes is prevented. Furthermore, the process steps are reduced to reduce the production cost and to improve productivity.

Abstract: The present invention relates to a method of forming a copper wiring in a semiconductor device. A copper wiring is formed within a damascene pattern. Before a copper anti-diffusion insulating film is formed on the entire structure, a specific metal element is doped into the surface of the copper wiring and the surface of its surrounding insulating film to form a metal element-doping layer. The doped specific metal element reacts with surrounding other elements, due to heat upon depositing the copper anti-diffusion insulating film and a low dielectric constant interlayer insulating film and additional annealing process. For this reason, a copper alloy layer and a metal oxide layer are stacked at the interface of the copper wiring and the copper anti-diffusion insulating film and the metal oxide layer is formed at the interface of the insulating film and the copper anti-diffusion insulating film.

Abstract: A complementary metal oxide semiconductor (CMOS) device with a three dimensional integration structure and a method for fabricating the same are provided. An image sensor includes a first substrate in which a photo detection device is formed; a second substrate in which a peripheral circuit is formed, wherein the first substrate and the second substrate are bonded through a plurality of bonding pads formed on both the first substrate and the second substrate, and a back side of the first substrate is turned upside down; and a microlens formed on a top portion of the back side of the first substrate.

Abstract: An apparatus and method for controlling registration of a mobile identification number (MIN) of a mobile communication terminal. A memory stores a table in which MIN groups uniquely assigned to common carriers are stored, and a MIN of a mobile communication terminal. An input device inputs a MIN to be stored in the memory. If the MIN stored in the memory is a default MIN, a controller replaces the MIN stored in the memory with the MIN input from the input device. If the MIN stored in the memory is not the default MIN and the input MIN belongs to a MIN group assigned to a common carrier corresponding to the stored MIN, the controller replaces the stored MIN with the input MIN.

Abstract: The present invention discloses a radio frequency integrated circuit and a method for manufacturing the same. The radio frequency integrated circuit is manufactured by forming an inductor and a passivation layer on an insulator substrate of a first substrate, forming an element layer having a multi-layer wiring structure on a semiconductor substrate, an inductor coupling line formed on the top portion of the element layer, first and second via contact plugs formed on the inductor coupling line, and an input/output pad coupled to the second via contact plug on a second substrate, and bonding the first substrate onto the second substrate, so that the inductor of the first substrate can be coupled to the first via contact plug of the second substrate. As a result, the radio frequency integrated circuit includes the inductor having a high Q value, by forming the inductor sufficiently separately from the semiconductor substrate on which the elements have been formed.

Abstract: The present invention relates to a method for forming an inductor being a passive device in RE MEMS, RFCMOS, Bipolor/SiGe, BiCMOS semiconductor devices. According to the present method, a lower photoresist layer, an intermediate anti-exposure layer and an upper photoresist layer are sequentially formed on a substrate having a lower electrode. The upper photoresist layer is patterned by means of an exposure and development process using a first mask. The exposed intermediate anti-exposure layer is etched until the lower photoresist layer is sufficiently exposed, thus forming a partial via hole. The lower photoresist layer exposed through the upper photoresist layer and the partial via hole are patterned by means of an exposure and development process using a second mask, thus forming a damascene pattern having trenches and a via hole. The damascene pattern is filled with a conductive material layer to form a copper inductor.

Abstract: In a self refresh period control circuit for controlling a refresh period of a semiconductor memory device in response to operating temperature of the device, a temperature sensor part generates a first period control signal in response to a self refresh start signal or self refresh completion signal, senses operating temperature of the semiconductor memory device in response to a clock signal generated by the self refresh start signal, and generates a corresponding second period control signal. A period magnification control part controls a self refresh period in response to the first and second period control signals. Accordingly, a refresh period characteristic change based on operating temperature, which is causable by an initial self refresh, is implemented.

Abstract: A redundancy program circuit and methods thereof. The redundancy program circuit may include a master fuse circuit with a master fuse outputting an operation enable signal to indicate a master fuse operating status, at least one control fuse circuit including at least one control fuse, the at least one control fuse circuit outputting an operating status signal for the at least one control fuse and a multiplexing unit configured to multiplex decoding address signal bits based on at least one of the operating status signal and the operation enable signal.

Abstract: An apparatus and method for receiving a quick paging message in a mobile station wherein a controller for synchronizing with a second clock in a predetermined time slot and transmitting a command for obtaining a synchronization at a frequency of receiving the quick paging message where the MS selects a clock having a first period as an operation clock under the second mode and under the first mode, selects a clock having a second period earlier than the first period; a dual phase-locked loop operating in response to the clock selected by the controller, for synchronizing with frequency in response to the command from the controller; a oscillator for oscillating at the synchronized frequency with the dual phase-locked loop; and a radio frequency part for receiving the quick paging message over a forward quick paging channel synchronously with the oscillating frequencies.

Abstract: Disclosed is a sheet for forming metal wires and method of forming the metal wires using the same. A plate for forming the metal wires having an engraved pattern for forming a plurality of trenches and an engraved pattern for forming a plurality of via holes. An insulating film pattern in which the trenches and the via holes are shaped is obtained using the plate. Also, a metal is buried into the trenches and the via holes by means of a damascene process to form upper metal wires electrically connected to lower metal wires. In the present invention, photolithography and etch processes are not employed. For this reason, reduction in the yield and reliability due to defects occurring in the photolithography and etch processes is prevented. Furthermore, the process steps are reduced to reduce the production cost and to improve productivity.