Abstract: An auto-precharge control circuit in a semiconductor memory and method thereof, where the auto-precharge starting point may vary. The auto-precharge starting point may vary in response to at least one control signal. The auto-precharge starting point may vary in accordance with frequency and/or latency information. The auto-precharge starting point may vary in response to at least one control signal including clock frequency information. The auto-precharge starting point may vary depending on a latency signal received from a mode register setting command.

Abstract: An apparatus and method for receiving a quick paging message in a mobile station wherein a controller for synchronizing with a second clock in a predetermined time slot and transmitting a command for obtaining a synchronization at a frequency of receiving the quick paging message where the MS selects a clock having a first period as an operation clock under the second mode and under the first mode, selects a clock having a second period earlier than the first period; a dual phase-locked loop operating in response to the clock selected by the controller, for synchronizing with frequency in response to the command from the controller; a oscillator for oscillating at the synchronized frequency with the dual phase-locked loop; and a radio frequency part for receiving the quick paging message over a forward quick paging channel synchronously with the oscillating frequencies.

Abstract: A method for fabricating silicon-on-insulator (SOI) wafers which is capable of simplifying the fabrication process while improving the productivity of SOI wafers. In accordance with this method, a first wafer formed with a thermal oxide film is bonded to a second wafer formed with an oxygen ion-implanted region and a hydrogen ion-implanted region. The bonded wafer structure is annealed and then cut along the hydrogen ion-implanted region, so that it is divided into two wafer structures. The wafer structure including the first wafer is annealed to obtain a strengthened chemical coupling property. The wafer structure including the second wafer is annealed to oxidize the oxygen ion-implanted region of the second wafer, thereby forming an oxide film in the second wafer. The first and second wafers are then planarized, thereby forming a pair of SOI wafers.

Abstract: A method for forming an interlayer insulating film, which involves a first oxide film deposition, a GeBPSG film deposition, a thermal treatment and a second oxide film deposition all being carried out in a continuous manner in an LPCVD device. In accordance with this method, it is possible to form an interlayer insulating film having a superior planarization characteristic in a single pass. The deposition and thermal treatment of the interlayer insulating film are carried out in a continuous manner in a single processing device. Accordingly, it is possible to effectively suppress the degradation of the GeBPSG film caused by a moisture absorption. Since a protective oxide film is deposited over the GeBPSG film in a continuous manner after the thermal treatment of the GeBPSG film, the degradation of the GeBPSG film caused by the moisture absorption can be affectively suppressed.

Abstract: A method for forming contact holes of a semiconductor device, capable of preventing a photoresist film pattern used as a contact hole mask separating from a boro-phospho silicate glass (BPSG) film disposed of beneath the photoresist film pattern due to an over-etching of the BPSG film occurring when the BPSG film is wet etched. The method includes sequentially laminating a thin insulating film and a planarizing BPSG film over a semiconductor substrate, thermally treating the BPSG film at a temperature ranging from 80.degree. C. to 350.degree. C. and depositing a photoresist film over the BPSG film in a continuous manner with the same equipment used in the thermal treatment, removing a desired portion of the photoresist film, thereby forming a photoresist film pattern, wet etching an exposed portion of the BPSG film not covered with the photoresist film pattern to a desired depth, and dry etching the remaining BPSG film along with the insulating film, thereby forming contact holes.