Patents by Inventor Satoshi Aida

Satoshi Aida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090302376
    Abstract: A semiconductor device includes: a first semiconductor layer of a first conductivity type having a first surface and a second surface opposite to the first surface, a cell region, and a terminal region surrounding the cell region, the cell region being configured to allow a current to flow between the first surface and the second surface; a first guard ring layer of a second conductivity type selectively formed in a surface portion of the first semiconductor layer in the terminal region, the first guard ring layer having a bottom surface thereof and internal and external side surfaces thereof; and a second guard ring layer of the second conductivity type selectively formed in the surface portion of the first semiconductor layer in the terminal region so as to cover a portion of the first guard ring layer at which the bottom surface and the external side surface intersect.
    Type: Application
    Filed: May 28, 2009
    Publication date: December 10, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naoyuki INOUE, Wataru SAITO, Satoshi AIDA, Masakatsu TAKASHITA, Koichi ARATANI
  • Publication number: 20090233915
    Abstract: An objective of the present invention is to provide compounds that exhibit strong MEK-inhibiting activity and are stable in vivo and soluble in water, which can be used as preventive or therapeutic agents for proliferative diseases. The compounds of the present invention and pharmaceutically acceptable salts thereof are represented by the following formula (1): [where R1, R2, R3, R4, and X are the same as defined in the present patent application].
    Type: Application
    Filed: July 26, 2005
    Publication date: September 17, 2009
    Inventors: Yoshiaki Isshiki, Yasunori Kohchi, Eisaku Mizuguchi, Hitoshi Iikura, Yasuaki Matsubara, Shinji Tsujii, Nobuo Shimma, Masanori Miwa, Satoshi Aida, Masami Kohchi, Takeshi Murata, Kosuke Aso
  • Patent number: 7564107
    Abstract: A semiconductor device is disclosed, which comprises a terminal section formed to surround a device active region. The terminal section includes a trench formed in the semiconductor layer, and a filler filled in the trench. A field plate is extended to above the trench from an electrode of the semiconductor element formed in the device active region.
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: July 21, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Yanagisawa, Satoshi Aida, Shigeo Kouzuki, Hironori Yoshioka, Ichiro Omura, Wataru Saito
  • Publication number: 20090075433
    Abstract: A semiconductor device including a drift layer of a first conductivity type formed on a surface of a semiconductor substrate. A surface of the drift layer has a second area positioned on an outer periphery of a first area. A cell portion formed in the first area includes a first base layer of a second conductivity type, a source layer and a control electrode formed in the first base layer and the source layer. The device also includes a terminating portion formed in the drift layer including a second base layer of a second conductivity type, an impurity diffused layer of a second conductivity type, and a metallic compound whose end surface on the terminating portion side is positioned on the cell portion side away from the end surface of the impurity diffused layer on the terminal portion side.
    Type: Application
    Filed: November 14, 2008
    Publication date: March 19, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi Aida, Shigeo Kouzuki, Masaru Izumisawa, Hironori Yoshioka
  • Patent number: 7462541
    Abstract: A semiconductor device including a drift layer of a first conductivity type formed on a surface of a semiconductor substrate. A surface of the drift layer has a second area positioned on an outer periphery of a first area. A cell portion formed in the first area includes a first base layer of a second conductivity type, a source layer and a control electrode formed in the first base layer and the source layer. The device also includes a terminating portion formed in the drift layer including a second base layer of a second conductivity type, an impurity diffused layer of a second conductivity type, and a metallic compound whose end surface on the terminating portion side is positioned on the cell portion side away from the end surface of the impurity diffused layer on the terminating portion side.
    Type: Grant
    Filed: October 17, 2005
    Date of Patent: December 9, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Aida, Shigeo Kouzuki, Masaru Izumisawa, Hironori Yoshioka
  • Patent number: 7439605
    Abstract: A semiconductor device include a plurality of active element cells including first element regions of a first conductivity type and second element regions of a second conductivity type, the second element regions disposed between the first element regions; and isolation regions disposed between the active element cells so as to isolate the active element cells from each other, the isolation regions being filled with a plurality of semi-insulating particles including granular insulators covered by semiconductor films.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: October 21, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hitoshi Kobayashi, Tomoki Inoue, Satoshi Aida, Yasushi Takahashi
  • Patent number: 7423315
    Abstract: The present application provides a semiconductor device including a first-conductivity type semiconductor substrate, a pillar structure portion formed on the first-conductivity type semiconductor substrate and formed of five semiconductor pillar layers arranged in one direction parallel to a main surface of the first-conductivity type semiconductor substrate, and isolation insulating portions formed on the first-conductivity type semiconductor substrate and sandwiching the pillar structure portion between the isolation insulating portions, wherein the pillar structure portion is formed of a first first-conductivity type pillar layer, a second first-conductivity type pillar layer and a third first-conductivity type pillar layer which sandwich the first first-conductivity type pillar layer, a first second-conductivity type pillar layer provided between the first first-conductivity type pillar layer and the second first-conductivity type pillar layer, and a second second-conductivity type pillar layer provided b
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: September 9, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideki Okumura, Hitoshi Kobayashi, Masanobu Tsuchitani, Satoshi Aida, Shigeo Kouzuki, Masaru Izumisawa, Satoshi Taji, Kenichi Tokano
  • Patent number: 7341900
    Abstract: A semiconductor device according to an embodiment of the present invention has a gate electrode which is formed on a semiconductor substrate via a gate insulating film, and which has a slit portion; side wall films formed at both side faces of the gate electrode and at side walls of the slit portion, and which fill an interior of the slit portion and cover the gate insulating film directly beneath the slit portion; and an interlayer insulating film formed to cover the gate electrode and the side wall films.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: March 11, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuya Nakayama, Satoshi Aida, Shigeo Kouzuki, Masaru Izumisawa
  • Publication number: 20070234206
    Abstract: In a state in which an operation screen for operating a frame in a frame page has been displayed, whether a change occurring to a frame in the page different from the currently displayed frame is a change arising from an operation satisfying a condition that is regarded to represent a user's explicit intention to view the different frame or not is judged. If the change is judged by the judgment to be a change arising from an operation satisfying the condition, the display is shifted to a screen showing the page in whole display and notifying the user of the frame to which the change has occurred.
    Type: Application
    Filed: April 27, 2005
    Publication date: October 4, 2007
    Applicant: Access Co., Ltd.
    Inventors: Shinji Yamabuchi, Takuya Harakawa, Michimasa Uematsu, Shunji Ito, Koji Matsuzawa, Satoshi Aida, Masayuki Nagamachi
  • Patent number: 7262477
    Abstract: There is provided a semiconductor device including a semiconductor substrate with a trench, and a particulate insulating layer filling at least a lower portion of the trench and containing insulating particles. The semiconductor device may further include a reflowable dielectric layer covering an upper surface of the particulate insulating layer, the insulating particles being stable at the melting point or the softening point of the reflowable dielectric layer.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: August 28, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideki Okumura, Hitoshi Kobayashi, Masanobu Tsuchitani, Akihiro Osawa, Satoshi Aida, Shigeo Kouzuki, Masaru Izumisawa
  • Patent number: 7259426
    Abstract: There is provided a power MISFET which includes a semiconductor region of a first conductivity, a semiconductor base region of a second conductivity, a pillar region, a first major electrode region of a first conductivity on the base region, a second major electrode region connected with at least the semiconductor region and a part of the pillar region, a control electrode and an electrode pad connected with the control electrode. The pillar region including a first region of a first conductivity type and a second region of a second conductivity type is not formed under the electrode pad. Also, a method for manufacturing a MISFET is provided.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: August 21, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Aida, Shigeo Kouzuki, Satoshi Yanagisawa, Masaru Izumisawa, Hironori Yoshioka
  • Patent number: 7253507
    Abstract: A semiconductor device comprises a semiconductor element and a conductive member. The semiconductor element has a semiconductor substrate having first and second major surfaces; a semiconductor layer formed on the first major surface of the semiconductor substrate; a plurality of trenches formed on the semiconductor layer, the trenches being parallel to each other and extending to a first direction; filling material filling the trenches; a first electrode pad provided on the semiconductor layer and connected electrically to a first major electrode; a second major electrode provided on the second major surface; and a gate electrode pad provided on the semiconductor layer and connected to a gate electrode which controls conduction between the first major electrode and the second major electrode. The conductive member is connected to at least one of the first electrode pad and the gate electrode pad via a first contact area.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: August 7, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeo Kouzuki, Satoshi Aida, Satoshi Yanagisawa, Masaru Izumisawa, Hironori Yoshioka
  • Publication number: 20060197151
    Abstract: A semiconductor device include a plurality of active element cells including first element regions of a first conductivity type and second element regions of a second conductivity type, the second element regions disposed between the first element regions; and isolation regions disposed between the active element cells so as to isolate the active element cells from each other, the isolation regions being filled with a plurality of semi-insulating particles including granular insulators covered by semiconductor films.
    Type: Application
    Filed: April 29, 2005
    Publication date: September 7, 2006
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hitoshi Kobayashi, Tomoki Inoue, Satoshi Aida, Yasushi Takahashi
  • Publication number: 20060108600
    Abstract: The present application provides a semiconductor device including a first-conductivity type semiconductor substrate, a pillar structure portion formed on the first-conductivity type semiconductor substrate and formed of five semiconductor pillar layers arranged in one direction parallel to a main surface of the first-conductivity type semiconductor substrate, and isolation insulating portions formed on the first-conductivity type semiconductor substrate and sandwiching the pillar structure portion between the isolation insulating portions, wherein the pillar structure portion is formed of a first first-conductivity type pillar layer, a second first-conductivity type pillar layer and a third first-conductivity type pillar layer which sandwich the first first-conductivity type pillar layer, a first second-conductivity type pillar layer provided between the first first-conductivity type pillar layer and the second first-conductivity type pillar layer, and a second second-conductivity type pillar layer provided b
    Type: Application
    Filed: November 3, 2005
    Publication date: May 25, 2006
    Inventors: Hideki Okumura, Hitoshi Kobayashi, Masanobu Tsuchitani, Satoshi Aida, Shigeo Kouzuki, Masaru Izumisawa, Satoshi Taji, Kenichi Tokano
  • Publication number: 20060097313
    Abstract: A semiconductor device comprises a semiconductor layer of a first conductivity type; a first semiconductor pillar layer of the first conductivity type provided on a major surface of the semiconductor layer; a second semiconductor pillar layer of a second conductivity type provided adjacent to the first semiconductor pillar layer; a semiconductor region of the first conductivity type provided between the semiconductor layer and the second semiconductor pillar layer, the semiconductor region having a lower impurity concentration than the semiconductor layer; a semiconductor base layer of the second conductivity type provided on the second semiconductor pillar layer; a semiconductor source region of the first conductivity type selectively provided in the surface of the semiconductor base layer; a gate insulating film provided on the semiconductor base layer between the semiconductor source region and the first semiconductor pillar layer; and a gate electrode provided on the gate insulating film.
    Type: Application
    Filed: February 22, 2005
    Publication date: May 11, 2006
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi Yanagisawa, Satoshi Aida, Shigeo Kouzuki, Masaru Izumisawa, Hironori Yoshioka
  • Patent number: 7034346
    Abstract: A semiconductor device according to an embodiment of the present invention has a gate electrode which is formed on a semiconductor substrate via a gate insulating film, and which has a slit portion; side wall films formed at both side faces of the gate electrode and at side walls of the slit portion, and which fill an interior of the slit portion and cover the gate insulating film directly beneath the slit portion; and an interlayer insulating film formed to cover the gate electrode and the side wall films.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: April 25, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuya Nakayama, Satoshi Aida, Shigeo Kouzuki, Masaru Izumisawa
  • Publication number: 20060081903
    Abstract: An n channel type power MOS field effect transistor has silica particles buried in a bottom portion of a trench and a gate electrode buried in another portion of the trench. The gate electrode is in contact with the silica particles. A gap of the silica particles is not filled with the gate electrode.
    Type: Application
    Filed: October 14, 2005
    Publication date: April 20, 2006
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tomoki Inoue, Satoshi Aida, Yasushi Takahashi, Hitoshi Kobayashi
  • Publication number: 20060049459
    Abstract: A semiconductor device includes: a semiconductor substrate of a first conductivity type; a drift layer of a first conductivity type formed on a first main surface of the semiconductor substrate, a surface of the drift layer having a first area and a second area which is positioned on an outer periphery of the first area; a cell portion which is formed in the first area of the drift layer and includes a first base layer of a second conductivity type selectively formed in a surface layer of the first area, a source layer of a first conductivity type selectively formed in a surface layer of the first base layer, a first metallic compound which is formed on the surface layer of the first base layer and a surface layer of the source layer in common, and a control electrode which is formed in the first base layer and the source layer via a first insulating film and has a second metallic compound formed on a top surface thereof; a terminating portion which is formed in the second area of the drift layer, alleviates
    Type: Application
    Filed: October 17, 2005
    Publication date: March 9, 2006
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi Aida, Shigeo Kouzuki, Masaru Izumisawa, Hironori Yoshioka
  • Publication number: 20060017096
    Abstract: A semiconductor device is disclosed, which comprises a terminal section formed to surround a device active region. The terminal section includes a trench formed in the semiconductor layer, and a filler filled in the trench. A field plate is extended to above the trench from an electrode of the semiconductor element formed in the device active region.
    Type: Application
    Filed: September 9, 2004
    Publication date: January 26, 2006
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi Yanagisawa, Satoshi Aida, Shigeo Kouzuki, Hironori Yoshioka, Ichiro Omura, Wataru Saito
  • Patent number: 6972460
    Abstract: A semiconductor device including a drift layer of a first conductivity type formed on a surface of a semiconductor substrate. A surface of the drift layer has a second area positioned on an outer periphery of a first area. A cell portion formed in the first area includes a first base layer of a second conductivity type, a source layer and a control electrode formed in the first base layer and the source layer. The device also includes a terminating portion formed in the drift layer including a second base layer of a second conductivity type, an impurity diffused layer of a second conductivity type, and a metallic compound whose end surface on the terminating portion side is positioned on the cell portion side away from the end surface of the impurity diffused layer on the terminal portion side.
    Type: Grant
    Filed: October 8, 2003
    Date of Patent: December 6, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Aida, Shigeo Kouzuki, Masaru Izumisawa, Hironori Yoshioka