Patents by Inventor Satoshi Inaba

Satoshi Inaba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240139277
    Abstract: There is provided a drug which exhibits preventive and therapeutic effects on virus infectious diseases by inhibiting virus-derived protease on the basis of various physiological activity actions of an active sulfur compound(s) which exists in living organisms.
    Type: Application
    Filed: May 19, 2021
    Publication date: May 2, 2024
    Inventors: Takaaki AKAIKE, Satoshi TAKAGI, Hisatoshi SUGIURA, Kenji INABA
  • Patent number: 11804766
    Abstract: A linear head module includes a plurality of linear units each having an output member, and a housing. The linear unit has a mover and a stator. The stator has an output-side bearing holder and a counter-output-side bearing holder. The housing has: a main body portion integrally including an output-side surface portion, a counter-output-side surface portion, and a coupling portion that couples the output-side surface portion and the counter-output-side surface portion; a flange facing the output-side surface portion; and a bracket facing the counter-output-side surface portion.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: October 31, 2023
    Assignee: SANYO DENKI CO., LTD.
    Inventors: Satoshi Inaba, Yuki Onda, Yasushi Misawa
  • Patent number: 11764660
    Abstract: A linear head module includes: a plurality of linear motors each including a mover having an output shaft portion; a plurality of detection portions each configured to detect a position of the respective output shaft portion in a direction of a thrust axis; a single circuit board provided with the plurality of detection portions; and a detected portion provided to the respective mover, the detected portion is fixed to the mover via a mounting base, and as viewed in the direction of the thrust axis, a direction in which the mounting base extends from the output shaft portion is different from a direction in which the output shaft portion and the circuit board face each other.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: September 19, 2023
    Assignee: SANYO DENKI CO., LTD.
    Inventors: Satoshi Inaba, Yuki Onda, Yasushi Misawa
  • Publication number: 20220399794
    Abstract: A linear head module includes: a plurality of linear motors each including a mover having an output shaft portion; a plurality of detection portions each configured to detect a position of the respective output shaft portion in a direction of a thrust axis; a single circuit board provided with the plurality of detection portions; and a detected portion provided to the respective mover, the detected portion is fixed to the mover via a mounting base, and as viewed in the direction of the thrust axis, a direction in which the mounting base extends from the output shaft portion is different from a direction in which the output shaft portion and the circuit board face each other.
    Type: Application
    Filed: June 10, 2022
    Publication date: December 15, 2022
    Inventors: Satoshi INABA, Yuki ONDA, Yasushi MISAWA
  • Publication number: 20220399793
    Abstract: A linear motor includes: a mover including an output shaft portion extending in a direction of a thrust axis; a detection portion configured to be capable of detecting a position of the output shaft portion in the direction of the thrust axis; and a detected portion fixed to the mover, the mover further includes: a mounting base to which the detected portion is attached; and a metal fastening member that fastens the mounting base to an end surface, on one side in the direction of the thrust axis, of the output shaft portion, and the mounting base includes: a metal fastened portion sandwiched between the end surface, on the one side in the direction of the thrust axis, of the output shaft portion, and the fastening member; and a resin mounting portion having a mounting surface to which the detected portion is attached, the mounting surface being provided at a position off the thrust axis.
    Type: Application
    Filed: May 18, 2022
    Publication date: December 15, 2022
    Inventors: Satoshi INABA, Yuki ONDA, Yasushi MISAWA
  • Publication number: 20220399792
    Abstract: A linear head module includes a plurality of linear units each having an output member, and a housing. The linear unit has a mover and a stator. The stator has an output-side bearing holder and a counter-output-side bearing holder. The housing has: a main body portion integrally including an output-side surface portion, a counter-output-side surface portion, and a coupling portion that couples the output-side surface portion and the counter-output-side surface portion; a flange facing the output-side surface portion; and a bracket facing the counter-output-side surface portion.
    Type: Application
    Filed: May 10, 2022
    Publication date: December 15, 2022
    Inventors: Satoshi INABA, Yuki ONDA, Yasushi MISAWA
  • Patent number: 10821835
    Abstract: A self-cooled reactor apparatus includes: a pair of frames attached to a vehicular mount, a coil disposed between the pair of frames and fixed to the frames, a cover disposed between the pair of frames, and a protective member. The coil is covered by the cover having at least a portion thereof in which through-holes are formed. The protective member, while retaining a flow passage for air from the through-holes to the coil, blocks a space between the through-hole and the coil in a penetration direction of the through-holes.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: November 3, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Satoshi Inaba, Yuki Ishimori
  • Patent number: 10311929
    Abstract: According to an embodiment, a resistance change memory includes a semiconductor substrate, a transistor having a control terminal, a first terminal and a second terminal, the transistor provided on the semiconductor substrate, an insulating layer covering the transistor, a first conductive line connected to the first terminal and provided on the insulating layer, a second conductive line provided on the insulating layer, and a resistance change element connected between the second terminal and the second conductive line. The first conductive line has a width greater than a width of the second conductive line in a direction in which the first and second conductive lines are arranged.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: June 4, 2019
    Assignees: TOSHIBA MEMORY CORPORATION, SK HYNIX INC.
    Inventors: Hisanori Aikawa, Tatsuya Kishi, Keisuke Nakatsuka, Satoshi Inaba, Masaru Toko, Keiji Hosotani, Jae Yun Yi, Hong Ju Suh, Se Dong Kim
  • Publication number: 20180268980
    Abstract: A self-cooled reactor apparatus includes: a pair of frames attached to a vehicular mount, a coil disposed between the pair of frames and fixed to the frames, a cover disposed between the pair of frames, and a protective member. The coil is covered by the cover having at least a portion thereof in which through-holes are formed. The protective member, while retaining a flow passage for air from the through-holes to the coil, blocks a space between the through-hole and the coil in a penetration direction of the through-holes.
    Type: Application
    Filed: October 9, 2015
    Publication date: September 20, 2018
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Satoshi INABA, Yuki ISHIMORI
  • Publication number: 20180102156
    Abstract: According to an embodiment, a resistance change memory includes a semiconductor substrate, a transistor having a control terminal, a first terminal and a second terminal, the transistor provided on the semiconductor substrate, an insulating layer covering the transistor, a first conductive line connected to the first terminal and provided on the insulating layer, a second conductive line provided on the insulating layer, and a resistance change element connected between the second terminal and the second conductive line. The first conductive line has a width greater than a width of the second conductive line in a direction in which the first and second conductive lines are arranged.
    Type: Application
    Filed: December 8, 2017
    Publication date: April 12, 2018
    Applicants: TOSHIBA MEMORY CORPORATION, SK HYNIX INC.
    Inventors: Hisanori AIKAWA, Tatsuya KISHI, Keisuke NAKATSUKA, Satoshi INABA, Masaru TOKO, Keiji HOSOTANI, Jae Yun YI, Hong Ju SUH, Se Dong KIM
  • Patent number: 9773838
    Abstract: According to one embodiment, there is provided a magnetoresistive memory device. The memory device includes active areas arranged on a semiconductor substrate, resistance change elements arrayed to matrix in an X direction and a Y direction above the substrate, and selective transistors provided to correspond to the respective resistance change elements. A plurality of gate electrodes of the selective transistors are spaced apart at regular intervals in the X direction and arranged along the Y direction. Each of the active areas is provided to cross two of the gate electrodes adjacent to each other, such as to be along the X direction at a portion crossing the gate electrodes, and formed to be inclined with respect to the X direction between the adjacent gate electrodes.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: September 26, 2017
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Satoshi Inaba
  • Patent number: 9542988
    Abstract: According to one embodiment, a semiconductor memory device includes a memory cell, a bit line connected to the memory cell, a sense circuit which senses data of the memory cell based on second current that flows through the memory cell and first current, a first transistor of a first conductivity type, which is connected to the bit line and through which the second current flows, and a second transistor of the first conductivity type, through which the first current flows.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: January 10, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Satoshi Inaba
  • Patent number: 9515183
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor substrate having a trench and including an active area including a channel area formed along an inner surface of the trench and source/drain areas formed at both ends of the channel area and sandwiching the trench, a gate insulating film formed on the inner surface of the trench, and a gate electrode formed in the trench in which the gate insulating film is provided. A main surface of the semiconductor substrate has {100} plane orientation, a portion of the channel area parallel to a side surface of the trench has {110} channel plane orientation and has <100> channel orientation in a channel length direction, and tensile stress in the channel length direction and compressive stress in a channel width direction are applied to the portion of the channel area parallel to the side surface of the trench.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: December 6, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Satoshi Inaba
  • Patent number: 9450059
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor substrate with a groove for forming an embedded gate therein, and a gate electrode embedded via a gate insulator film in the groove. A portion of the semiconductor substrate near the gate electrode is doped with a chemical element which is inactive in the semiconductor substrate.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: September 20, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Satoshi Inaba
  • Publication number: 20160268432
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor substrate having a trench and including an active area including a channel area formed along an inner surface of the trench and source/drain areas formed at both ends of the channel area and sandwiching the trench, a gate insulating film formed on the inner surface of the trench, and a gate electrode formed in the trench in which the gate insulating film is provided. A main surface of the semiconductor substrate has {100} plane orientation, a portion of the channel area parallel to a side surface of the trench has {110} channel plane orientation and has <100> channel orientation in a channel length direction, and tensile stress in the channel length direction and compressive stress in a channel width direction are applied to the portion of the channel area parallel to the side surface of the trench.
    Type: Application
    Filed: September 2, 2015
    Publication date: September 15, 2016
    Inventor: Satoshi INABA
  • Publication number: 20160071907
    Abstract: According to one embodiment, there is provided a magnetoresistive memory device. The memory device includes active areas arranged on a semiconductor substrate, resistance change elements arrayed to matrix in an X direction and a Y direction above the substrate, and selective transistors provided to correspond to the respective resistance change elements. A plurality of gate electrodes of the selective transistors are spaced apart at regular intervals in the X direction and arranged along the Y direction. Each of the active areas is provided to cross two of the gate electrodes adjacent to each other, such as to be along the X direction at a portion crossing the gate electrodes, and formed to be inclined with respect to the X direction between the adjacent gate electrodes.
    Type: Application
    Filed: March 10, 2015
    Publication date: March 10, 2016
    Inventor: Satoshi INABA
  • Publication number: 20150263067
    Abstract: According to one embodiment, there is provided a semiconductor device, including a semiconductor substrate, a first semiconductor layer formed on a main surface of the semiconductor substrate, the first semiconductor layer containing carbon, a second semiconductor layer formed on the first semiconductor layer, the second semiconductor layer having impurities diffused, a groove part arranged so as to pass through the second semiconductor layer, and a gate electrode embedded in the groove part via a gate insulating film.
    Type: Application
    Filed: August 6, 2014
    Publication date: September 17, 2015
    Inventor: Satoshi INABA
  • Publication number: 20150069317
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor substrate with a groove for forming an embedded gate therein, and a gate electrode embedded via a gate insulator film in the groove. A portion of the semiconductor substrate near the gate electrode is doped with a chemical element which is inactive in the semiconductor substrate.
    Type: Application
    Filed: January 21, 2014
    Publication date: March 12, 2015
    Inventor: Satoshi INABA
  • Patent number: 8569867
    Abstract: According to one embodiment, a semiconductor device that has a rectification element includes a semiconductor substrate, a first well region of a first conductivity type formed on the semiconductor substrate, a second well region of a second conductivity type formed on the semiconductor substrate, and a plurality of fins arranged over the first well region and the second well region at a first pitch in the same direction. In the semiconductor device, the rectification element includes a cathode region, an anode region, a well contact region, and a trigger region that are configured using fins. These regions are connected to each wiring portion to form a PNP-type bipolar transistor and an NPN-type bipolar transistor.
    Type: Grant
    Filed: February 2, 2012
    Date of Patent: October 29, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Satoshi Inaba
  • Patent number: 8481908
    Abstract: According to one embodiments, a transparent reference electrode is provided to be sandwiched between a red-detecting photoelectric conversion film and a green-detecting photoelectric conversion film, a first transparent driving electrode is provided to face the transparent reference electrode with the green-detecting photoelectric conversion film therebetween, a second transparent driving electrode is provided to face the transparent reference electrode with the red-detecting photoelectric conversion film therebetween, and a blue-detecting photoelectric conversion film is provided below the red-detecting photoelectric conversion film and performs blue detection.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: July 9, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Satoshi Inaba