Patents by Inventor Scott Bell
Scott Bell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9233783Abstract: A stored liquid dispensing applicator includes a valving arrangement formed of a valve seat and a spring-driven shuttle that is disposed for axial displacement into and out of valve-defining abutment and engagement with the valve seat. The shuttle is displaceable between distal and proximal limits of travel that include a first position defining the distal limit and a second position proximally spaced from the distal limit and distally spaced from the proximal limit. The valve seat is arranged for contact with the shuttle uninterruptedly between the first and second positions to close the valve, and for spaced apart relation with the shuttle between the second position and the proximal limit of travel to open the valve for dispensing of stored liquid.Type: GrantFiled: September 22, 2014Date of Patent: January 12, 2016Assignee: Dab-O-Matic Holdings CompanyInventors: James Bell, Scott Bell
-
Publication number: 20150187891Abstract: A semiconductor device having a gate stack on a substrate is disclosed. The gate stack may include a mask layer disposed over a first gate conductor layer. The first gate conductor layer may be laterally etched beneath the mask layer to create an overhanging portion of the mask layer. A sidewall dielectric can be formed on the sidewall of the first gate conductor layer beneath the overhanging portion of the mask layer. A sidewall structure layer can be formed adjacent to the sidewall dielectric and beneath the overhanging portion of the mask layer. The mask layer can be removed. The first gate conductor layer can be used to form a memory gate and the sidewall structure layer can be used to form a select gate.Type: ApplicationFiled: December 30, 2013Publication date: July 2, 2015Applicant: Spansion LLCInventors: Rinji SUGINO, Scott BELL, Chun CHEN, Shenging FANG
-
Publication number: 20150144658Abstract: A stored liquid dispensing applicator includes a valving arrangement formed of a valve seat and a spring-driven shuttle that is disposed for axial displacement into and out of valve-defining abutment and engagement with the valve seat. The shuttle is displaceable between distal and proximal limits of travel that include a first position defining the distal limit and a second position proximally spaced from the distal limit and distally spaced from the proximal limit. The valve seat is arranged for contact with the shuttle uninterruptedly between the first and second positions to close the valve, and for spaced apart relation with the shuttle between the second position and the proximal limit of travel to open the valve for dispensing of stored liquid. The first position of the shuttle defines an enhanced second level seal, attainable only during manufacture of the device, that is especially resistant to unintended liquid flow or discharge between the valve seat and shuttle.Type: ApplicationFiled: September 22, 2014Publication date: May 28, 2015Inventors: James Bell, Scott Bell
-
Publication number: 20150102430Abstract: Disclosed herein is a semiconductor device comprising a first dielectric disposed over a channel region of a transistor formed in a substrate and a gate disposed over the first dielectric. The semiconductor device further includes a second dielectric disposed vertically, substantially perpendicular to the substrate, at an edge of the gate, and a spacer disposed proximate to the second dielectric. The spacer includes a cross-section with a perimeter that includes a top curved portion and a vertical portion substantially perpendicular to the substrate. The perimeter further includes a discontinuity at an interface of the top curved portion with the vertical portion. Further, disclosed herein are methods associated with the fabrication of the aforementioned semiconductor device.Type: ApplicationFiled: October 11, 2013Publication date: April 16, 2015Applicant: Spansion LLCInventors: Angela Tai Hui, Scott Bell, Shenqing Fang
-
Publication number: 20150102400Abstract: Disclosed herein is a semiconductor device including a first dielectric disposed over a channel region of a transistor formed in a substrate and a gate disposed over the first dielectric. The semiconductor device further includes a second dielectric disposed vertically, substantially perpendicular to the substrate, at an edge of the gate, and a spacer disposed proximate to the second dielectric. The spacer includes a cross-section with a perimeter that includes a top curved portion and a vertical portion that is substantially perpendicular to the substrate. Further, disclosed herein, are methods associated with the fabrication of the aforementioned semiconductor device.Type: ApplicationFiled: October 11, 2013Publication date: April 16, 2015Applicant: Spansion LLCInventors: Gong CHEN, Scott BELL
-
Patent number: 8901720Abstract: A method of forming multiple conductive structures in a semiconductor device includes forming spacers adjacent side surfaces of a mask, where the mask and the spacers are formed on a conductive layer. The method also includes etching at least one trench in a portion of the conductive layer not covered by the spacers or the mask. The method may further include depositing a material over the semiconductor device, removing the mask and etching the conductive layer to remove portions of the conductive layer not covered by the spacers or the material, where remaining portions of the conductive layer form the conductive structures.Type: GrantFiled: March 9, 2011Date of Patent: December 2, 2014Assignees: Advanced Micro Devices, Inc., Spansion LLCInventors: Michael Brennan, Scott Bell
-
Patent number: 8815727Abstract: A method for forming an integrated circuit system is provided including forming a semi-conducting layer over a substrate, forming a spacer stack having a gap filler adjacent to the semi-conducting layer and a inter-layer dielectric over the gap filler, forming a transition layer having a recess over the semi-conducting layer and adjacent to the spacer stack, and forming a metal layer in the recess.Type: GrantFiled: October 4, 2012Date of Patent: August 26, 2014Assignees: Advanced Micro Devices, Inc., Spansion LLCInventors: Angela T. Hui, Mark S. Chang, Kuo-Tung Chang, Scott A. Bell
-
Publication number: 20140193972Abstract: Methods and apparatus for manufacturing semiconductor devices, and such semiconductor devices, are described. According to various aspects of the disclosure, a semiconductor device can be manufactured by forming a core region of the semiconductor device and forming a periphery region of the semiconductor device. A first polysilicon region can then be formed over the core and periphery regions of the semiconductor device. A first mask is formed on the first poly silicon layer and a second polysilicon layer is disposed such that the second polysilicon layer covers the first mask. A second mask can then be formed on the second polysilicon layer. After forming the second mask, portions of the first and second polysilicon layers that are uncovered by either the first or second masks are removed.Type: ApplicationFiled: January 7, 2013Publication date: July 10, 2014Applicant: Spansion LLCInventors: Scott A. BELL, Angela Tai HUI, Simon S. CHAN
-
Patent number: 8629535Abstract: A method of forming an integrated circuit includes providing a buffer layer comprising a dielectric material above a layer of conductive material and providing a layer of mask material above the buffer layer. The mask material comprises amorphous carbon. The method also includes removing a portion of the buffer layer and the layer of mask material to form a mask. A feature is formed in the layer of conductive material according to the mask.Type: GrantFiled: September 23, 2011Date of Patent: January 14, 2014Assignee: GlobalFoundries Inc.Inventors: Richard J. Huang, Scott A. Bell, Srikanteswara Dakshina-Murthy, Philip A. Fisher, Richard C. Nguyen, Cyrus E. Tabery, Lu You
-
Publication number: 20130250547Abstract: A lighting conversion apparatus provided which converts a recessed light into a non-recessed light. A threaded electrical contact is designed to screw into the existing socket of a recessed light. The threaded electrical contact is connected to a socket extension, which is in turn connected to a socket extension base. A canopy is attached to the socket extension base, and fixtures extend from the canopy. The socket extension and socket extension base may telescope allow for shortening of the distance between the canopy and the threaded electrical contact. When installed, the canopy may therefore rest flush with the ceiling surrounding the recessed light hole.Type: ApplicationFiled: April 30, 2012Publication date: September 26, 2013Applicant: BURNES BRIGHTER IDEAS, LLCInventors: Cheryl Engstrom, Scott Bell
-
Patent number: 8384146Abstract: Methods for fabricating a semiconductor memory cell that has a spacer layer are disclosed. A method includes forming a plurality of source/drain regions in a substrate where the plurality of source/drain regions are formed between trenches, forming a first oxide layer above the plurality of source/drain regions and in the trenches, forming a charge storage layer above the oxide layer and separating the charge storage layer in the trenches where a space is formed between separated portions of the charge storage layer. The method further includes forming a spacer layer to fill the space between the separated portions of the charge storage layer and to rise a predetermined distance above the space. A second oxide layer is formed above the charge storage layer and the spacer layer and a polysilicon layer is formed above the second oxide layer.Type: GrantFiled: March 23, 2012Date of Patent: February 26, 2013Assignee: Spansion LLCInventors: Shenqing Fang, Angela Hui, Gang Xue, Alexander Nickel, Kashmir Sahota, Scott Bell, Chun Chen, Wai Lo
-
Patent number: 8283718Abstract: A method for forming an integrated circuit system is provided including forming a semi-conducting layer over a substrate, forming a spacer stack having a gap filler adjacent to the semi-conducting layer and a inter-layer dielectric over the gap filler, forming a transition layer having a recess over the semi-conducting layer and adjacent to the spacer stack, and forming a metal layer in the recess.Type: GrantFiled: December 16, 2006Date of Patent: October 9, 2012Assignees: Spansion LLC, Advanced Micro Devices, Inc.Inventors: Angela T. Hui, Mark S. Chang, Kuo-Tung Chang, Scott A. Bell
-
Publication number: 20120181601Abstract: Methods for fabricating a semiconductor memory cell that has a spacer layer are disclosed. A method includes forming a plurality of source/drain regions in a substrate where the plurality of source/drain regions are formed between trenches, forming a first oxide layer above the plurality of source/drain regions and in the trenches, forming a charge storage layer above the oxide layer and separating the charge storage layer in the trenches where a space is formed between separated portions of the charge storage layer. The method further includes forming a spacer layer to fill the space between the separated portions of the charge storage layer and to rise a predetermined distance above the space. A second oxide layer is formed above the charge storage layer and the spacer layer and a polysilicon layer is formed above the second oxide layer.Type: ApplicationFiled: March 23, 2012Publication date: July 19, 2012Inventors: Shenqing FANG, Angela HUI, Gang XUE, Alexander NICKEL, Kashmir SAHOTA, Scott BELL, Chun CHEN, Wai LO
-
Patent number: 8202779Abstract: Methods for fabricating a semiconductor memory cell that has a spacer layer are disclosed. A method includes forming a plurality of source/drain regions in a substrate where the plurality of source/drain regions are formed between trenches, forming a first oxide layer above the plurality of source/drain regions and in the trenches, forming a charge storage layer above the oxide layer and separating the charge storage layer in the trenches where a space is formed between separated portions of the charge storage layer. The method further includes forming a spacer layer to fill the space between the separated portions of the charge storage layer and to rise a predetermined distance above the space. A second oxide layer is formed above the charge storage layer and the spacer layer and a polysilicon layer is formed above the second oxide layer.Type: GrantFiled: September 27, 2010Date of Patent: June 19, 2012Assignee: Spansion LLCInventors: Shenqing Fang, Angela Hui, Gang Xue, Alexander Nickel, Kashmir Sahota, Scott Bell, Chun Chen, Wai Lo
-
Publication number: 20120007221Abstract: A method of forming an integrated circuit includes providing a buffer layer comprising a dielectric material above a layer of conductive material and providing a layer of mask material above the buffer layer. The mask material comprises amorphous carbon. The method also includes removing a portion of the buffer layer and the layer of mask material to form a mask. A feature is formed in the layer of conductive material according to the mask.Type: ApplicationFiled: September 23, 2011Publication date: January 12, 2012Applicant: GLOBALFOUNDRIES Inc.Inventors: Richard J. Huang, Scott A. Bell, Srikanteswara Dakshina-Murthy, Philip A. Fisher, Richard C. Nguyen, Cyrus E. Tabery, Lu You
-
Publication number: 20110233647Abstract: Methods for fabricating a semiconductor memory cell that has a spacer layer are disclosed. A method includes forming a plurality of source/drain regions in a substrate where the plurality of source/drain regions are formed between trenches, forming a first oxide layer above the plurality of source/drain regions and in the trenches, forming a charge storage layer above the oxide layer and separating the charge storage layer in the trenches where a space is formed between separated portions of the charge storage layer. The method further includes forming a spacer layer to fill the space between the separated portions of the charge storage layer and to rise a predetermined distance above the space. A second oxide layer is formed above the charge storage layer and the spacer layer and a polysilicon layer is formed above the second oxide layer.Type: ApplicationFiled: September 27, 2010Publication date: September 29, 2011Inventors: Shenqing FANG, Angela HUI, Gang XUE, Alexander NICKEL, Kashmir SAHOTA, Scott BELL, Chun CHEN, Wai LO
-
Publication number: 20110156130Abstract: A method of forming multiple conductive structures in a semiconductor device includes forming spacers adjacent side surfaces of a mask, where the mask and the spacers are formed on a conductive layer. The method also includes etching at least one trench in a portion of the conductive layer not covered by the spacers or the mask. The method may further include depositing a material over the semiconductor device, removing the mask and etching the conductive layer to remove portions of the conductive layer not covered by the spacers or the material, where remaining portions of the conductive layer form the conductive structures.Type: ApplicationFiled: March 9, 2011Publication date: June 30, 2011Applicants: ADVANCED MICRO DEVICES, INC., SPANSION LLCInventors: Michael BRENNAN, Scott BELL
-
Patent number: 7928005Abstract: A method of forming multiple conductive structures in a semiconductor device includes forming spacers adjacent side surfaces of a mask, where the mask and the spacers are formed on a conductive layer. The method also includes etching at least one trench in a portion of the conductive layer not covered by the spacers or the mask. The method may further include depositing a material over the semiconductor device, removing the mask and etching the conductive layer to remove portions of the conductive layer not covered by the spacers or the material, where remaining portions of the conductive layer form the conductive structures.Type: GrantFiled: September 27, 2005Date of Patent: April 19, 2011Assignees: Advanced Micro Devices, Inc., Spansion LLCInventors: Michael Brennan, Scott Bell
-
Patent number: 7675104Abstract: An integrated circuit memory system that includes: providing a substrate; forming a silicon rich charge storage layer over the substrate; forming a first isolation trench through the silicon rich charge storage layer in a first direction; and forming a second isolation trench through the silicon rich charge storage layer in a second direction.Type: GrantFiled: July 31, 2006Date of Patent: March 9, 2010Assignees: Spansion LLC, Advanced Micro Devices, Inc.Inventors: Amol Ramesh Joshi, Harpreet Sachar, YouSeok Suh, Shenqing Fang, Chih-Yuh Yang, Lovejeet Singh, David H. Matsumoto, Hidehiko Shiraiwa, Kuo-Tung Chang, Scott A. Bell, Allison Holbrook, Satoshi Torii
-
Patent number: 7659166Abstract: Systems and methods are described that facilitate integrating ArF core patterning of floating gate structures in a flash memory device followed by KrF periphery gate patterning using a hard mask comprising a material such as amorphous carbon to facilitate core gate construction. The amorphous carbon hard mask can facilitate preparing such core gate structures while protecting periphery gate stacks such that the periphery stacks are ready for immediate KrF lithography upon completion of core gate formation without requiring additional resist deposition between core and periphery etches.Type: GrantFiled: April 11, 2007Date of Patent: February 9, 2010Assignee: GLOBALFOUNDRIES Inc.Inventors: Marina V. Plat, Scott A. Bell