Abstract: Various embodiments of the present disclosure are directed towards an image sensor including a first photodetector and a second photodetector each disposed within a semiconductor substrate. An isolation structure extends from a front-side surface of the semiconductor substrate to a back-side surface of the semiconductor substrate. The front-side surface is opposite the back-side surface and the isolation structure is laterally between the first and second photodetectors. A readout transistor is disposed on the front-side surface of the semiconductor substrate. A first side of the readout transistor overlies the first photodetector and a second side of the readout transistor overlies the second photodetector. The first side is opposite the second side and the readout transistor continuously extends over the isolation structure.

Abstract: The present disclosure relates to a CMOS image sensor having a pixel device on a deep trench isolation (DTI) structure, and an associated method of formation. In some embodiments, the DTI structure is disposed at a peripheral of a pixel region, extending from a back-side of the substrate to a position within the substrate. A pixel device is disposed at the front-side of the substrate directly overlying the DTI structure. The pixel device comprises a pair of source/drain regions disposed within the substrate and reaching on a top surface of the DTI structure. A second trench isolation structure is disposed from the front-side at an inner peripheral of the first trench isolation structure. The first trench isolation structure has a top surfaces locating at a position of the substrate vertically exceeding bottom surfaces of the second trench isolation structure.

Abstract: The present disclosure relates to a CMOS image sensor having a doped isolation structure separating a photodiode and a pixel device, and an associated method of formation. In some embodiments, the CMOS image sensor has a vertical transfer gate extending vertically from a front-side of a substrate to a first position within the substrate and a photodiode doped region disposed under and extending laterally toward one side of the vertical transfer gate. A doped lateral isolation region disposed along a top surface of the photodiode doped region, and a doped vertical isolation region disposed along a sidewall of the vertical transfer gate. A doped pixel device well is vertically above the doped lateral isolation region and separated from the vertical transfer gate by the doped vertical isolation region. A pixel device is disposed within the doped pixel device well at the front-side of the substrate.

Abstract: An image sensor semiconductor device includes a first photodiode disposed in a semiconductor substrate and configured to generate charges in response to radiation, a first transistor disposed adjacent to the first photodiode, a floating diffusion region configured to store the generated charges, a reset transistor configured to reset the floating diffusion region, and a second transistor disposed over the substrate between the first photodiode and the reset transistor. The first transistor and the second transistor are configured to generate a first electric field and a second electric field, respectively, to move the charges generated by the first photodiode to the floating diffusion region.

Abstract: The present disclosure relates to a CMOS image sensor having a doped isolation structure separating a photodiode and a pixel device, and an associated method of formation. In some embodiments, the CMOS image sensor has a doped isolation structure separating a photodiode and a pixel device. The photodiode is arranged within the substrate away from a front-side of the substrate. A pixel device is disposed at the front-side of the substrate overlying the photodiode and is separated from the photodiode by the doped isolation structure. Comparing to previous image sensor designs, where an upper portion of the photodiode is commonly arranged at a top surface of a front-side of the substrate, now the photodiode is arranged away from the top surface and leaves more room for pixel devices. Thus, a larger pixel device can be arranged in the sensing pixel, and short channel effect and noise level can be improved.

Abstract: Provided is a method for producing a polyisoprenoid, which can increase natural rubber production by enhancing the rubber synthesis activity of rubber particles. The present invention provides methods for producing a polyisoprenoid using a gene coding for a cis-prenyltransferase (CPT) family protein, a gene coding for a Nogo-B receptor (NgBR) family protein and a gene coding for a rubber elongation factor (REF) family protein, specifically a method for producing a polyisoprenoid in vitro using rubber particles bound to proteins coded for by these genes, and a method for producing a polyisoprenoid in vivo using a recombinant organism (plant) having these genes introduced therein.

Abstract: A technique of performing anonymization without impairing usefulness of data. An anonymization apparatus includes an overlapping exclusion part configured to generate a partial table of M×L including L records of a table to be anonymized which have sets of values of p master attributes different from each other, from the table to be anonymized of M×N, where M is the number of attributes, N is the number of records, p is the number of master attributes, and L is the number of sets of values of p master attributes which are different from each other, an anonymization part configured to generate an anonymized partial table of M×L from the partial table by anonymizing the p master attributes in the partial table, and an overlapping restoration part configured to generate an anonymized table of M×N.

Abstract: A technique of calculating evaluation values regarding anonymity for a table obtained by anonymizing an arbitrary table is provided. An anonymity evaluation apparatus includes an evaluation target table generation part configured to generate a first evaluation target table of p×L including L records which are sets of values of p master attributes different from each other from a table to be anonymized of M×N and generate a second evaluation target table of p×L by anonymizing the p master attributes in the first evaluation target table from an anonymized table of M×N by anonymizing the p master attributes in the table to be anonymized, where M is the number of attributes, N is the number of records, p is the number of master attributes, and L is the number of sets of values of p master attributes which are different from each other.

Abstract: The present invention aims to provide a method for producing a trans-polyisoprenoid which can increase trans rubber production. The present invention is directed to a method for producing a trans-polyisoprenoid in vitro, which involves the use of a gene coding for a trans-prenyltransferase (tPT) family protein and further involves the use of rubber particles bound to a protein encoded by the gene, or a method for producing a trans-polyisoprenoid, which includes introducing into a plant a vector including a promotor having a promoter activity that drives laticifer-specific gene expression and a gene coding for a tPT family protein linked to the promotor to express a protein encoded by the gene specifically in laticifers.

Abstract: A voltage supply system and a power source that, in a voltage supply system in which a plurality of power sources (e.g., DC-DC converters) are connected in parallel, enable each power source to be set at a desired load ratio. The power source is used in a voltage supply system including a power source configured to output a voltage in a constant voltage mode on the basis of a first target voltage, and is connected in parallel to the constant voltage power source, the power source including a voltage generation unit configured to output a voltage switchably between a constant voltage mode based on a second target voltage greater than the first target voltage and a constant current mode based on a current limit value.

Abstract: The present invention aims to provide a method for producing a trans-polyisoprenoid which can increase trans rubber production. The present invention is directed to a method for producing a trans-polyisoprenoid in vitro, which involves the use of a gene coding for a trans-prenyltransferase (tPT) family protein and further involves the use of rubber particles bound to a protein encoded by the gene, or a method for producing a trans-polyisoprenoid, which includes introducing into a plant a vector including a promotor having a promoter activity that drives laticifer-specific gene expression and a gene coding for a tPT family protein linked to the promotor to express a protein encoded by the gene specifically in laticifers.

Abstract: A semiconductor device includes a source/drain diffusion area, a first doped region and a gate. The source/drain diffusion area, defined between a first isolation structure and a second isolation structure, includes a source region, a drain region and a device channel. The first doped region, disposed along a first junction between the device channel and the first isolation structure, is separated from at least one of the source region and the drain region. The first doped region has a dopant concentration higher than that of the device channel. The gate is disposed over the source/drain diffusion area. The first doped region is located within a projected area of the gate onto the source/drain diffusion area, the first isolation structure and the second isolation structure. A length of the first doped region is shorter than a length of the gate in a direction from the source region to the drain region.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming a pixel sensor. The method comprises forming a photodetector in a substrate. The substrate is patterned to define an opening above the photodetector. A gate electrode is formed within the opening, where the gate electrode has a top conductive body overlying a bottom conductive body. A first segment of a sidewall of the top conductive body contacts the bottom conductive body. A floating diffusion node is formed in the substrate laterally adjacent to the gate electrode. A second segment of the sidewall of the top conductive body overlies the floating diffusion node.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a dielectric structure disposed over a substrate. A plurality of conductive interconnect layers are disposed within the dielectric structure. The plurality of conductive interconnect layers include alternating layers of interconnect wires and interconnect vias. A metal-insulating-metal (MIM) capacitor is arranged within the dielectric structure. The MIM capacitor has a lower conductive electrode separated from an upper conductive electrode by a capacitor dielectric structure. The MIM capacitor vertically extends past two or more of the plurality of conductive interconnect layers.

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

Abstract: A semiconductor device comprises a source/drain diffusion area, and a first doped region. The source/drain diffusion area is defined between a first isolation structure and a second isolation structure. The source/drain diffusion area includes a source region, a drain region, and a device channel. The device channel is between the source region and the drain region. The first doped region is disposed along a first junction between the device channel and the first isolation structure in a direction from the source region to the drain region. The first doped region is separated from at least one of the source region and the drain region, and has a dopant concentration higher than that of the device channel. The semiconductor device of the present disclosure has low random telegraph signal noise and fewer defects.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor including a photodetector disposed in a semiconductor substrate. A floating diffusion node is disposed in the semiconductor substrate and is above the photodetector. A transfer gate electrode overlies the photodetector. The transfer gate electrode has a top conductive body overlying a top surface of the semiconductor substrate and a bottom conductive body extending from the top conductive body to below the floating diffusion node. A portion of the top conductive body directly overlies the floating diffusion node. A first sidewall of the top conductive body directly overlies the bottom conductive body.

Abstract: Provided is a vehicle-mounted power supply device detecting connection with an external power source and charging a power storage unit by stepping up a supply voltage based on the external power source. A vehicle-mounted power supply device includes an external terminal to which a power supply path from an external power source is connectable, a detection unit detects that the power supply path is connected to the external terminal, and a power supply circuit unit allows for flow of a current from the external terminal side toward the second conduction path side at least when the power supply path is connected to the external terminal. The control unit controls a step-down operation and a step-up operation of the voltage conversion unit, and causes the voltage conversion unit to perform the step-up operation when connection between the external terminal and the power supply path is detected by the detection unit.

Abstract: An image sensor semiconductor device includes a first photodiode disposed in a semiconductor substrate and configured to generate charges in response to radiation, a first transistor disposed adjacent to the first photodiode, a floating diffusion region configured to store the generated charges, a reset transistor configured to reset the floating diffusion region, and a second transistor disposed over the substrate between the first photodiode and the reset transistor. The first transistor and the second transistor are configured to generate a first electric field and a second electric field, respectively, to move the charges generated by the first photodiode to the floating diffusion region.

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.