Abstract: The present disclosure relates to a CMOS image sensor having a doped isolation structure separating a photodiode and a pixel device, and an associated method of formation. In some embodiments, the CMOS image sensor has a doped isolation structure separating a photodiode and a pixel device. The photodiode is arranged within the substrate away from a front-side of the substrate. A pixel device is disposed at the front-side of the substrate overlying the photodiode and is separated from the photodiode by the doped isolation structure. Comparing to previous image sensor designs, where an upper portion of the photodiode is commonly arranged at a top surface of a front-side of the substrate, now the photodiode is arranged away from the top surface and leaves more room for pixel devices. Thus, a larger pixel device can be arranged in the sensing pixel, and short channel effect and noise level can be improved.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor including a first photodetector and a second photodetector each disposed within a semiconductor substrate. An isolation structure extends from a front-side surface of the semiconductor substrate to a back-side surface of the semiconductor substrate. The front-side surface is opposite the back-side surface and the isolation structure is laterally between the first and second photodetectors. A readout transistor is disposed on the front-side surface of the semiconductor substrate. A first side of the readout transistor overlies the first photodetector and a second side of the readout transistor overlies the second photodetector. The first side is opposite the second side and the readout transistor continuously extends over the isolation structure.

Abstract: An image sensor semiconductor device includes a semiconductor substrate and a first photodiode disposed in the semiconductor substrate and configured to generate charges in response to radiation. The image sensor semiconductor device also includes a first transistor disposed adjacent to the first photodiode, and a second transistor disposed over the first photodiode, wherein the first transistor and the second transistor are configured to generate at least one electric field to move the charges generated by the first photodiode. The image sensor device further includes a floating diffusion region configured to store the moved charges.

Abstract: The present invention provides a method for producing a polyisoprenoid with which it is possible to enhance the rubber synthesis activity of rubber particles to increase natural rubber production. The present invention relates to a method for producing a polyisoprenoid in vitro, which involves the use of a gene coding for a cis-prenyltransferase (CPT) family protein and a gene coding for a Nogo-B receptor (NgBR) family protein, and further involves the use of rubber particles bound to proteins encoded by these genes; or a method for producing a polyisoprenoid, which includes introducing into a plant a vector in which a promoter having a promoter activity that drives laticifer-specific gene expression is linked to a gene coding for a CPT family protein and a gene coding for a NgBR family protein, to express proteins encoded by the genes specifically in laticifers.

Abstract: An in-vehicle power supply device includes a first voltage conversion unit for performing at least a step-down operation to lower a voltage applied to a first conductive path electrically connected to an in-vehicle power storage unit, and apply the lowered voltage to a second conductive path; a second voltage conversion unit for performing at least the step-down operation to lower a voltage applied to a first conductive path and apply the lowered voltage to a second conductive path, a second voltage conversion unit having a smaller power capacity than the first voltage conversion unit; a driving unit that drives the first voltage conversion unit and the second voltage conversion unit, and a capacitor that is electrically connected to the second conductive path and is charged with a current flowing through the second conductive path.

Abstract: The present invention provides a method for producing rubber particles bound to a membrane-associated protein by cell-free protein synthesis. The present invention relates to a method for producing rubber particles bound to a membrane-associated protein, the method including the step of performing protein synthesis in the presence of both rubber particles and a cell-free protein synthesis solution containing an mRNA coding for a membrane-associated protein to bind the membrane-associated protein to the rubber particles.

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

Abstract: The present disclosure relates to a CMOS image sensor having a pixel device on a deep trench isolation (DTI) structure, and an associated method of formation. In some embodiments, the DTI structure is disposed at a peripheral of a pixel region, extending from a back-side of the substrate to a position within the substrate. A pixel device is disposed at the front-side of the substrate directly overlying the DTI structure. The pixel device comprises a pair of source/drain regions disposed within the substrate and reaching on a top surface of the DTI structure. A second trench isolation structure is disposed from the front-side at an inner peripheral of the first trench isolation structure. The first trench isolation structure has a top surfaces locating at a position of the substrate vertically exceeding bottom surfaces of the second trench isolation structure.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor including a plurality of photodetectors within a substrate. A first plurality of semiconductor devices disposed over a first side of the substrate. A second plurality of semiconductor devices disposed over the first side of the substrate. The first and second plurality of semiconductor devices are disposed on opposing sides of the plurality of photodetectors such that the plurality of photodetectors are spaced laterally between the first and second plurality of semiconductor devices. The first and second plurality of semiconductor devices are laterally offset from the plurality of photodetectors.

Abstract: A wireless communication device that is capable of radio communication that complies with a radio regulation of the current location, even without having a function for communicating with a wireless wide area network, and a control method thereof are provided. Regulation information that depends on a geographical location at which radio communication that uses a second communication unit is obtained from an external apparatus using a first communication unit, the second communication unit is controlled so as to adapt to the regulation information, and communication that uses the second communication unit is performed.

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

Abstract: The present disclosure relates to a CMOS image sensor having a pixel device on a deep trench isolation (DTI) structure, and an associated method of formation. In some embodiments, a deep trench isolation (DTI) structure is disposed at a peripheral of a pixel region, extending from a back-side of the substrate to a position within the substrate. A pixel device is disposed at the front-side of the substrate directly overlying the DTI structure. The pixel device comprises a pair of source/drain (S/D) regions disposed within the substrate and reaching on a top surface of the DTI structure. By forming the disclosed pixel device directly overlying the DTI structure to form a SOI device structure, short channel effect is reduced because of the room for pixel device and also because the insulation layer underneath the pixel device. Thus higher device performance can be realized.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor including a photodetector disposed in a semiconductor substrate. A floating diffusion node is disposed in the semiconductor substrate and is above the photodetector. A transfer gate electrode overlies the photodetector. The transfer gate electrode has a top conductive body overlying a top surface of the semiconductor substrate and a bottom conductive body extending from the top conductive body to below the floating diffusion node. A portion of the top conductive body directly overlies the floating diffusion node. A first sidewall of the top conductive body directly overlies the bottom conductive body.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor. The image sensor includes a first semiconductor substrate having a photodetector and a floating diffusion node. A transfer gate is disposed over the first semiconductor substrate, where the transfer gate is at least partially disposed between opposite sides of the photodetector. A second semiconductor substrate is vertically spaced from the first semiconductor substrate, where the second semiconductor substrate comprises a first surface and a second surface opposite the first surface. A readout transistor is disposed on the second semiconductor substrate, where the second surface is disposed between the transfer gate and a gate of the readout transistor. A first conductive contact is electrically coupled to the transfer gate and extending vertically from the transfer gate through both the first surface and the second surface.

Abstract: Various embodiments of the present disclosure are directed towards a pixel sensor including a first and second pair of photodetectors. The pixel sensor includes the first and second pair of photodetectors in a semiconductor substrate. The first pair of photodetectors are reflection symmetric with respect to a first line positioned at a midpoint between the first pair of photodetectors. The second pair of photodetectors are reflection symmetric with respect to a second line that intersects the first line at a center point. A first plurality of transistors overlying the semiconductor substrate laterally offset the first pair of photodetectors. A second plurality of transistors overlying the semiconductor substrate laterally offset the first plurality of transistors. The first and second pair of photodetectors are laterally between the first and second plurality of transistors. The first and second plurality of transistors are point symmetric with respect to the center point.

Abstract: An on-vehicle power supply circuit includes a first inner power supply unit that supplies power to a control unit based on power supplied from a first power storage unit, a second inner power supply unit that supplies power to the control unit based on power supplied from a second power storage unit, and an operation voltage adjustment unit. The operation voltage adjustment unit outputs an operation voltage to the control unit based on power from the second inner power supply unit when power supply from the second inner power supply unit is in a normal state, and outputs an operation voltage to the control unit based on power from the first inner power supply unit when power supply from the second inner power supply unit is not in a normal state.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a dielectric structure disposed over a substrate. A plurality of conductive interconnect layers are disposed within the dielectric structure. The plurality of conductive interconnect layers include alternating layers of interconnect wires and interconnect vias. A metal-insulating-metal (MIM) capacitor is arranged within the dielectric structure. The MIM capacitor has a lower conductive electrode separated from an upper conductive electrode by a capacitor dielectric structure. The MIM capacitor vertically extends past two or more of the plurality of conductive interconnect layers.

Abstract: Various embodiments of the present disclosure are directed towards a pixel sensor including a first and second pair of photodetectors. The pixel sensor includes the first and second pair of photodetectors in a semiconductor substrate. The first pair of photodetectors are reflection symmetric with respect to a first line positioned at a midpoint between the first pair of photodetectors. The second pair of photodetectors are reflection symmetric with respect to a second line that intersects the first line at a center point. A first plurality of transistors overlying the semiconductor substrate laterally offset the first pair of photodetectors. A second plurality of transistors overlying the semiconductor substrate laterally offset the first plurality of transistors. The first and second pair of photodetectors are laterally between the first and second plurality of transistors. The first and second plurality of transistors are point symmetric with respect to the center point.

Abstract: A semiconductor device comprises a source/drain diffusion area, and a first doped region. The source/drain diffusion area is defined between a first isolation structure and a second isolation structure. The source/drain diffusion area includes a source region, a drain region, and a device channel. The device channel is between the source region and the drain region. The first doped region is disposed along a first junction between the device channel and the first isolation structure in a direction from the source region to the drain region. The first doped region is separated from at least one of the source region and the drain region, and has a dopant concentration higher than that of the device channel. The semiconductor device of the present disclosure has low random telegraph signal noise and fewer defects.

Abstract: The present disclosure relates to a CMOS image sensor having a pixel device on a deep trench isolation (DTI) structure, and an associated method of formation. In some embodiments, a deep trench isolation (DTI) structure is disposed at a peripheral of a pixel region, extending from a back-side of the substrate to a position within the substrate. A pixel device is disposed at the front-side of the substrate directly overlying the DTI structure. The pixel device comprises a pair of source/drain (S/D) regions disposed within the substrate and reaching on a top surface of the DTI structure. By forming the disclosed pixel device directly overlying the DTI structure to form a SOI device structure, short channel effect is reduced because of the room for pixel device and also because the insulation layer underneath the pixel device. Thus higher device performance can be realized.