Patents by Inventor Sen Zhang

Sen Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10867995
    Abstract: A device integrated with a depletion-mode junction field-effect transistor and a method for manufacturing the device. The device includes: a well region, which is of a second conduction type and formed within a first conduction region (214); a JFET source (210), which is of a first conduction type and formed within the well region; a metal electrode (212) of the JFET sources formed on the JFET sources (210), which is in contact with the JFET sources (210); a lateral channel region (208), which is of the first conduction type and formed between two adjacent JFET sources (210), while two ends thereof are in contact with the two adjacent JFET sources (210); and a JFET metal gate (213) formed on the well region.
    Type: Grant
    Filed: August 21, 2017
    Date of Patent: December 15, 2020
    Assignee: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Yan Gu, Shikang Cheng, Sen Zhang
  • Patent number: 10868033
    Abstract: A method for forming a gate structure of a 3D memory device is provided. The method comprises: forming, on a substrate, an alternating dielectric stack including a plurality of dielectric layer pairs, each of the plurality of dielectric layer pairs comprising a first dielectric layer and a second dielectric layer different from the first dielectric layer; forming a slit penetrating vertically through the alternating dielectric stack and extending in a horizontal direction; removing the plurality of second dielectric layers in the alternating dielectric stack through the slit to form a plurality of horizontal trenches; forming a gate structure in each of the plurality of horizontal trenches; forming a spacer layer on sidewalls of the slit to cover the gate structures, wherein the spacer layer has a laminated structure; and forming a conductive wall in the slit, wherein the conductive wall is insulated from the gate structures by the spacer layer.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: December 15, 2020
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Lei Ding, Jing Gao, Chuan Yang, Lan Fang Yu, Ping Yan, Sen Zhang, Bo Xu
  • Patent number: 10857656
    Abstract: The present invention discloses a leveling device for adjusting an installation gap between a first component and a second component. The first component and the second component respectively have a cooperative installation surface, the cooperative installation surface of the first component is provided with at least one leveling device; the leveling device comprises a driving device installed in the cooperative installation surface of the first component and an adjustment head rotatably connected to the driving device, the adjustment head moves upwardly or retracts downwardly relative to the cooperative installation surface of the first component; the driving device drives the adjustment head to protrude outside an installation position thereof and abut with the second component located on an opposite side of the installation position of the adjustment head to adjust the gap between the first and second component. The present invention relates to an easy-to-level display screen using the leveling device.
    Type: Grant
    Filed: July 11, 2018
    Date of Patent: December 8, 2020
    Assignee: Roe Visual Co., Ltd.
    Inventors: Danhu Cai, Yongfei Yu, Shunwen Tian, Ping Wu, Sen Zhang, Zhanqiang Li, Chen Lu, Dries Vermeulen
  • Publication number: 20200350420
    Abstract: A method for manufacturing a semiconductor device and an integrated semiconductor device, said method comprising: providing an epitaxial layer having a first region and a second region, forming, in the first region, at least two second doping-type deep wells, and forming, in the second region, at least two second doping-type deep wells; forming a first dielectric island between the second doping-type deep wells and forming a second dielectric island on the second doping-type deep wells; forming a first doping-type trench on two sides of the first dielectric island in the first region; forming a gate structure on the first dielectric island; and forming a separated first doping-type source region by using the second dielectric island as a mask, the first doping-type trench extending, in the first region, transversally to the first doping-type source region.
    Type: Application
    Filed: November 21, 2018
    Publication date: November 5, 2020
    Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Shikang CHENG, Yan GU, Sen ZHANG
  • Publication number: 20200343845
    Abstract: A method and an apparatus for reducing noise of a switched reluctance motor, includes: supplying a PWM signal as a driving signal to a driving circuit of a switched reluctance motor; and varying a carrier frequency of the PWM signal as an operation period of the switched reluctance motor varies; if the switched reluctance motor changes phase, determining that the operation period of the switched reluctance motor varies.
    Type: Application
    Filed: December 29, 2018
    Publication date: October 29, 2020
    Inventors: Rui ZHONG, Mingshu ZHANG, Sen ZHANG, Jinyu XIAO, Wei SU, Weifeng SUN, Longxing SHI
  • Patent number: 10818655
    Abstract: A semiconductor device includes a substrate (110); a buried layer (120) formed on the substrate (110), a diffusion layer (130) formed on the buried layer (120), wherein the diffusion layer (130) includes a first diffusion region (132) and a second diffusion region (134), and an impurity type of the second diffusion region (134) is opposite to an impurity type of the first diffusion region (132); the diffusion layer (134) further comprises a plurality of third diffusion regions (136) formed in the second diffusion region, wherein an impurity type of the third diffusion region (136) is opposite to the impurity type of the second diffusion region (134); and a gate (144) formed on the diffusion layer (130).
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: October 27, 2020
    Assignee: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Guangsheng Zhang, Sen Zhang
  • Publication number: 20200335498
    Abstract: The present application provides an integrated semiconductor device and an electronic apparatus, comprising a semiconductor substrate and a first doped epitaxial layer having a first region, a second region, and a third region; a partition structure is arranged in the third region; the first region is formed having at least two second doped deep wells, and the second region is formed having at least two second doped deep wells; a dielectric island partially covers a region between two adjacent doped deep wells in the first region and second region; a gate structure covers the dielectric island; a first doped source region is located on the two sides of the gate structure, and a first doped source region located in the same second doped deep well is separated; a first doped trench is located on the two sides of the dielectric island in the first region, and extends laterally to the first doped source region.
    Type: Application
    Filed: November 21, 2018
    Publication date: October 22, 2020
    Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Shikang CHENG, Yan GU, Sen ZHANG
  • Publication number: 20200335607
    Abstract: A manufacturing method for a semiconductor device, and an integrated semiconductor device. The manufacturing method comprises: on a semiconductor substrate, forming an epitaxial layer having a first region, a second region, and a third region; forming at least one groove in the third region, forming at least two second doping deep traps in the first region, and forming at least two second doping deep traps in the second region; forming a first dielectric island between the second doping deep traps and forming a second dielectric island on the second doping deep traps; forming a first doping groove at both sides of the first dielectric island in the first region; forming a gate structure on the first dielectric island; forming an isolated first doping source region using the second dielectric island as a mask.
    Type: Application
    Filed: November 21, 2018
    Publication date: October 22, 2020
    Inventors: Shikang CHENG, Yan GU, Sen ZHANG
  • Patent number: 10775656
    Abstract: The present invention discloses a guiding device and a self-unloading anti-separation display device for guiding a first component to move on a second component, wherein the first component and the second component respectively have a cooperative installation surface, and at least one of the cooperative installation surface of the first component and the cooperative installation surface of the second component is provided with at least one unloading device; the unloading device has a driving device and a pushing mechanism protruding towards the second component, and the pushing mechanism is butted with the second component to apply a counter force to the first component; the cooperative installation surface of the first component is provided with at least one guidepost; at least one guide hole is arranged at a position of the cooperative installation surface of the second component corresponding to the guidepost; the guidepost is inserted into the guide hole.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: September 15, 2020
    Assignee: ROE Visual Co., Ltd.
    Inventors: Danhu Cai, Yongfei Yu, Shunwen Tian, Ping Wu, Sen Zhang, Zhanqiang Li, Chen Lu, Dries Vermeulen
  • Publication number: 20200258782
    Abstract: An integrated circuit chip and a manufacturing method therefor, and a gate drive circuit, the integrated circuit chip comprising: a semiconductor substrate (103), a high voltage island (101a) being formed in the semiconductor substrate (103); a high voltage junction terminal (102a), the high voltage junction terminal (102a) surrounding the high voltage island (101a), a depletion type MOS device (N1) being formed on the high voltage junction terminal (102a), a gate electrode and a drain electrode of the depletion type MOS device (N1) being short connected, and a source electrode of the depletion type MOS device (N1) being connected to a high side power supply end (VB) of the integrated circuit chip; and a bipolar transistor (Q1), a collector electrode of the bipolar transistor (Q1) being short connected to the substrate and being connected to a low side power supply end (VCC) of the integrated circuit chip, an emitter of the bipolar transistor (Q1) being connected to a gate electrode of the depletion type MOS
    Type: Application
    Filed: August 31, 2018
    Publication date: August 13, 2020
    Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Lihui GU, Sen ZHANG, Congming QI
  • Patent number: 10740346
    Abstract: In one embodiment, a technique is provided for automating handover information from project (construction & design) to operation/maintenance. A schema-less repository is defined for holding handover asset objects and governing transformation automation. An information stitching method is defined for multiple-sourced project data integration and incorporating owners' requirement into the repository. A 2-step script-based transformation process is provided to encapsulate information modeling knowledge from a transformation definition.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: August 11, 2020
    Assignee: Agile Handover and Automation Solutions, LLC
    Inventors: Hong Gao, Sen Zhang, Jeff Nolan
  • Publication number: 20200252132
    Abstract: This disclosure provides a signal generation method and an electronic device, and pertains to the field of communications technologies. A mapping process is increased in this disclosure, to convert a four-level signal into a six-level signal, so that a dual-drive Mach-Zehnder modulator DDMZM is driven based on the six-level signal, thereby reducing a signal-to-noise ratio requirement of an input signal, improving a noise resistance capability of a transmit end, reducing impact from crosstalk between signals, and reducing a requirement standard on components such as a DAC and a driver. In addition, in embodiments of this disclosure, an amplitude requirement of a drive signal is greatly reduced, so that the amplitude requirement of the drive signal is reduced, and a power consumption requirement is further reduced, thereby reducing working pressure of the DDMZM, and improving overall system performance.
    Type: Application
    Filed: April 24, 2020
    Publication date: August 6, 2020
    Inventors: Tianjian Zuo, Sen Zhang
  • Patent number: 10713979
    Abstract: The present invention discloses an unloading device and a self-unloading display device having a first component or a second component cooperatively installed, the first and the second component respectively have a cooperative installation surface, the cooperative installation surface of the first component is provided with at least one unloading device; the unloading device comprises a driving device and a pushing mechanism; the pushing mechanism is connected to a driving device in a transmission way, the pushing mechanism has at least a set of telescopic dowel bars, an end part of the dowel bar is an inclined surface, a small end formed by the inclined surface is arranged close to the cooperative installation surface of the first component; the driving device drives the dowel bar to move along the cooperative installation surface of the first component, the inclined surface of the dowel bar abuts with and moves along the second component.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: July 14, 2020
    Assignee: ROE Visual Co., Ltd.
    Inventors: Danhu Cai, Yongfei Yu, Shunwen Tian, Ping Wu, Sen Zhang, Zhanqiang Li, Chen Lu, Dries Vermeulen
  • Publication number: 20200210423
    Abstract: The present disclosure provides a multi-party data joint query method, a device, a server and a storage medium. The multi-party datajoint query method executed by a manager includes: analyzing a multi-party joint query sentence to obtain a logical execution plan; processing the logical execution plan according to providers of respective nodes in the logical execution plan to obtain a physical execution plan of each provider; and generating a query instruction of each provider according to the physical execution plan of each provider, and sending the query instruction to respective provider. The query instruction is configured to instruct the providers to perform a query cooperatively.
    Type: Application
    Filed: December 26, 2019
    Publication date: July 2, 2020
    Inventors: Zhi FENG, Yu ZHANG, Sen ZHANG
  • Publication number: 20200136885
    Abstract: A communication method, a communications apparatus, and a storage medium are disclosed, to reduce a probability that consecutive bit errors occur in a communications system. A received to-be-sent signal is modulated to obtain a modulated signal, and N rounds of operations are further performed on the modulated signal to obtain an encoded signal. An output of the 1st-round operation in the N rounds of operations is determined based on the modulated signal and an output that is of the Nth-round operation and that is processed by a first delay circuit, and an output of the ith-round operation in the N rounds of operations is determined based on an output of the (i?1)th-round operation and an output that is of the Nth-round operation and that is processed by a second delay circuit, where i is an integer greater than 1 and less than or equal to N.
    Type: Application
    Filed: December 24, 2019
    Publication date: April 30, 2020
    Inventors: Tianjian ZUO, Sen ZHANG
  • Publication number: 20200121706
    Abstract: A method for inhibiting myopia and an application in preparing a drug. According to the invention, myopia is inhibited by an anti-hypoxia effect achieved by inhibiting the expression of intraocular HIF-1?, and myopia is effectively delayed and inhibited by an anti-hypoxia effect achieved by inhibiting the effect of intraocular HIF-1?. The present invention utilizes HIF-1? inhibitors salidroside and formononetin to inhibit HIF-1? activity to play an anti-hypoxia effect and play a role in delaying myopia.
    Type: Application
    Filed: August 16, 2017
    Publication date: April 23, 2020
    Inventors: Jia QU, Fei ZHAO, Xiangtian ZHOU, Miaozhen PAN, Sen ZHANG, Qingyi ZHOU, Hao WU
  • Publication number: 20200125076
    Abstract: A computer implemented method at an energy management system (EMS) controller apparatus for automatic generation of a SCADA (supervisory control and data acquisition) slave interface for an energy management system (EMS), includes storing a SCADA configuration file mapping SCADA data points to EMS data objects; providing the EMS data objects coded in statically typed programming language; providing site configuration information of the energy management system (EMS); scanning, by an object access framework (OAF), EMS data objects with EMS annotations and combining them with the site configuration information to generate an object binding repository (OBR); and compiling the SCADA configuration file to combine the SCADA data points mapping with the object binding repository to generate SCADA bindings information as part of the SCADA slave interface for the energy management system (EMS).
    Type: Application
    Filed: October 18, 2018
    Publication date: April 23, 2020
    Applicant: GREENSMITH ENERGY MANAGEMENT SYSTEMS, INC.
    Inventors: Sen Zhang, Murat Bayraktar, Nikolai Teleguine
  • Publication number: 20200119584
    Abstract: Computer software and a system are disclosed to provide group control and network operations to/for a multiplicity of distributed energy storage units. The group control software and system can connect multiple individual distributed energy storage units and operate those units in synchronicity to create a large virtual energy storage device. Methods of controlling the distributed energy storage units include: a browser-based online user portal, or network-based, system-to-system protocols by third-party operation controllers.
    Type: Application
    Filed: December 13, 2019
    Publication date: April 16, 2020
    Applicant: Greensmith Energy Management Systems, LLC
    Inventor: SEN ZHANG
  • Patent number: 10613761
    Abstract: Data service status information is obtained at a local storage tier regarding a data service operation performed on one or more data sets that qualify for remote storage based on a given policy. A determination is made whether or not to store at least a portion of the one or more data sets at a remote storage tier based on the obtained data service status information.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: April 7, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Junping Zhao, Kevin Xu, Sen Zhang, Kenneth J. Taylor
  • Publication number: 20200097450
    Abstract: The present disclosure relates to a method and apparatus for a file system, the file system comprising at least a first logical storage area and a second logical storage area, a logical block of the first logical storage area and that of the second logical storage area being different in size, and in response to a request for creating a file, selecting a logical storage area for storing the file from the at least first logical storage area and second logical storage area; and storing the file in the selected logical storage area. According to the above various embodiments of the present invention, a direct and effective way may be used to support variable-length block size in a file system, without increasing metadata and positioning overheads.
    Type: Application
    Filed: November 25, 2019
    Publication date: March 26, 2020
    Inventors: Jia Zhai, Yingchao Zhou, Wengang Wang, Jun Guo, Sen Zhang