Abstract: Discovery of connections utilizing a control bus. An embodiment of a method includes detecting a transition of a control bus from a high state to a low state by a source device, the source device being configured to be coupled with a sink device via an interface, the interface including the control bus, the source device including a pullup device and the sink device including a pulldown device;pulsing the control bus to a high state at the source device; and upon detecting by the source device that the control bus remains in the high state ceasing the pulsing of the control bus to the high state, and transitioning the source device from a disconnected state to a connected state.

Abstract: A system and method for estimating power of a wireless system simultaneously estimates and displays a code domain power and a time domain power in the system which may be a wireless communication system that mixes TDMA and CDMA methods such as WCDMA TDD and TD-SCDMA. The method includes designating a section where an output power is to be estimated, estimating a time domain power in the designated section; estimating a code domain power in the designated section, and displaying the estimated time domain power and the code domain power on a display unit.

Abstract: A method of driving a frame of plasma display device having a first electrode, a second electrode, and an address electrode, the method including gradually decreasing a voltage of the second electrode from a second voltage to a third voltage and, while decreasing the voltage of the second electrode, supplying a vertical synchronization pulse and applying a first voltage to the first electrode, after the voltage of the second electrode reaches the third voltage, gradually increasing the voltage of the second electrode from a fifth voltage to a sixth voltage while a fourth voltage is applied to the first electrode, and, after the voltage of the second electrode reaches the sixth voltage, gradually decreasing the voltage of the second electrode from an eighth voltage to a ninth voltage while a seventh voltage is applied to the first electrode.

Abstract: In a plasma display device and a driving method thereof, a scan voltage is set to be lower than a reset minimum voltage in order to reduce an address discharge delay in an address period. In addition, in the address period, an address voltage and a scan voltage are set to be lower. In order to prevent misfiring in the address period, a voltage biasing a sustain electrode in the address period is set to be lower than a voltage biasing the sustain electrode in a falling period of a reset period.

Abstract: A circuit for use in powering a load having dynamic power needs. A variable strength controller is provided that has a feedback terminal, at least one p-terminal, and at least one n-terminal. The p? and n-terminals are each suitable for driving a respective semiconductor device to partially control the power to the load as the said feedback terminal receives a feedback signal representative of actual demand for the power by the load. A total of at least three p? and n-terminals are provided, and their selective employment thus collectively fully controls the power to the load.

Abstract: In a plasma display device and a driving method thereof, a switch for applying a voltage rising waveform to a scan electrode during an idle period and a first period is coupled between the scan electrode and a power source. The switch applies the voltage rising waveform having a first slope by being repeatedly turned on/off according to a first control signal during the idle period, and/or the switch applies the voltage rising waveform having a second slope (having a higher gradient than the first slope) by being repeatedly turned on/off according to a second control signal during the first period. As such, the scan electrode voltage is increased with the first slope during the idle period to perform a more stable reset operation. Also, when the idle period does not exist, the voltage of the scan electrode is increased within the first period to enable a normal reset operation.

Abstract: A method and apparatus to drive a Plasma Display Panel (PDP) having X electrodes, Y electrodes, and address electrodes includes: dividing a unit frame, which is a display cycle, into a plurality of sub-fields for displaying time ratio gray-scale, each sub-field including a reset period, an address period, and a sustain period; alternately supplying a sustain pulse to the X electrode and the Y electrode based on a reference voltage in the sustain period; and reducing the width of the last sustain pulse of the sustain period in the minimum weighted sub-field, if a load factor of the minimum weighted sub-field to which the lowest gray-scale is allocated among the plurality of sub-fields is lower than the reference load factor.

Abstract: Driving a display may include dividing a unit frame into a plurality of sub-fields and dividing each of the sub-fields into a reset period, an addressing period, and a discharge-sustaining period. During the addressing period, a voltage difference between an addressing electric potential applied to selected address electrode-lines and a bias electric potential applied to scanning electrode-lines not scanned increases over the addressing period.

Abstract: In a plasma display and a driving method thereof, a misfiring prevention period is provided between a reset period and an address period in response to a temperature of the plasma display being higher than predetermined temperature or a weight value of a previous subfield being higher than a predetermined weight value. In the misfiring prevention period, a first voltage higher than a voltage supplied to a sustain electrode is supplied during a first period, and a voltage at a scan electrode is gradually decreased from a second voltage to a third voltage during a second period subsequent to the first period.

Abstract: The present invention permits an I/O port to be used with a variety of different I/O devices, regardless of their device type implementation, such as tri-state I/O devices, pull-up I/O devices, or pull-down I/O devices. Thus, one set of pins may be used for various different I/O devices.

Abstract: A plasma display calculates a screen load ratio from a plurality of video signals input during one frame, determines a total number of sustain pulses of the frame according to the screen load ratio, and determines a number of sustain pulses allocated to each subfield from the total number of sustain pulses. In addition, the plasma display divides a first number of sustain pulses allocated to at least one of the plurality of subfields into a second number of sustain pulses having a first period and a third number of sustain pulses having a second period different from the first period.

Abstract: In a sustain period, a positive voltage is applied to an address electrode during at least one part of a period for applying a last sustain discharge pulse that is gradually increased and applied to a scan electrode. In this manner, an occurrence of misfiring between the address electrode and the sustain electrode of a discharge cell that is sustain-discharged without having been addressed in the next consecutive subfield is reduced or prevented.

Abstract: A plasma display device and a power supply thereof having a fewer number of power sources in the plasma display device is disclosed. The power supply generates a voltage corresponding to a Ve power source by using a variable resistance through a voltage distribution principle without including a Ve power source. In addition, since a power supply circuit including a thermistor is used in order to correspond to a discharge firing voltage which is changed by a temperature, a sustain discharge is stably generated by adjusting a Ve voltage without including a Ve power source.

Abstract: The present invention provides a system and method for introducing white noises into a digital audio signal so that there is progressive and cumulative degradation in audio quality after each successive reproduction of the audio sound signal in a fashion analogous to analog audio reproduction. The invention provides a white noise generator, and a digital entroping unit. In a preferred embodiment, the white noise generator is implemented by a hardware random number generator. The digital entroping unit controls the magnitude of white noise desired based on a random number generated by the random number generator, and adds the white noise to the input audio sound signal to produce a degraded audio sound signal. The magnitude of white noise can be controlled by using various masking and formatting of random number data.

Abstract: A plasma display includes a plurality of scan electrodes. A scan voltage is sequentially supplied to the plurality of scan electrodes, and a non-scan voltage that is higher than the scan voltage is supplied to scan electrodes to which the scan voltage is supplied. The non-scan voltage is generated by dividing a voltage that is higher than the non-scan voltage and the scan voltage. Thus, a voltage source for supplying the non-scan voltage can be eliminated.

Abstract: A power management system and method permit the total power consumption by a portable electronic device to be reduced so that the portable electronic device has a longer operating time on a limited power source, such as a battery. The system may also be used with devices that are powered by a more permanent source of power. The system may combine static power management techniques as well as dynamic power management techniques. The system may include a flexible clock generator.

Abstract: An interrupt handling system and method for a multiple processor system permit the interrupts generated by one or more hardware devices to be routed and prioritized dynamically. In particular, the interrupt controller permits the interrupts to be dynamically routed between the multiple processors and permits a particular interrupt to be dynamically assigned a priority level. The interrupt handling system also permits software based interrupts wherein, for example, one processor may interrupt another processor.

Abstract: To facilitate inter-processor communication between multiple processors in a computer system and to enable the accessing of a dual port memory, or other system resources, without requiring the memory or the data/address bus to be locked, the present invention provides a semaphore unit that preferably incorporates a shared mailbox architecture that, in combination with a set of hardware semaphore registers, enables inter-process communication among the multi-processors. Cooperative multitasking may be accomplished through the use of shared mailbox communication protocols while a preemptive multitasking may be accomplished through the use of hardware semaphore registers.

Abstract: The present invention provides a vector floating point unit (FPU) comprising a product-terms bus, a summation bus, a plurality of FIFO (first in first out) registers, a crossbar operand multiplexor coupled, a floating point multiplier, and a floating point adder. The floating point multiplier and the floating point adder are disposed between the crossbar operand multiplexor and the product-terms and summation buses, and are in parallel to each other. The invention also provides the configuration register and the command register in order to provide flexible architecture and the capability to fine-tune the performance to a particular application. The invention performs the multiplication operation and the addition operation in a pipelined fashion. Once the pipeline is filled, the invention outputs one multiplication output and one addition output at each clock cycle.

Abstract: A system and method for estimating power of a wireless system simultaneously estimates and displays a code domain power and a time domain power in the system which may be a wireless communication system that mixes TDMA and CDMA methods such as WCDMA TDD and TD-SCDMA. The method includes designating a section where an output power is to be estimated, estimating a time domain power in the designated section; estimating a code domain power in the designated section, and displaying the estimated time domain power and the code domain power on a display unit.