Patents by Inventor Shang Chen
Shang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9947582Abstract: Processes are provided herein for protecting metal thin films from oxidation when exposed to an oxidizing environment, such as the ambient atmosphere. The processes may comprise a protective treatment including exposing the metal thin film to a silicon-containing precursor at a temperature of about 200° C. or less in order to selectively adsorb a silicon-containing protective layer on the metal thin film. The silicon-containing protective layer may reduce or substantially prevent the underlying metal thin film from oxidation.Type: GrantFiled: June 2, 2017Date of Patent: April 17, 2018Assignee: ASM IP HOLDING B.V.Inventors: Aurélie Kuroda, Shang Chen, Takahiro Onuma, Dai Ishikawa
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Publication number: 20180080121Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.Type: ApplicationFiled: October 27, 2017Publication date: March 22, 2018Inventors: Delphine Longrie, Antti Juhani Niskanen, Han Wang, Qi Xie, Jan Willem Maes, Shang Chen, Toshiharu Watarai, Takahiro Onuma, Dai Ishikawa, Kunitoshi Namba
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Publication number: 20180068844Abstract: Methods and precursors for forming silicon nitride films are provided. In some embodiments, silicon nitride can be deposited by atomic layer deposition (ALD), such as plasma enhanced ALD. In some embodiments, deposited silicon nitride can be treated with a plasma treatment. The plasma treatment can be a nitrogen plasma treatment. In some embodiments the silicon precursors for depositing the silicon nitride comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%). In some embodiments, a method for depositing silicon nitride films comprises a multi-step plasma treatment.Type: ApplicationFiled: September 15, 2017Publication date: March 8, 2018Inventors: Shang Chen, Viljami Pore, Ryoko Yamada, Antti Juhani Niskanen
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Patent number: 9905416Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).Type: GrantFiled: January 24, 2017Date of Patent: February 27, 2018Assignee: ASM IP HOLDING B.V.Inventors: Antti J. Niskanen, Shang Chen, Viljami Pore, Atsuki Fukazawa, Hideaki Fukuda, Suvi P. Haukka
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Publication number: 20170372886Abstract: Methods and precursors for forming silicon nitride films are provided. In some embodiments, silicon nitride can be deposited by atomic layer deposition (ALD), such as plasma enhanced ALD. In some embodiments, deposited silicon nitride can be treated with a plasma treatment. The plasma treatment can be a nitrogen plasma treatment. In some embodiments the silicon precursors for depositing the silicon nitride comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%). In some embodiments, a method for depositing silicon nitride films comprises a multi-step plasma treatment.Type: ApplicationFiled: February 7, 2017Publication date: December 28, 2017Inventors: Shang Chen, Viljami Pore, Ryoko Yamada, Antti Juhani Niskanen
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Publication number: 20170358482Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.Type: ApplicationFiled: June 14, 2017Publication date: December 14, 2017Inventors: Shang Chen, Toshiharu Watarai, Takahiro Onuma, Dai Ishikawa, Kunitoshi Namba
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Patent number: 9824881Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).Type: GrantFiled: March 14, 2013Date of Patent: November 21, 2017Assignee: ASM IP HOLDING B.V.Inventors: Antti J. Niskanen, Shang Chen, Viljami Pore
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Patent number: 9805974Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.Type: GrantFiled: June 8, 2016Date of Patent: October 31, 2017Assignee: ASM IP HOLDING B.V.Inventors: Shang Chen, Toshiharu Watarai, Takahiro Onuma, Dai Ishikawa, Kunitoshi Namba
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Patent number: 9803277Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.Type: GrantFiled: June 8, 2016Date of Patent: October 31, 2017Assignee: ASM IP HOLDING B.V.Inventors: Delphine Longrie, Antti Juhani Niskanen, Han Wang, Qi Xie, Jan Willem Maes, Shang Chen, Toshiharu Watarai, Takahiro Onuma, Dai Ishikawa, Kunitoshi Namba
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Publication number: 20170296639Abstract: The present invention provides a method for preparing dendritic cell loaded with antigen, the method comprising the steps of adding serum-free cell culture medium containing granulocyte-macrophage colony-stimulating factor (GM-CSF) and inter-leukin (IL)-4 into mononuclear cells, culturing in an incubator at 37° C. under 5% carbon dioxide for 5 days, adding target antigen wrapped cationic liposome and culturing for 8-24 hours to obtain target antigen loaded dendritic cell.Type: ApplicationFiled: May 20, 2015Publication date: October 19, 2017Inventors: Yifan MA, Xiangjun ZHOU, Shang CHEN, Lintao CAI, Ce WANG, Peng LIU
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Publication number: 20170133216Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).Type: ApplicationFiled: January 24, 2017Publication date: May 11, 2017Inventors: Antti J. Niskanen, Shang Chen, Viljami Pore, Atsuki Fukazawa, Hideaki Fukuda, Suvi P. Haukka
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Publication number: 20170062204Abstract: Methods of forming silicon nitride thin films on a substrate in a reaction space under high pressure are provided. The methods can include a plurality of plasma enhanced atomic layer deposition (PEALD) cycles, where at least one PEALD deposition cycle comprises contacting the substrate with a nitrogen plasma at a process pressure of 20 Torr to 500 Torr within the reaction space. In some embodiments the silicon precursor is a silyly halide, such as H2SiI2. In some embodiments the processes allow for the deposition of silicon nitride films having improved properties on three dimensional structures. For example, such silicon nitride films can have a ratio of wet etch rates on the top surfaces to the sidewall of about 1:1 in dilute HF.Type: ApplicationFiled: August 24, 2015Publication date: March 2, 2017Inventors: TOSHIYA SUZUKI, VILJAMI J. PORE, SHANG CHEN, RYOKO YAMADA, DAI ISHIKAWA, KUNITOSHI NAMBA
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Patent number: 9576792Abstract: Methods and precursors for forming silicon nitride films are provided. In some embodiments, silicon nitride can be deposited by atomic layer deposition (ALD), such as plasma enhanced ALD. In some embodiments, deposited silicon nitride can be treated with a plasma treatment. The plasma treatment can be a nitrogen plasma treatment. In some embodiments the silicon precursors for depositing the silicon nitride comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%). In some embodiments, a method for depositing silicon nitride films comprises a multi-step plasma treatment.Type: GrantFiled: September 15, 2015Date of Patent: February 21, 2017Assignee: ASM IP HOLDING B.V.Inventors: Shang Chen, Viljami Pore, Ryoko Yamada, Antti Juhani Niskanen
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Patent number: 9564309Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).Type: GrantFiled: January 29, 2014Date of Patent: February 7, 2017Assignee: ASM IP Holding B.V.Inventors: Antti J. Niskanen, Shang Chen, Viljami Pore, Atsuki Fukazawa, Hideaki Fukuda, Suvi P. Haukka
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Publication number: 20160309670Abstract: A multi-functional flowerpot may comprise a pot body, a tank and a plurality of supporting units. The pot body has at least a through hole formed at a bottom portion thereof, and the supporting units are configured to support the pot body to locate above the tank. More specifically, when the pot body is connected to the tank through the supporting units, a lower portion of the pot body is inserted into the tank and the position of the pot body is located above a bottom portion of the tank. Thus, when the plants cultivated in the pot body and the aquatic plants or aquatic animals raised in the tank, the excess water of the pot body can flow through the through hole into the tank.Type: ApplicationFiled: April 18, 2016Publication date: October 27, 2016Applicant: DO LIN METAL INDUSTRIAL CO., LTD.Inventor: Shui-Shang Chen
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Publication number: 20160079054Abstract: Methods and precursors for forming silicon nitride films are provided. In some embodiments, silicon nitride can be deposited by atomic layer deposition (ALD), such as plasma enhanced ALD. In some embodiments, deposited silicon nitride can be treated with a plasma treatment. The plasma treatment can be a nitrogen plasma treatment. In some embodiments the silicon precursors for depositing the silicon nitride comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%). In some embodiments, a method for depositing silicon nitride films comprises a multi-step plasma treatment.Type: ApplicationFiled: September 15, 2015Publication date: March 17, 2016Inventors: Shang Chen, Viljami Pore, Ryoko Yamada, Antti Juhani Niskanen
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Patent number: 9065395Abstract: A speaker control system includes a speaker; an audio amplifier electrically connected to the speaker and used for driving the speaker, the audio amplifier having a shutdown pin and a reference voltage input pin; a switch circuit, a first end of the switch circuit being electrically connected to the shutdown pin and a second end of the switch circuit being connected to the reference voltage input pin; and a processor electrically connected to the shutdown pin and the first end, when the processor outputs a first voltage signal, the audio amplifier being enabled and the reference voltage input pin being kept at a reference voltage, when the processor outputs a second voltage signal, the audio amplifier being disabled and the switch circuit switching the reference voltage input pin from the reference voltage to a low voltage level.Type: GrantFiled: November 7, 2012Date of Patent: June 23, 2015Assignee: Wistron CorporationInventors: Yi-Shang Chen, Chun-Hao Hsu, Yi-Fan Chen
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Patent number: 9036393Abstract: A one-time programmable memory array includes a first row conductor extending in a first row direction and disposed at a first elevation, a second row conductor extending in a second row direction and disposed at a second elevation and a column conductor extending in a column direction and disposed adjacent to the first row conductor and adjacent to the second row conductor. The array also includes a dielectric layer covering at least a portion of the column conductor, a fuse link coupled between the dielectric layer on the column conductor and the second row conductor.Type: GrantFiled: October 25, 2013Date of Patent: May 19, 2015Assignee: MACRONIX International Co., Ltd.Inventors: Kuan-Fu Chen, Yin-Jen Chen, Tzung-Ting Han, Ming-Shang Chen
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Patent number: 8955735Abstract: A method is used for implanting solder balls of an integrated circuit by operating a ball implanting machine. The ball implanting machine includes a suction fixture, an evacuating device, two pivoting and inverting devices, a guide plate, a ball carrier, and a substrate. The suction fixture has a plurality of ball grooves. The guide plate has a plurality of guide holes each aligning with a respective one of the ball grooves of the suction fixture. The ball carrier contains a plurality of solder balls. Thus, each of the solder balls is extended through the respective guide hole of the guide plate into the respective ball groove of the suction fixture, so that the solder balls will not protrude outward from the guide plate and will not interfere with or jam each other during movement of the ball carrier.Type: GrantFiled: May 17, 2013Date of Patent: February 17, 2015Assignee: Zen Voce CorporationInventors: Chao-Shang Chen, Yu-Kai Lin
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Patent number: 8896955Abstract: A disk drive comprises a track follow control system having a plurality of selectable frequency modes, the track follow control system configured to receive a position error signal and to output a control signal based on the position error signal, wherein the control signal is used by a head assembly to position a head over a disk. The disk drive also comprises a state estimator configured to receive the control signal and a position signal indicating a position of the head, to estimate a disturbance based on the control signal and the position signal, and to output an estimated disturbance signal based on the estimated disturbance. The disk drive further comprises a disturbance evaluator configured to receive the estimated disturbance signal, and to select one of the frequency modes of the track follow control system based on the estimated disturbance signal.Type: GrantFiled: June 16, 2011Date of Patent: November 25, 2014Assignee: Western Digital Technologies, Inc.Inventors: Min Chen, Alain Chahwan, Shang-Chen Wu, Qixing Zheng, Alexander Babinski, Duc T. Phan