Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).

Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).

Abstract: A speaker control system includes a speaker; an audio amplifier electrically connected to the speaker and used for driving the speaker, the audio amplifier having a shutdown pin and a reference voltage input pin; a switch circuit, a first end of the switch circuit being electrically connected to the shutdown pin and a second end of the switch circuit being connected to the reference voltage input pin; and a processor electrically connected to the shutdown pin and the first end, when the processor outputs a first voltage signal, the audio amplifier being enabled and the reference voltage input pin being kept at a reference voltage, when the processor outputs a second voltage signal, the audio amplifier being disabled and the switch circuit switching the reference voltage input pin from the reference voltage to a low voltage level.

Abstract: A one-time programmable memory array includes a first row conductor extending in a first row direction and disposed at a first elevation, a second row conductor extending in a second row direction and disposed at a second elevation and a column conductor extending in a column direction and disposed adjacent to the first row conductor and adjacent to the second row conductor. The array also includes a dielectric layer covering at least a portion of the column conductor, a fuse link coupled between the dielectric layer on the column conductor and the second row conductor.

Abstract: A one-time programmable memory array includes a first row conductor extending in a first row direction and disposed at a first elevation, a second row conductor extending in a second row direction and disposed at a second elevation and a column conductor extending in a column direction and disposed adjacent to the first row conductor and adjacent to the second row conductor. The array also includes a dielectric layer covering at least a portion of the column conductor, a fuse link coupled between the dielectric layer on the column conductor and the second row conductor.

Abstract: A one-time programmable memory array includes a first row conductor extending in a first row direction and disposed at a first elevation, a second row conductor extending in a second row direction and disposed at a second elevation and a column conductor extending in a column direction and disposed adjacent to the first row conductor and adjacent to the second row conductor. The array also includes a dielectric layer covering at least a portion of the column conductor, a fuse link coupled between the dielectric layer on the column conductor and the second row conductor.

Abstract: An improved vibrating massager is disclosed. The massager includes an inner shell, at least one vibrating unit, at least one power-supply unit, a control circuit board, at least two conductive strips having a first conductive strip and a second conductive strip, a switch, a first outer shell, a waterproof o-ring, and a second outer shell. Particularly the switch and the control circuit board are integrated and a program for memorizing previously-used vibrating frequency is installed in the control circuit board. As a result, the previously-used vibrating frequency can be re-applied in next use without extensive control (e.g., number of times for pushing button is decreased).

Abstract: A high efficiency audio amplifier is disclosed. The high efficiency audio amplifier includes an input end for receiving an input audio signal, an output end for outputting an output audio signal, a signal generator coupled to the input end for determining a frequency of an oscillating signal according to the distribution of the input audio signal and a reference voltage, and generating the oscillating signal accordingly, a waveform transformer coupled to the input end and the signal generator for comparing the input audio signal with the oscillating signal to generate a pulse width modulation (PWM) signal, a pre-drive circuit for generating a pre-drive signal according to the PWM signal, an output stage coupled to the pre-drive circuit for generating an output signal, and a filter coupled to the output stage for filtering the output signal to generate the output audio signal to the output end.

Abstract: A non-volatile memory structure including a substrate, stacked patterns and stress patterns is provided. The stacked patterns are disposed on the substrate. Each of the stacked patterns includes a charge storage structure and a gate from bottom to top. Here, the charge storage structure at least includes a charge storage layer. The stress patterns are disposed on the substrate between the two adjacent stacked patterns, respectively.

Abstract: The present invention relates to an improved vibrating massager, the improved vibrating massager comprises: an inner shell (11) comprising a first inner shell portion (111) and a second inner shell portion (112), wherein the inner shell (11) further comprises an accommodating portion (113); at least one vibrating unit (12) being configured in the accommodating portion (113); at least one power-supply unit (13) being configured in the accommodating portion (113); a control circuit board (14) being configured at an opening of the accommodating portion (113); at least two conductive strips being configured at the outside of the inner shell (11); a switch (17) being connected to the control circuit board (14); a first outer shell (18) being composed of a first outer shell portion (181) and a second outer shell portion (182); a waterproof o-ring (19) being configured between the first outer shell portion (181) and the second outer shell portion (182); and a colloidal ring (1D) being connected to the first outer sh

Abstract: A method for fabricating a floating gate memory device comprises using self-aligned process for formation of a fourth poly layer over a partial gate structure that does not require an additional photolithographic step. Accordingly, enhanced device reliability can be achieved because a higher GCR can be maintained with lower gate bias levels. In addition, process complexity can be reduced, which can increase throughput and reduce device failures.

Abstract: A one-time programmable memory array includes a first row conductor extending in a first row direction and disposed at a first elevation, a second row conductor extending in a second row direction and disposed at a second elevation and a column conductor extending in a column direction and disposed adjacent to the first row conductor and adjacent to the second row conductor. The array also includes a dielectric layer covering at least a portion of the column conductor, a fuse link coupled between the dielectric layer on the column conductor and the second row conductor.

Abstract: A method for simulating operation of a charge trapping memory cell which computes the amount of charge trapped by determining first tunneling current through the tunneling layer, determining second tunneling current out of the charge trapping layer to the gate, determining third tunneling current escaping from traps in the charge trapping layer and tunneling out to the gate, and integrating said tunneling currents over a time interval. A change in threshold voltage can be computed for a transistor including the charge trapping structure. The parameter set can include only physical parameters, including layer thickness, band offsets and dielectric constants.

Abstract: A semiconductor fabrication process allows the fabrication of both logic and memory devices using a conventional CMOS process with a few additional steps. The additional steps, however, do not require additional masks. Accordingly, the process can be reduce the complexity, time, and cost for fabricating logic and memory devices on the same substrate, especially for embedded applications.

Abstract: A memory array comprises a semiconductor body having a plurality of trenches aligned generally in parallel. The trenches contain semiconductor material, such as doped amorphous silicon, and act as source/drain lines for the memory array. Insulating liners lie between the semiconductor material within the trenches and the semiconductor body. A plurality of word lines overlie the plurality of trenches and channel regions in the semiconductor body in an array of cross points. Charge trapping structures lie between the word lines and the channel regions at the cross points, providing an array of flash memory cells. The charge trapping structures comprise dielectric charge trapping structures adapted to be programmed and erased to store data. A method for manufacturing such devices includes patterning and forming the sources/drain lines with insulating liners prior to formation of the charge trapping structure over the channel regions.

Abstract: A high efficiency audio amplifier is disclosed. The high efficiency audio amplifier includes an input end for receiving an input audio signal, an output end for outputting an output audio signal, a signal generator coupled to the input end for determining a frequency of an oscillating signal according to the distribution of the input audio signal and a reference voltage, and generating the oscillating signal accordingly, a waveform transformer coupled to the input end and the signal generator for comparing the input audio signal with the oscillating signal to generate a pulse width modulation (PWM) signal, a pre-drive circuit for generating a pre-drive signal according to the PWM signal, an output stage coupled to the pre-drive circuit for generating an output signal, and a filter coupled to the output stage for filtering the output signal to generate the output audio signal to the output end.

Abstract: Methods are described for fabricating NAND-type EEPROMs without field oxide isolation. P+ implantations are employed to isolate adjacent memory cells.

Abstract: A remote control setting method for an electronic device for setting a plurality of functions of the electronic device to be controlled by a plurality of keypads of a remote controller includes displaying an indication message according to a control signal, to indicate codes of a function of the plurality of functions and ask a user to press a keypad of the plurality of keypads, receiving a triggering signal generated by pressing the keypad, and storing codes including relation between the triggering signal and the function according to the control signal.

Abstract: A power supply device of a LCD display device comprising an AC rectifier; a square wave generator; an AC voltage converting module, coupled to the square wave generator, for providing an AC voltage to a backlight module of the LCD display device; and a plurality of DC voltage converting modules, for providing a plurality of voltage sources to a plurality of load circuits of the LCD display device, each DC voltage converting module comprising a control circuit for masking off the first oscillating signal, to generate a second oscillating signal according to a feedback signal of a corresponding load circuit; a voltage converting unit, coupled to the control circuit and the load circuit, for transforming the second oscillating signal into a voltage source for the load circuit; and a feedback control unit, coupled to the control circuit and the load circuit, for generating the feedback signal.