Abstract: A structure including a photonic integrated circuit die, an electric integrated circuit die, a semiconductor dam, and an insulating encapsulant is provided. The photonic integrated circuit die includes an optical input/output portion and a groove located in proximity of the optical input/output portion, wherein the groove is adapted for lateral insertion of at least one optical fiber. The electric integrated circuit die is disposed over and electrically connected to the photonic integrated circuit die. The semiconductor dam is disposed over the photonic integrated circuit die. The insulating encapsulant is disposed over the photonic integrated circuit die and laterally encapsulates the electric integrated circuit die and the semiconductor dam.

Abstract: A package structure includes a semiconductor device, a circuit substrate and a heat dissipating lid. The semiconductor device includes a semiconductor die. The circuit substrate is bonded to and electrically coupled to the semiconductor device. The heat dissipating lid is bonded to the circuit substrate and thermally coupled to the semiconductor device, where the semiconductor device is located in a space confined by the heat dissipating lid and the circuit substrate. The heat dissipating lid includes a cover portion and a flange portion bonded to a periphery of the cover portion. The cover portion has a first surface and a second surface opposite to the first surface, where the cover portion includes a recess therein, the recess has an opening at the second surface, and a thickness of the recess is less than a thickness of the cover portion, where the recess is part of the space.

Abstract: A method includes bonding a first device die and a second device die to an interconnect die. The interconnect die includes a first portion over and bonded to the first device die, and a second portion over and bonded to the second device die. The interconnect die electrically connects the first device die to the second device die. The method further includes encapsulating the interconnect die in an encapsulating material, and forming a plurality of redistribution lines over the interconnect die.

Abstract: An embodiment is a method including: attaching a first die to a first side of a first component using first electrical connectors, attaching a first side of a second die to first side of the first component using second electrical connectors, attaching a dummy die to the first side of the first component in a scribe line region of the first component, adhering a cover structure to a second side of the second die, and singulating the first component and the dummy die to form a package structure.

Abstract: A method includes forming a first photonic package, wherein forming the first photonic package includes patterning a silicon layer to form a first waveguide, wherein the silicon layer is on an oxide layer, and wherein the oxide layer is on a substrate; forming vias extending into the substrate; forming a first redistribution structure over the first waveguide and the vias, wherein the first redistribution structure is electrically connected to the vias; connecting a first semiconductor device to the first redistribution structure; removing a first portion of the substrate to form a first recess, wherein the first recess exposes the oxide layer; and filling the first recess with a first dielectric material to form a first dielectric region.

Abstract: A method of fabricating a semiconductor structure includes providing a first substrate comprising a first side and a second side opposite to the first side. A package is attached to the first side of the first substrate. A second substrate is attached to the second side of the first substrate. A plurality of electrical connectors is bonded between the second side of the first substrate and the second substrate. A lid is attached to the first substrate and the second substrate. The lid includes a ring part and a plurality of overhang parts. The ring part is over the first side of the first substrate. The plurality of overhang parts extends from corner sidewalls of the ring part toward the second substrate. The plurality of overhang parts are laterally aside the plurality of electrical connectors.

Abstract: A semiconductor device includes a first electronic component, a second electronic component, a third electronic component, a plurality of first interconnection structures, and a plurality of second interconnection structures. The second electronic component is between the first electronic component and the third electronic component. The first interconnection structures are between and electrically connected to the first electronic component and the second electronic component. Each of the first interconnection structures has a length along a first direction substantially parallel to a surface of the first electronic component and a width along a second direction substantially parallel to the surface and substantially perpendicular to the first direction. The length is larger than the width. The second interconnection structures are between and electrically connected to the second electronic component and the third electronic component.

Abstract: A device includes a first package connected to an interconnect substrate, wherein the interconnect substrate includes conductive routing; and a second package connected to the interconnect substrate, wherein the second package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler and to a photodetector; a via extending through the substrate; an interconnect structure over the photonic layer, wherein the interconnect structure is connected to the photodetector and to the via; and an electronic die bonded to the interconnect structure, wherein the electronic die is connected to the interconnect structure.

Abstract: A package assembly includes a package substrate including a first die that includes a photonic integrated circuit, a second die located on the first die, the second die including an electronic integrated circuit electrically connected to the photonic integrated circuit, and an interposer module on the package substrate, at least a portion of the interposer module being located on the first die and electrically connected to the photonic integrated circuit.

Abstract: One embodiment includes partially forming a first through via in a substrate of an interposer, the first through via extending into a first side of the substrate of the interposer. The method also includes bonding a first die to the first side of the substrate of the interposer. The method also includes recessing a second side of the substrate of the interposer to expose the first through via, the first through via protruding from the second side of the substrate of the interposer, where after the recessing, the substrate of the interposer is less than 50 ?m thick. The method also includes and forming a first set of conductive bumps on the second side of the substrate of the interposer, at least one of the first set of conductive bumps being electrically coupled to the exposed first through via.

Abstract: A semiconductor device includes a dielectric interposer, a first redistribution layer, a second redistribution layer and conductive structures. The conductive structures are through the dielectric interposer, wherein the conductive structures are electrically connected to the first redistribution layer and the second redistribution layer. Each of the conductive structures has a tapered profile. A width of each of the conductive structures proximal to the first redistribution layer is narrower than a width of each of the conductive structure proximal to the second redistribution layer.

Abstract: Semiconductor devices and methods of manufacture are provided. In embodiments the semiconductor device includes a substrate, a first interposer bonded to the substrate, a second interposer bonded to the substrate, a bridge component electrically connecting the first interposer to the second interposer, two or more first dies bonded to the first interposer; and two or more second dies bonded to the second interposer.

Abstract: A method includes bonding a first package component over a second package component, dispensing a first underfill between the first package component and the second package component, and bonding a third package component over the second package component. A second underfill is between the third package component and the second package component. The first underfill and the second underfill are different types of underfills.

Abstract: Semiconductor package includes interposer, dies, encapsulant. Each die includes active surface, backside surface, side surfaces. Backside surface is opposite to active surface. Side surfaces join active surface to backside surface. Encapsulant includes first material and laterally wraps dies. Dies are electrically connected to interposer and disposed side by side on interposer with respective backside surfaces facing away from interposer. At least one die includes an outer corner. A rounded corner structure is formed at the outer corner. The rounded corner structure includes second material different from first material. The outer corner is formed by backside surface and a pair of adjacent side surfaces of the at least one die. The side surfaces of the pair have a common first edge. Each side surface of the pair does not face other dies and has a second edge in common with backside surface of the at least one die.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes first and second package components stacked upon and electrically connected to each other. The first package component includes first and second conductive bumps, the second package component includes third and fourth conductive bumps, and dimensions of the first and second conductive bumps are less than those of the third and fourth conductive bumps. The semiconductor package includes a first joint structure partially wrapping the first conductive bump and the third conductive bump, and a second joint structure partially wrapping the second conductive bump and the fourth conductive bump. A curvature of the first joint structure is different from a curvature of the second joint structure.

Abstract: A semiconductor package includes first and second package components stacked upon and electrically connected to each other, and first and second joint structures. The first package component includes first and second conductive bumps, the second package component includes third and fourth conductive bumps having dimensions greater than those of the first and second conductive bumps. The first joint structure partially covers the first and third conductive bumps. The second joint structure partially covers the second and the fourth conductive bumps. A first angle between a sidewall of the first conductive bump and a tangent line at an end point of a boundary of the first joint structure on the first conductive bump is greater than a second angle between a sidewall of the second conductive bump and a tangent line at an end point of a boundary of the second joint structure on the second conductive bump.

Abstract: A method includes attaching semiconductor devices to an interposer structure, attaching the interposer structure to a first carrier substrate, attaching integrated passive devices to the first carrier substrate, forming an encapsulant over the semiconductor devices and the integrated passive devices, debonding the first carrier substrate, attaching the encapsulant and the semiconductor devices to a second carrier substrate, forming a first redistribution structure on the encapsulant, the interposer structure, and the integrated passive devices, wherein the first redistribution structure contacts the interposer structure and the integrated passive devices, and forming external connectors on the first redistribution structure.

Abstract: A semiconductor device includes a first Chip-On-Wafer (CoW) device having a first interposer and a first die attached to a first side of the first interposer; a second CoW device having a second interposer and a second die attached to a first side of the second interposer, the second interposer being laterally spaced apart from the first interposer; and a redistribution structure extending along a second side of the first interposer opposing the first side of the first interposer and extending along a second side of the second interposer opposing the first side of the second interposer, the redistribution structure extending continuously from the first CoW device to the second CoW device.

Abstract: A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.

Abstract: A semiconductor device includes a circuit substrate, a semiconductor package, connective terminals and supports. The circuit substrate has a first side and a second side opposite to the first side. The semiconductor package is connected to the first side of the circuit substrate. The connective terminals are located on the second side of the circuit substrate and are electrically connected to the semiconductor package via the circuit substrate. The supports are located on the second side of the circuit substrate beside the connective terminals. A material of the supports has a melting temperature higher than a melting temperature of the connective terminals.