Abstract: A centrifuge device, including a base, a rotation platform, and a lock module, is provided. The rotation platform is disposed on the base and adapted to support a rotor of a centrifugal bowl. The rotor is rotatably connected to a stator of the centrifugal bowl. The lock module includes a main body, a lock assembly, and a positioning component. The main body is disposed on the base. The lock assembly is movably connected to the main body and located above the rotation platform. The lock assembly is adapted to be operated to a first state to lock the stator and a second state to be separated from the stator. The positioning component is movably connected to the main body. The positioning component is adapted to move to a first position to position the lock assembly to the first state and a second position to release the lock assembly.

Abstract: Methods for, and structures formed by, wet process assisted approaches implemented in a replacement gate process are provided. Generally, in some examples, a wet etch process for removing a capping layer can form a first monolayer on the underlying layer as an adhesion layer and a second monolayer on, e.g., an interfacial dielectric layer between a gate spacer and a fin as an etch protection mechanism. Generally, in some examples, a wet process can form a monolayer on a metal layer, like a barrier layer of a work function tuning layer, as a hardmask for patterning of the metal layer.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate, wherein the gate stack has a first portion and a second portion under the first portion, and the first portion is wider than the second portion. The semiconductor device structure includes a first spacer and a second spacer over opposite sides of the gate stack. The first spacer has a first upper portion and a first lower portion, the second spacer has a second upper portion and a second lower portion. The first spacer has a first recess, the first upper portion is between the first recess and the gate stack, the first lower portion is under the first recess, and the first recess has a first inner wall facing away from the gate stack.

Abstract: A first dielectric layer is formed over upper and side surfaces of a semiconductor fin structure. A mask layer is formed over a first portion of the first dielectric layer disposed over the upper surface of the fin structure. The mask layer and the first dielectric layer have different material compositions. Second portions of the first dielectric layer disposed on side surfaces of the fin structure are etched. The mask layer protects the first portion of the first dielectric layer from being etched. A second dielectric layer is formed over the mask layer and the side surfaces of the fin structure. An oxidation process is performed to convert the mask layer into a dielectric material having substantially a same material composition as the first or second dielectric layer. The dielectric material and remaining portions of the first or second dielectric layer collectively serve as a gate dielectric of a transistor.

Abstract: A method includes forming a first high-k dielectric layer over a first semiconductor region, forming a second high-k dielectric layer over a second semiconductor region, forming a first metal layer comprising a first portion over the first high-k dielectric layer and a second portion over the second high-k dielectric layer, forming an etching mask over the second portion of the first metal layer, and etching the first portion of the first metal layer. The etching mask protects the second portion of the first metal layer. The etching mask is ashed using meta stable plasma. A second metal layer is then formed over the first high-k dielectric layer.

Abstract: A method includes providing a semiconductor substrate; epitaxially growing a blocking layer from a top surface of the semiconductor substrate, wherein the blocking layer has a lattice constant different from the semiconductor substrate; epitaxially growing a semiconductor layer above the blocking layer; patterning the semiconductor layer to form a semiconductor fin, wherein the blocking layer is under the semiconductor fin; forming a source/drain (S/D) feature in contact with the semiconductor fin; and forming a gate structure engaging the semiconductor fin.

Abstract: A touch sensing system is provided. The touch sensing system includes a touch panel including touch sensors arranged in a grid along row and column directions; a touch controller including at least one transmission circuit to transmit a signal to the touch sensors and at least one reception circuit to detect a signal from the touch sensors; and a switching circuit to selectively connect each of the touch sensors to the at least one transmission circuit and the at least one reception circuit in accordance with an operation mode. The switching circuit connects each of the touch sensors to the at least one reception circuit in a touch mode and connects a first portion of the touch sensors to the at least one reception circuit and a second portion of the touch sensors to the at least one transmission circuit in a proximity mode.

Abstract: A semiconductor package includes a package substrate having a top surface and a bottom surface, and a stiffener ring mounted on the top surface of the package substrate. The stiffener ring includes a reinforcement rib that is coplanar with the stiffener ring on the top surface of the package substrate. At least two compartments are defined by the stiffener ring and the reinforcement rib. At least two individual chip packages are mounted on chip mounting regions within the at least two compartments, respectively, thereby constituting a package array on the package substrate.

Abstract: A centrifuge bowl is configured to separate a first component and a second component in a sample. The centrifuge bowl includes a shell, a core, a separation cavity, and a stator head. The shell includes an upper shell part, a middle shell part, a lower shell part, and a bottom shell part. The core is arranged in the shell. The separation cavity is arranged between the lower shell part and the core. The stator head is arranged on the shell and includes an input tube and an output tube. The sample enters the separation cavity via the input tube. When the shell and the core rotate on a rotation axis, the sample in the separation cavity is separated into the first component and the second component according to a magnitude of an inertial force. In addition, a blood centrifuge system including the above centrifuge bowl is provided.

Abstract: A method of forming a semiconductor device includes: forming a first conductive feature in a first dielectric layer disposed over a substrate; forming a second dielectric layer over the first dielectric layer; etching the second dielectric layer using a patterned mask layer to form an opening in the second dielectric layer, where the opening exposes the first conductive feature; performing an ashing process to remove the patterned mask layer after the etching; wet cleaning the opening after the ashing process, where the wet cleaning enlarges a bottom portion of the opening; and filling the opening with a first electrically conductive material.

Abstract: Electrical connector grounding structure includes electrically insulative housing having accommodation hole located on base thereof and tongue plate forwardly extended from base, conducting terminal sets positioned in electrically insulative housing and including one or more than one grounding terminal, one or more than one power terminal and plurality of signal terminals, conducting member mounted in accommodation hole and having first contact portion located at top and second contact portion downwardly extended from first contact portion and kept in contact with grounding terminal, and shielding shell surrounding electrically insulative housing and kept in contact with first contact portion.

Abstract: An embodiment method includes: forming a semiconductor liner layer on exposed surfaces of a fin structure that extends above a dielectric isolation structure disposed over a substrate; forming a first capping layer to laterally surround a bottom portion of the semiconductor liner layer; forming a second capping layer over an upper portion of the semiconductor liner layer; and annealing the fin structure having the semiconductor liner layer, the first capping layer, and the second capping layer thereon, the annealing driving a dopant from the semiconductor liner layer into the fin structure, wherein a dopant concentration profile in a bottom portion of the fin structure is different from a dopant concentration profile in an upper portion of the fin structure.

Abstract: A semiconductor device includes a gate electrode, spacers and a hard mask structure. The spacers are disposed on opposite sidewalls of the gate electrode. The hard mask structure includes a first hard mask layer and a second hard mask layer. A lower portion of the first hard mask layer is disposed between the spacers and on the gate electrode, and a top portion of the first hard mask layer is surrounded by the second hard mask layer.

Abstract: Electrical connector grounding structure includes electrically insulative housing having accommodation hole located on base thereof and tongue plate forwardly extended from base, conducting terminal sets positioned in electrically insulative housing and including one or more than one grounding terminal, one or more than one power terminal and plurality of signal terminals, conducting member mounted in accommodation hole and having first contact portion located at top and second contact portion downwardly extended from first contact portion and kept in contact with grounding terminal, and shielding shell surrounding electrically insulative housing and kept in contact with first contact portion.

Abstract: A semiconductor device includes a substrate, a first active fin, a second active fin, a dummy fin and a first gate structure. The first and the second active fin are on the substrate and extend along a first direction. The dummy fin is disposed between the first active fin and the second active fin, and extends in the first direction. The dummy fin includes a plurality of layers, and each of the layers includes a material different from another layer. The first gate structure crosses over the dummy fin, the first and the second active fins.

Abstract: Methods for, and structures formed by, wet process assisted approaches implemented in a replacement gate process are provided. Generally, in some examples, a wet etch process for removing a capping layer can form a first monolayer on the underlying layer as an adhesion layer and a second monolayer on, e.g., an interfacial dielectric layer between a gate spacer and a fin as an etch protection mechanism. Generally, in some examples, a wet process can form a monolayer on a metal layer, like a barrier layer of a work function tuning layer, as a hardmask for patterning of the metal layer.

Abstract: A compressor (10) includes a compression mechanism (18) and a driveshaft (62) that drives the compression mechanism (18). The driveshaft (62) may include a first axially extending passage (94), a second axially extending passage (96), and a lubricant distribution passage (100). The first and second axially extending passages (94, 96) may be radially offset from each other and may intersect each other at an overlap region (98). The first and second axially extending passages (94, 96) are in fluid communication with each other at the overlap region (98). The lubricant distribution passage (100) may extend from the first axially extending passage (94) through an outer diametrical surface of the driveshaft (62). The lubricant distribution passage (100) may be disposed at a first axial distance (D1) from a first axial end (90) of the driveshaft (62). A first axial end of the overlap region (98) may be disposed at a second axial distance (D2) from the first axial end (90) of the drive shaft (62).

Abstract: An electrical connector is disclosed. The electrical connector has a casing, a terminal seat and a conductive plastic element. The terminal seat is mounted in the casing and has an insulator board and a terminal set. The terminal set has a ground terminal and a high-speed signal terminal set. One side of the conductive plastic element is mounted on an inner wall of the casing and another side thereof passes through the insulator board to be close to the high-speed signal terminal set. When the casing is electrically connected to a ground, the conductive plastic element is electrically connected to the ground through the casing. Therefore, the conductive plastic element may eliminate a noise interference caused by the high-speed signal terminal set during high-speed transmission. A crosstalk and a common-mode interference are also reduced to keep the stability of signal transmission of the electrical connector.

Abstract: A method includes forming a first high-k dielectric layer over a first semiconductor region, forming a second high-k dielectric layer over a second semiconductor region, forming a first metal layer comprising a first portion over the first high-k dielectric layer and a second portion over the second high-k dielectric layer, forming an etching mask over the second portion of the first metal layer, and etching the first portion of the first metal layer. The etching mask protects the second portion of the first metal layer. The etching mask is ashed using meta stable plasma. A second metal layer is then formed over the first high-k dielectric layer.

Abstract: A filter material and a manufacturing method thereof are provided. The manufacturing method includes hydrophilizing the filter material by supercritical fluid processing technology, so as to filter out white blood cells in the blood.