Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a target layer over a substrate and forming a seed layer over the target layer. The method includes forming a hard mask layer over the seed layer, and the hard mask layer includes an opening to expose a portion of the seed layer. The method includes forming a conductive layer in the opening, and the conductive layer is selectively formed on the portion of the seed layer. The method includes etching a portion of the target layer by using the conductive layer as a mask.

Abstract: A regulator includes a driver circuit, an amplifier circuit, a first current source circuit and a second current source circuit. The driver circuit is configured to receive an input voltage and provide an output voltage. The first current source circuit is configured to provide a first current to the amplifier circuit. The second current source circuit is configured to provide a second current to the amplifier circuit according to the output voltage if the output voltage deviates from a predetermined voltage. The amplifier circuit is configured to control the driver circuit according to the output voltage and a third current, in which the third current is a sum of the first current and the second current.

Abstract: The invention relates to a use of an aurantiamide dipepetide derivative in the treatment or prevention of angiogenesis-related diseases. Accordingly, aurantiamide dipeptide derivatives can be used as angiogenesis inhibitor, whereby preventing or treating invasive and metastatic cancer and ocular neovascularization (particularly macular degeneration such as pathological neovascularization of age-related macular degeneration (AMD)).

Abstract: The present invention discloses a temperature insensitive testing device comprising: a transmission-end test sequence generating circuit to generate a test sequence; a transmission circuit to process the test sequence according to a transmission clock and thereby generate a test signal; a reception circuit to process an echo of the test signal and generate a digital echo signal; a correlation-value generating circuit to generate correlation values including a maximum correlation value according to the test sequence and the digital echo signal; and a decision circuit to determine whether a relation between the maximum correlation value and at least one threshold satisfies a predetermined condition and thereby generate a decision result, wherein the frequency of the transmission clock is lower than a predetermined frequency which confines the variation of the maximum correlation value to a predetermined range provided that the temperature variation of the transmission cable is within a temperature variation ran

Abstract: A semiconductor/dielectric interface having reduced interface trap density and a method of manufacturing the interface are disclosed. In an exemplary embodiment, the method of forming a semiconductor device includes receiving a substrate and forming a termination layer on a top surface of the substrate. The termination layer includes at least one of hydrogen, deuterium, or nitrogen. The method further includes depositing a dielectric layer on the termination layer such that the depositing of the dielectric layer does not disrupt the termination layer. The termination layer may be formed by a first deposition process that deposits a first material of the termination layer and a subsequent deposition process that introduces a second material of the termination layer into the first material. The termination layer may also be formed by a single deposition process that deposits both a first material and a second material of the termination layer.

Abstract: A transmission line driver circuit includes: a transmission line driving amplifier having a first transmission terminal and a second transmission terminal; a first signal node; a second signal node; a first adjustable resistor positioned between the first transmission terminal and the first signal node; a second adjustable resistor positioned between the second transmission terminal and the second signal node; an internal node; a first divider resistor positioned between the first signal node and the internal node; a second divider resistor positioned between the second signal node and the internal node; a comparing circuit for comparing a divided voltage at the internal node with a reference voltage to generate a comparison signal; and an adjusting circuit for adjusting resistance of at least one of the first and second adjustable resistors according to the comparison signal.

Abstract: An impedance adjustment method for a communication device, wherein the communication device has a plurality of impedance paths for selection, includes: selecting an initial impedance path; and utilizing a predetermined algorithm to examine a portion of the plurality of impedance paths by starting from the initial impedance path for selecting an optimized impedance path for the communication device. A delay capacitance adjustment method for a communication device, wherein the communication device has a plurality of delay capacitance paths for selection, includes: selecting an initial delay capacitance path; and utilizing a predetermined algorithm to examine a portion of the plurality of delay capacitance paths by starting from the initial delay capacitance path for selecting an optimized delay capacitance path of the communication device.

Abstract: The present invention discloses a parameter generating device and the method thereof to generate a parameter for circuit operation in which the parameter corresponds to an N degree polynomial of a characteristic curve while said N is a positive integer. The parameter generating device comprises: a storage circuit to store at least N+1 initial values that are determined by a start value and a unit variation amount; and a parameter calculating circuit, coupled to the storage circuit, to carry out addition calculation for at least [(K?1)×N+1] time(s) if a multiple K is positive or subtraction calculation for at least ?K×N time(s) if the multiple K is negative, so as to generate the aforementioned parameter, wherein the multiple K is derived from a difference divided by the unit variation amount while the difference is a current value minus the start value.

Abstract: A channel detection method for an echo canceller of a communication device is provided. The method includes the following steps. A first detection signal is transmitted to an end of a channel coupled to the communication device. A plurality of taps corresponding to a reflected signal of the first detection signal are received by an echo canceller at the end of the channel. The taps corresponding to the reflected signal are compared with a reference value corresponding to each of the taps so as to determine whether each of the taps is larger than or equal to the corresponding reference value. When the tap is determined to be larger than or equal to the reference value corresponding to the tap, the tap and a position of the tap are recorded.

Abstract: The present invention discloses a current balancing device and method capable of balancing an output current and an input current of a current loop. Said device comprises: a transmission circuit for outputting an output current and receiving an input current; at least one adjustable resistor set in the current loop for providing resistance according to at least one adjustment signal; and a current balancing circuit, coupled to the transmission circuit and the adjustable resistor, for determining whether the difference between the output and input currents satisfies a predetermined requirement in light of a predetermined duration and thereby generating the adjustment signal, wherein if the difference between the output and input currents fails to satisfy the predetermined requirement, the current balancing circuit will adjust the resistance of the adjustable resistor through the adjustment signal, so as to reduce the difference between the output and input currents.

Abstract: A power management method for a health care device is included. The method includes: detecting whether a smart garment is in contact with a user body; operating the health care device in a normal mode when the smart garment is in contact with the user body, or operating the health care device in a low-power mode when the smart garment is not in contact with the user body; and under the low-power mode, detecting whether the health care device is tapped to determine whether to transmit user health data to a user device.

Abstract: A transmission line driver circuit includes: a transmission line driving amplifier having a first transmission terminal and a second transmission terminal; a first signal node; a second signal node; a first adjustable resistor positioned between the first transmission terminal and the first signal node; a second adjustable resistor positioned between the second transmission terminal and the second signal node; a first voltage difference generating circuit coupled with two terminals of the first adjustable resistor to generate a first voltage difference value; a second voltage difference generating circuit coupled with two terminals of the second adjustable resistor to generate a second voltage difference value; sample-and-hold circuits for generating sampled signals according to the first voltage difference value and the second voltage difference value; a comparing circuit for comparing the sampled signals; and an adjusting circuit for adjusting resistance of the first and/or second adjustable resistors accor

Abstract: A semiconductor/dielectric interface having reduced interface trap density and a method of manufacturing the interface are disclosed. In an exemplary embodiment, the method comprises receiving a substrate, the substrate containing a semiconductor; preparing a surface of the substrate; forming a termination layer bonded to the semiconductor at the surface of the substrate; and depositing a dielectric layer above the termination layer, the depositing configured to not disrupt the termination layer. The forming of the termination layer may be configured to produce the termination layer having a single layer of oxygen atoms between the substrate and the dielectric layer.

Abstract: A biasing voltage generating circuit for generating a required reverse biasing voltage of an avalanche photodiode (APD) includes: a boost power converter configured to operably convert an input voltage into a higher output voltage according to a feedback signal and a reference signal, and to apply the output voltage to be a reverse biasing voltage of the APD; a reference signal generating circuit configured to operably generate the reference signal; and a control circuit. The control circuit includes: a signal sensing circuit configured to operably generate a sensed signal corresponding to an output current of the APD; an analog-to-digital converter (ADC) configured to operably convert the sensed signal into a digital signal; and a processing circuit configured to operably adjust the feedback signal or the reference signal according to the digital signal to thereby control the boost power converter to adjust the output voltage.

Abstract: A transmission line driver circuit includes: a transmission line driving amplifier having a first transmission terminal and a second transmission terminal; a first signal node; a second signal node; a first adjustable resistor positioned between the first transmission terminal and the first signal node; a second adjustable resistor positioned between the second transmission terminal and the second signal node; an internal node; a first divider resistor positioned between the first signal node and the internal node; a second divider resistor positioned between the second signal node and the internal node; a comparing circuit for comparing a divided voltage at the internal node with a reference voltage to generate a comparison signal; and an adjusting circuit for adjusting resistance of at least one of the first and second adjustable resistors according to the comparison signal.

Abstract: A transmission line driver circuit includes: a transmission line driving amplifier having a first transmission terminal and a second transmission terminal; a first signal node; a second signal node; a first adjustable resistor positioned between the first transmission terminal and the first signal node; a second adjustable resistor positioned between the second transmission terminal and the second signal node; a first voltage difference generating circuit coupled with two terminals of the first adjustable resistor to generate a first voltage difference value; a second voltage difference generating circuit coupled with two terminals of the second adjustable resistor to generate a second voltage difference value; sample-and-hold circuits for generating sampled signals according to the first voltage difference value and the second voltage difference value; a comparing circuit for comparing the sampled signals; and an adjusting circuit for adjusting resistance of the first and/or second adjustable resistors accor

Abstract: The present invention discloses a DC-to-DC converter of discontinuous conduction mode capable of preventing an inductor current from being reduced to zero under an idle state, comprising: an inductor operable to output the inductor current according to a DC-input signal under an energy-storage state, output the inductor current according to the DC-input signal and a DC-output signal under an energy-release state, and keep the inductor current unchanged under the idle state; a freewheel switch operable to be conductive under the idle state and nonconductive under the energy-storage and energy-release states according to a freewheel-control signal and form a current loop with the inductor; a current sensing circuit operable to detect the inductor current and generate a current-detection signal; and a control circuit operable to generate the freewheel-control signal according to the current-detection signal and control the state of the converter to be the energy-storage state, energy-release state or idle state.

Abstract: A voltage regulating apparatus is disclosed. The voltage regulating apparatus includes: a power transistor having a control terminal, a first terminal for receiving a power supply, and a second terminal for providing an output voltage; a feedback circuit coupled to the second terminal, configured for providing a feedback voltage according to the output voltage; an amplifier having a source current unit and a sink current unit, configured for driving the power transistor through the control terminal by use of the source and sink current units according to a reference voltage and the feedback voltage; and a transient enhancement unit configured for monitoring the source and sink current units, and regulating a voltage at the control terminal according to the monitored result.

Abstract: The present invention discloses a temperature insensitive testing device comprising: a transmission-end test sequence generating circuit to generate a test sequence; a transmission circuit to process the test sequence according to a transmission clock and thereby generate a test signal; a reception circuit to process an echo of the test signal and generate a digital echo signal; a correlation-value generating circuit to generate correlation values including a maximum correlation value according to the test sequence and the digital echo signal; and a decision circuit to determine whether a relation between the maximum correlation value and at least one threshold satisfies a predetermined condition and thereby generate a decision result, wherein the frequency of the transmission clock is lower than a predetermined frequency which confines the variation of the maximum correlation value to a predetermined range provided that the temperature variation of the transmission cable is within a temperature variation ran

Abstract: The present invention discloses a current balancing device and method capable of balancing an output current and an input current of a current loop. Said device comprises: a transmission circuit for outputting an output current and receiving an input current; at least one adjustable resistor set in the current loop for providing resistance according to at least one adjustment signal; and a current balancing circuit, coupled to the transmission circuit and the adjustable resistor, for determining whether the difference between the output and input currents satisfies a predetermined requirement in light of a predetermined duration and thereby generating the adjustment signal, wherein if the difference between the output and input currents fails to satisfy the predetermined requirement, the current balancing circuit will adjust the resistance of the adjustable resistor through the adjustment signal, so as to reduce the difference between the output and input currents.