Patents by Inventor Shijian Luo

Shijian Luo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10134655
    Abstract: Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. An uppermost semiconductor die of the stack of semiconductor dice located on a side of the stack of semiconductor dice opposite the substrate may be a heat-generating component configured to generate more heat than each other semiconductor die of the stack of semiconductor dice. Electrical connectors may extend directly from the uppermost semiconductor die to the substrate.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: November 20, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Steven Groothuis, Jian Li, Shijian Luo
  • Patent number: 10103134
    Abstract: Methods of making semiconductor device packages may involve attaching a first semiconductor die to a carrier wafer, an inactive surface of the first semiconductor die facing the carrier wafer. One or more additional semiconductor die may be stacked on the first semiconductor die on a side of the first semiconductor die opposite the carrier wafer to form a stack of semiconductor dice. A protective material may be positioned over the stack of semiconductor dice, a portion of the protective material extending along side surfaces of the first semiconductor die to a location proximate the inactive surface of the first semiconductor die. The carrier wafer may be detached from the first semiconductor die.
    Type: Grant
    Filed: October 9, 2017
    Date of Patent: October 16, 2018
    Inventors: Wei Zhou, Aibin Yu, Zhaohui Ma, Sony Varghese, Jonathan S. Hacker, Bret K. Street, Shijian Luo
  • Publication number: 20180158751
    Abstract: Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. An uppermost semiconductor die of the stack of semiconductor dice located on a side of the stack of semiconductor dice opposite the substrate may be a heat-generating component configured to generate more heat than each other semiconductor die of the stack of semiconductor dice. Electrical connectors may extend directly from the uppermost semiconductor die to the substrate.
    Type: Application
    Filed: January 18, 2018
    Publication date: June 7, 2018
    Inventors: Steven Groothuis, Jian Li, Shijian Luo
  • Patent number: 9899293
    Abstract: Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. An uppermost semiconductor die of the stack of semiconductor dice located on a side of the stack of semiconductor dice opposite the substrate may be a heat-generating component configured to generate more heat than each other semiconductor die of the stack of semiconductor dice. Electrical connectors may extend directly from the uppermost semiconductor die to the substrate. A heat sink may be located on a side of the uppermost semiconductor die opposite the substrate. A passivation material may be located between the uppermost semiconductor die and the heat sink.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: February 20, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Steven Groothuis, Jian Li, Shijian Luo
  • Publication number: 20180033766
    Abstract: Provided are a device packing facility and method using DEHT and a device processing apparatus utilizing the DEHT. The device packaging facility includes a mounting unit providing bis(2-ethylhexyl) terephthalate (DEHT) between first and second devices to attach the first and second devices to each other, a processing unit thermally processing the first and second devices that are attached to each other to remove the DEHT and fix the first and second devices to each other, and a transfer unit transferring the first and second devices that are attached to each other from the mounting unit to the processing unit.
    Type: Application
    Filed: June 21, 2017
    Publication date: February 1, 2018
    Applicant: SEMlgear, Inc.
    Inventors: Jian ZHANG, Joshua PINNOLIS, Shijian LUO
  • Publication number: 20180033781
    Abstract: Methods of making semiconductor device packages may involve attaching a first semiconductor die to a carrier wafer, an inactive surface of the first semiconductor die facing the carrier wafer. One or more additional semiconductor die may be stacked on the first semiconductor die on a side of the first semiconductor die opposite the carrier wafer to form a stack of semiconductor dice. A protective material may be positioned over the stack of semiconductor dice, a portion of the protective material extending along side surfaces of the first semiconductor die to a location proximate the inactive surface of the first semiconductor die. The carrier wafer may be detached from the first semiconductor die.
    Type: Application
    Filed: October 9, 2017
    Publication date: February 1, 2018
    Inventors: Wei Zhou, Aibin Yu, Zhaohui Ma, Sony Varghese, Jonathan S. Hacker, Bret K. Street, Shijian Luo
  • Patent number: 9865578
    Abstract: Methods of making semiconductor device packages may involve attaching a first semiconductor die to a carrier wafer, an inactive surface of the first semiconductor die facing the carrier wafer. One or more additional semiconductor die may be stacked on the first semiconductor die on a side of the first semiconductor die opposite the carrier wafer to form a stack of semiconductor dice. A protective material may be positioned over the stack of semiconductor dice, a portion of the protective material extending along side surfaces of the first semiconductor die to a location proximate the inactive surface of the first semiconductor die. The carrier wafer may be detached from the first semiconductor die.
    Type: Grant
    Filed: June 4, 2015
    Date of Patent: January 9, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Wei Zhou, Aibin Yu, Zhaohui Ma, Sony Varghese, Jonathan S. Hacker, Bret K. Street, Shijian Luo
  • Patent number: 9824998
    Abstract: Provided are a device packing facility and method using DEHT and a device processing apparatus utilizing the DEHT. The device packaging facility includes a mounting unit providing bis(2-ethylhexyl) terephthalate (DEHT) between first and second devices to attach the first and second devices to each other, a processing unit thermally processing the first and second devices that are attached to each other to remove the DEHT and fix the first and second devices to each other, and a transfer unit transferring the first and second devices that are attached to each other from the mounting unit to the processing unit.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: November 21, 2017
    Assignee: Semigear, Inc.
    Inventors: Jian Zhang, Joshua Pinnolis, Shijian Luo
  • Patent number: 9741683
    Abstract: Provided are a device packing facility and method using phthalate and a device processing apparatus utilizing the phthalate. The device packaging facility includes a mounting unit providing phthalate between first and second devices to attach the first and second devices to each other, a processing unit thermally processing the first and second devices that are attached to each other to remove the phthalate and fix the first and second devices to each other, and a transfer unit transferring the first and second devices that are attached to each other from the mounting unit to the processing unit.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: August 22, 2017
    Assignee: Semigear, Inc.
    Inventors: Jian Zhang, Joshua Pinnolis, Shijian Luo
  • Publication number: 20170117205
    Abstract: Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. An uppermost semiconductor die of the stack of semiconductor dice located on a side of the stack of semiconductor dice opposite the substrate may be a heat-generating component configured to generate more heat than each other semiconductor die of the stack of semiconductor dice. Electrical connectors may extend directly from the uppermost semiconductor die to the substrate. A heat sink may be located on a side of the uppermost semiconductor die opposite the substrate. A passivation material may be located between the uppermost semiconductor die and the heat sink.
    Type: Application
    Filed: January 9, 2017
    Publication date: April 27, 2017
    Inventors: Steven Groothuis, Jian Li, Shijian Luo
  • Patent number: 9543274
    Abstract: Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. The stack of semiconductor dice may include vias extending through each semiconductor die of the stack for electrically interconnecting the semiconductor dice in the stack to one another and to the substrate. Another semiconductor die may be electrically connected to the stack of semiconductor dice and may be located on a side of the stack of semiconductor dice opposing the substrate. The other semiconductor die may be a heat-generating component configured to generate more heat than each semiconductor die of the stack of semiconductor dice. Electrical connectors may be located laterally adjacent to the vias and may form electrical connections between the substrate and the other semiconductor die in isolation from integrated circuitry of the semiconductor dice in the stack.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: January 10, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Steven Groothuis, Jian Li, Shijian Luo
  • Publication number: 20160358898
    Abstract: Methods of making semiconductor device packages may involve attaching a first semiconductor die to a carrier wafer, an inactive surface of the first semiconductor die facing the carrier wafer. One or more additional semiconductor die may be stacked on the first semiconductor die on a side of the first semiconductor die opposite the carrier wafer to form a stack of semiconductor dice. A protective material may be positioned over the stack of semiconductor dice, a portion of the protective material extending along side surfaces of the first semiconductor die to a location proximate the inactive surface of the first semiconductor die. The carrier wafer may be detached from the first semiconductor die.
    Type: Application
    Filed: June 4, 2015
    Publication date: December 8, 2016
    Inventors: Wei Zhou, Aibin Yu, Zhaohui Ma, Sony Varghese, Jonathan S. Hacker, Bret K. Street, Shijian Luo
  • Publication number: 20160336294
    Abstract: Provided are a device packing facility and method using phthalate and a device processing apparatus utilizing the phthalate. The device packaging facility includes a mounting unit providing phthalate between first and second devices to attach the first and second devices to each other, a processing unit thermally processing the first and second devices that are attached to each other to remove the phthalate and fix the first and second devices to each other, and a transfer unit transferring the first and second devices that are attached to each other from the mounting unit to the processing unit.
    Type: Application
    Filed: July 28, 2016
    Publication date: November 17, 2016
    Applicant: SEMlgear, Inc.
    Inventors: Jian ZHANG, Joshua PINNOLIS, Shijian LUO
  • Publication number: 20160336293
    Abstract: Provided are a device packing facility and method using DEHT and a device processing apparatus utilizing the DEHT. The device packaging facility includes a mounting unit providing bis(2-ethylhexyl) terephthalate (DEHT) between first and second devices to attach the first and second devices to each other, a processing unit thermally processing the first and second devices that are attached to each other to remove the DEHT and fix the first and second devices to each other, and a transfer unit transferring the first and second devices that are attached to each other from the mounting unit to the processing unit.
    Type: Application
    Filed: July 27, 2016
    Publication date: November 17, 2016
    Applicant: SEMIgear, Inc.
    Inventors: Jian ZHANG, Joshua Pinnolis, Shijian Luo
  • Patent number: 9472531
    Abstract: Provided are a device packing facility and method using phthalate and a device processing apparatus utilizing the phthalate. The device packaging facility includes a mounting unit providing phthalate between first and second devices to attach the first and second devices to each other, a processing unit thermally processing the first and second devices that are attached to each other to remove the phthalate and fix the first and second devices to each other, and a transfer unit transferring the first and second devices that are attached to each other from the mounting unit to the processing unit.
    Type: Grant
    Filed: February 6, 2015
    Date of Patent: October 18, 2016
    Assignee: Semigear, Inc.
    Inventors: Jian Zhang, Joshua Pinnolis, Shijian Luo
  • Publication number: 20160233191
    Abstract: Provided are a device packing facility and method using phthalate and a device processing apparatus utilizing the phthalate. The device packaging facility includes a mounting unit providing phthalate between first and second devices to attach the first and second devices to each other, a processing unit thermally processing the first and second devices that are attached to each other to remove the phthalate and fix the first and second devices to each other, and a transfer unit transferring the first and second devices that are attached to each other from the mounting unit to the processing unit.
    Type: Application
    Filed: February 6, 2015
    Publication date: August 11, 2016
    Inventors: Jian ZHANG, Joshua PINNOLIS, Shijian LUO
  • Publication number: 20160218085
    Abstract: Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. The stack of semiconductor dice may include vias extending through each semiconductor die of the stack for electrically interconnecting the semiconductor dice in the stack to one another and to the substrate. Another semiconductor die may be electrically connected to the stack of semiconductor dice and may be located on a side of the stack of semiconductor dice opposing the substrate. The other semiconductor die may be a heat-generating component configured to generate more heat than each semiconductor die of the stack of semiconductor dice. Electrical connectors may be located laterally adjacent to the vias and may form electrical connections between the substrate and the other semiconductor die in isolation from integrated circuitry of the semiconductor dice in the stack.
    Type: Application
    Filed: January 26, 2015
    Publication date: July 28, 2016
    Inventors: Steven Groothuis, Jian Li, Shijian Luo
  • Publication number: 20160141270
    Abstract: Stacked semiconductor die assemblies with improved thermal performance and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a stack of semiconductor dies and a thermally conductive casing at least partially enclosing the stack of semiconductor dies within an enclosure. A package substrate carries the thermally conductive casing, and an interposer is disposed between the thermally conductive casing and the stack of semiconductor dies. A peripheral portion of the interposer extends laterally beyond the stack of semiconductor dies and is coupled to a plurality of conductive members interposed between the peripheral portion and the package substrate.
    Type: Application
    Filed: January 27, 2016
    Publication date: May 19, 2016
    Inventors: Michel Koopmans, Shijian Luo, David R. Hembree
  • Patent number: 9269700
    Abstract: Stacked semiconductor die assemblies with improved thermal performance and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a stack of semiconductor dies and a thermally conductive casing at least partially enclosing the stack of semiconductor dies within an enclosure. A package substrate carries the thermally conductive casing, and an interposer is disposed between the thermally conductive casing and the stack of semiconductor dies. A peripheral portion of the interposer extends laterally beyond the stack of semiconductor dies and is coupled to a plurality of conductive members interposed between the peripheral portion and the package substrate.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: February 23, 2016
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Michel Koopmans, Shijian Luo, David R. Hembree
  • Patent number: 9269646
    Abstract: A semiconductor die assembly comprises a plurality of semiconductor dice in a stack. Another semiconductor die is adjacent to the stack and has a region, which may comprise a relatively higher power density region, extends peripherally beyond the stack. Conductive elements extend between and electrically interconnect integrated circuits of semiconductor dice in the stack and of the other semiconductor die. Thermal pillars are interposed between semiconductor dice of the stack, and a heat dissipation structure, such as a lid, is in contact with an uppermost die of the stack and the higher power density region of the other semiconductor die. Other die assemblies, semiconductor devices and methods of managing heat transfer within a semiconductor die assembly are also disclosed.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: February 23, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Shijian Luo, Xiao Li, Jian Li