Abstract: Semiconductor devices may include a first semiconductor die comprising a heat-generating region located at a periphery thereof. A second semiconductor die is attached to the first semiconductor die. At least a portion of the heat-generating region is located laterally outside a footprint of the second semiconductor die. A thermally insulating material is located on a side surface of the second semiconductor die. Methods of forming semiconductor devices may involve attaching a second semiconductor die to a first semiconductor die. The first semiconductor die includes a heat-generating region at a periphery thereof. At least a portion of the heat-generating region is located laterally outside a footprint of the second semiconductor die. A thermally insulating material is located on a side surface of the second semiconductor die.

Abstract: Temporary adhesives include a thermoplastic polymer comprising from about 30% by weight to about 80% by weight of the temporary adhesive, a solvent comprising from about 20% by weight to about 70% by weight of the temporary adhesive, and a filler material comprising from about 0.2% to about 5% by weight of the temporary adhesive. Methods of processing a semiconductor device wafer include bonding the semiconductor device wafer to a surface of a carrier substrate using a temporary adhesive including a filler material comprising from about 0.2% to about 5% by weight of the temporary adhesive, thinning the semiconductor device wafer, and, while the temporary adhesive remains on the surface of the carrier substrate proximate a peripheral edge thereof, subjecting the thinned semiconductor device wafer to one or more back side processing operations. Methods of forming a thinned semiconductor wafer include using such a temporary adhesive.

Abstract: Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a plurality of first semiconductor dies arranged in a stack and a second semiconductor die carrying the first semiconductor dies. The second semiconductor die can include a peripheral portion that extends laterally outward beyond at least one side of the first semiconductor dies. The semiconductor die assembly can further include a thermal transfer feature at the peripheral portion of the second semiconductor die. The first semiconductor dies can define a first thermal path, and the thermal transfer feature can define a second thermal path separate from the first semiconductor dies.

Abstract: Stacked semiconductor die assemblies with improved thermal performance and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a stack of semiconductor dies and a thermally conductive casing at least partially enclosing the stack of semiconductor dies within an enclosure. A package substrate carries the thermally conductive casing, and an interposer is disposed between the thermally conductive casing and the stack of semiconductor dies. A peripheral portion of the interposer extends laterally beyond the stack of semiconductor dies and is coupled to a plurality of conductive members interposed between the peripheral portion and the package substrate.

Abstract: A method for processing a substrate includes arranging a substrate including masked portions and unmasked portions in a process chamber; creating plasma in a process chamber; supplying a passivation gas mixture that includes nitrogen or carbon to create a plasma passivation gas mixture; exposing a substrate to the plasma passivation gas mixture to create a passivation layer on the unmasked portions of the substrate; supplying a stripping gas mixture that includes oxygen to the plasma to create a plasma stripping gas mixture; exposing the substrate to the plasma stripping gas mixture to strip at least part of the masked portions and at least part of the unmasked portions; and repeating creating the passivation layer and the stripping to remove a predetermined amount of the masked portions.

Abstract: Heat spreaders for dissipating heat from semiconductor devices comprise a contact surface located within a recess on an underside of the heat spreader, the contact surface being configured to physically and thermally attach to a semiconductor device, and a trench extending into the heat spreader adjacent to the contact surface sized and configured to receive underfill material extending from the semiconductor device into the trench. Related semiconductor device assemblies may include these heat spreaders and methods may include physically and thermally attaching these heat spreaders to semiconductor devices such that underfill material extends from a semiconductor device into the trench.

Abstract: Heat spreaders for dissipating heat from semiconductor devices comprise a contact surface located within a recess on an underside of the heat spreader, the contact surface being configured to physically and thermally attach to a semiconductor device, and a trench extending into the heat spreader adjacent to the contact surface sized and configured to receive underfill material extending from the semiconductor device into the trench. Related semiconductor device assemblies may include these heat spreader and methods may include physically and thermally attaching these heat spreaders to semiconductor devices such that underfill material extends from a semiconductor device into the trench.

Abstract: Semiconductor devices may include a first semiconductor die comprising a heat-generating region located at a periphery thereof. A second semiconductor die is attached to the first semiconductor die. At least a portion of the heat-generating region is located laterally outside a footprint of the second semiconductor die. A thermally insulating material is located on a side surface of the second semiconductor die. Methods of forming semiconductor devices may involve attaching a second semiconductor die to a first semiconductor die. The first semiconductor die includes a heat-generating region at a periphery thereof. At least a portion of the heat-generating region is located laterally outside a footprint of the second semiconductor die. A thermally insulating material is located on a side surface of the second semiconductor die.

Abstract: Semiconductor device packages comprise a first semiconductor device comprising a heat-generating region located on at least one end thereof. A second semiconductor device is attached to the first semiconductor device. At least a portion of the heat-generating region extends laterally beyond at least one corresponding end of the second semiconductor device. A thermally insulating material at least partially covers the end of the second semiconductor device. Methods of forming a semiconductor device packages comprise attaching a second semiconductor device to a first semiconductor device. The first semiconductor device comprises a heat-generating region at an end thereof. At least a portion of the heat-generating region extends laterally beyond an end of the second semiconductor device. The end of the second semiconductor device is at least partially covered with a thermally insulating material.

Abstract: Temporary adhesives include a thermoplastic polymer comprising from about 30% by weight to about 80% by weight of the temporary adhesive, a solvent comprising from about 20% by weight to about 70% by weight of the temporary adhesive, and a filler material comprising from about 0.2% to about 5% by weight of the temporary adhesive. Methods of processing a semiconductor device wafer include bonding the semiconductor device wafer to a surface of a carrier substrate using a temporary adhesive including a filler material comprising from about 0.2% to about 5% by weight of the temporary adhesive, thinning the semiconductor device wafer, and, while the temporary adhesive remains on the surface of the carrier substrate proximate a peripheral edge thereof, subjecting the thinned semiconductor device wafer to one or more back side processing operations. Methods of forming a thinned semiconductor wafer include using such a temporary adhesive.

Abstract: A method for processing a substrate includes arranging a substrate including masked portions and unmasked portions in a process chamber; creating plasma in a process chamber; supplying a passivation gas mixture that includes nitrogen or carbon to create a plasma passivation gas mixture; exposing a substrate to the plasma passivation gas mixture to create a passivation layer on the unmasked portions of the substrate; supplying a stripping gas mixture that includes oxygen to the plasma to create a plasma stripping gas mixture; exposing the substrate to the plasma stripping gas mixture to strip at least part of the masked portions and at least part of the unmasked portions; and repeating creating the passivation layer and the stripping to remove a predetermined amount of the masked portions.

Abstract: A plasma ashing process for removing photoresist, polymers and/or residues from a substrate, the process includes placing the substrate including the photoresist, polymers, and/or residues into a reaction chamber; generating a plasma from a gas mixture comprising oxygen gas (02) and/or an oxygen containing gas; suppressing and/or reducing fast diffusing species in the plasma by adding an atomic oxygen scavenging gas to the gas mixture; and exposing the substrate to the plasma to selectively remove the photoresist, polymers, and/or residues from the substrate, wherein the plasma is substantially free from fast diffusing species.

Abstract: Semiconductor device packages comprise a first semiconductor device comprising a heat-generating region located on at least one end thereof. A second semiconductor device is attached to the first semiconductor device. At least a portion of the heat-generating region extends laterally beyond at least one corresponding end of the second semiconductor device. A thermally insulating material at least partially covers the end of the second semiconductor device. Methods of forming a semiconductor device packages comprise attaching a second semiconductor device to a first semiconductor device. The first semiconductor device comprises a heat-generating region at an end thereof. At least a portion of the heat-generating region extends laterally beyond an end of the second semiconductor device. The end of the second semiconductor device is at least partially covered with a thermally insulating material.

Abstract: Methods of forming devices, including LED devices, are described. The devices may include fluorinated compound layers. The methods described may utilize a plasma treatment to form the fluorinated compound layers. The methods described may operate to produce an intermetallic layer that bonds two substrates such as semiconductor wafers together in a relatively efficient and inexpensive manner.

Abstract: Non-oxidizing plasma treatment devices for treating a semiconductor workpiece generally include a substantially non-oxidizing gas source; a plasma generating component in fluid communication with the non-oxidizing gas source; a process chamber in fluid communication with the plasma generating component, and an exhaust conduit centrally located in a bottom wall of the process chamber. In one embodiment, the process chamber is formed of an aluminum alloy containing less than 0.15% copper by weight; In other embodiments, the process chamber includes a coating of a non-copper containing material to prevent formation of copper hydride during processing with substantially non-oxidizing plasma. In still other embodiments, the process chamber walls are configured to be heated during plasma processing. Also disclosed are non-oxidizing plasma processes.

Abstract: Methods of forming devices, including LED devices, are described. The devices may include fluorinated compound layers. The methods described may utilize a plasma treatment to form the fluorinated compound layers. The methods described may operate to produce an intermetallic layer that bonds two substrates such as semiconductor wafers together in a relatively efficient and inexpensive manner.

Abstract: Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a plurality of first semiconductor dies arranged in a stack and a second semiconductor die carrying the first semiconductor dies. The second semiconductor die can include a peripheral portion that extends laterally outward beyond at least one side of the first semiconductor dies. The semiconductor die assembly can further include a thermal transfer feature at the peripheral portion of the second semiconductor die. The first semiconductor dies can define a first thermal path, and the thermal transfer feature can define a second thermal path separate from the first semiconductor dies.

Abstract: A semiconductor die assembly comprises a plurality of semiconductor dice in a stack. Another semiconductor die is adjacent to the stack and has a region, which may comprise a relatively higher power density region, extends peripherally beyond the stack. Conductive elements extend between and electrically interconnect integrated circuits of semiconductor dice in the stack and of the other semiconductor die. Thermal pillars are interposed between semiconductor dice of the stack, and a heat dissipation structure, such as a lid, is in contact with an uppermost die of the stack and the high power density region of the other semiconductor die. Other die assemblies, semiconductor devices and methods of managing heat transfer within a semiconductor die assembly are also disclosed.

Abstract: Plasma mediated ashing processes for removing organic material from a substrate generally includes exposing the substrate to the plasma to selectively remove photoresist, implanted photoresist, polymers and/or residues from the substrate, wherein the plasma contains a ratio of active nitrogen and active oxygen that is larger than a ratio of active nitrogen and active oxygen obtainable from plasmas of gas mixtures comprising oxygen gas and nitrogen gas. The plasma exhibits high throughput while minimizing and/or preventing substrate oxidation and dopant bleaching. Plasma apparatuses are also described.

Abstract: A stacked semiconductor die assembly includes at least two partially offset semiconductor dice with bond pads located adjacent at least one peripheral side thereof supported on a redistribution element formed of a material of substantially similar CTE to that of the dice, and a paddle-less lead frame secured to the redistribution element during fabrication, including encapsulation. The assembly is configured to be substantially vertically symmetrical with respect to inner ends of lead fingers of the lead frame to facilitate uniform encapsulant flow. The semiconductor die assembly may be configured in a package with leads extending from two sides thereof, such as a thin small outline package (TSOP), or four sides thereof, such as a quad flat pack (QFP).