Patents by Inventor Shinichi Imai

Shinichi Imai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6787445
    Abstract: A fluorine-containing organic film is deposited on a semiconductor substrate using a material gas containing fluorocarbon as a main component in a reactor chamber of a plasma processing apparatus. The fluorine-containing organic film is then exposed to plasma of a rare gas in the same reactor chamber to densify the fluorine-containing organic film.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: September 7, 2004
    Assignee: Matsushita Electric Industry Co., Ltd.
    Inventors: Nobuhiro Jiwari, Shinichi Imai
  • Publication number: 20040151817
    Abstract: The invention provides a process for producing a baked food of wheat flour by using a soybean protein in which NSI shows a low denature value of 40 or more, the content of solid component extracted with a solvent mixture of chloroform and methanol (2:1) is 2.0 wt % or less, and the crude protein content is 63% or more. When wheat flour in dough is replaced with the soybean protein at a small ratio, baked foods of wheat flour which are resistant to freezing and show good texture even after thawing in a microwave oven can be obtained. Moreover, a process for making a baked food mainly comprising soybean proteins, which has a good taste and texture and is appropriately taken by human, can be provided by replacing most part or all of wheat flour with a soybean protein.
    Type: Application
    Filed: December 5, 2003
    Publication date: August 5, 2004
    Inventors: Yoichi Fukuda, Yasue Nagao, Yasuko Matuzaki, Shinichi Imai, Hiroyuki Gunji
  • Patent number: 6749763
    Abstract: A semiconductor substrate, on which a silicon dioxide film with a resist film defined thereon has been formed, is placed inside a reaction chamber of a plasma processing system. Then, a fluorocarbon gas with a C/F ratio of 0.5 or more is introduced into the reaction chamber. In this process step, the flow rate of the gas is controlled such that the residence time &tgr; of the gas in the reaction chamber becomes greater than 0.1 sec and equal to or less than 1 sec in accordance with an equation &tgr;=P×V/Q, where &tgr; is the residence time (unit: sec), P is a pressure (unit: Pa) of the gas, V is a volume (unit: L) of the reaction chamber and Q is the flow rate (unit: Pa·L/sec) of the gas. Thereafter, plasma is created from the fluorocarbon gas and the silicon dioxide film is plasma-etched using the resist film as a mask.
    Type: Grant
    Filed: August 1, 2000
    Date of Patent: June 15, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shinichi Imai
  • Publication number: 20040106297
    Abstract: An organic/inorganic hybrid film represented by SiCx−HyOz (x>0, y≧0, z>0) is plasma-etched with an etching gas containing fluorine, carbon and nitrogen. During the etching, a carbon component is eliminated from the surface portion of the organic/inorganic hybrid film due to the existence of the nitrogen in the etching gas, to thereby reform the surface portion. The reformed surface portion is nicely plasma-etched with the etching gas containing fluorine and carbon.
    Type: Application
    Filed: October 7, 2003
    Publication date: June 3, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Kenshi Kanegae, Shinichi Imai, Hideo Nakagawa
  • Publication number: 20040049898
    Abstract: A plurality of pieces of process data are acquired from a semiconductor production apparatus while it is in operation, and then, a multivariate analysis model is created using at least a portion of the plurality of pieces of process data.
    Type: Application
    Filed: July 15, 2003
    Publication date: March 18, 2004
    Inventors: Shinichi Imai, Masaki Taguchi
  • Patent number: 6703711
    Abstract: A fluorine-containing organic film having a relative dielectric constant of 4 or less is deposited on a semiconductor substrate using a material gas containing fluorocarbon as a main component in a reactor chamber of a plasma processing apparatus. During the deposition of the fluorine-containing organic film, a scavenger gas for scavenging fluorine constituting the fluorocarbon is mixed in the material gas. The proportion of the mixed scavenger gas in the material gas is changed to adjust the mechanical strength and relative dielectric constant of the fluorine-containing organic film.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: March 9, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuhiro Jiwari, Shinichi Imai
  • Publication number: 20040005789
    Abstract: A fluorine-containing organic film having a relative dielectric constant of 4 or less is deposited on a semiconductor substrate using a material gas containing C5F8, C3F6, or C4F6 as a main component.
    Type: Application
    Filed: June 23, 2003
    Publication date: January 8, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Nobuhiro Jiwari, Shinichi Imai
  • Patent number: 6632746
    Abstract: An organic/inorganic hybrid film represented by SiCxHyOz (x>0, y≧0, z>0) is plasma-etched with an etching gas containing fluorine, carbon and nitrogen. During the etching, a carbon component is eliminated from the surface portion of the organic/inorganic hybrid film due to the existence of the nitrogen in the etching gas, to thereby reform the surface portion. The reformed surface portion is nicely plasma-etched with the etching gas containing fluorine and carbon.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: October 14, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenshi Kanegae, Shinichi Imai, Hideo Nakagawa
  • Publication number: 20030094698
    Abstract: A fluorine-containing organic film having a relative dielectric constant of 4 or less is deposited on a semiconductor substrate using a material gas containing fluorocarbon as a main component in a reactor chamber of a plasma processing apparatus. During the deposition of the fluorine-containing organic film, a scavenger gas for scavenging fluorine constituting the fluorocarbon is mixed in the material gas. The proportion of the mixed scavenger gas in the material gas is changed to adjust the mechanical strength and relative dielectric constant of the fluorine-containing organic film.
    Type: Application
    Filed: December 30, 2002
    Publication date: May 22, 2003
    Applicant: Matsushita Electronics Corporation
    Inventors: Nobuhiro Jiwari, Shinichi Imai
  • Patent number: 6518169
    Abstract: A plurality of metal interconnections are formed on a semiconductor substrate. The semiconductor substrate is held on a sample stage in a reactor chamber of a plasma processing apparatus and a material gas containing C5F8, C3F6, or C4F6 as a main component is introduced into the reactor chamber, so that a first fluorine-containing organic film having cavities at positions between the metal interconnections is deposited between the metal interconnections and on the top surfaces of the metal interconnections.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: February 11, 2003
    Assignee: Matsushita Electric Industrial co., Ltd.
    Inventors: Nobuhiro Jiwari, Shinichi Imai
  • Publication number: 20030025209
    Abstract: A plurality of metal interconnections are formed on a semiconductor substrate. The semiconductor substrate is held on a sample stage in a reactor chamber of a plasma processing apparatus and a material gas containing C5F8, C3F6, or C4F6 as a main component is introduced into the reactor chamber, so that a first fluorine-containing organic film having cavities at positions between the metal interconnections is deposited between the metal interconnections and on the top surfaces of the metal interconnections.
    Type: Application
    Filed: September 27, 2002
    Publication date: February 6, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuhiro Jiwari, Shinichi Imai
  • Patent number: 6508473
    Abstract: A piston ring is made of martensitic stainless steel. Except for the outer circumferential surface of the piston ring, a nitrided layer having a Vickers hardness of 700 or more is formed on the upper and lower surfaces and inner circumferential surface, and a nitrided layer having a Vickers hardness of less than 700 is formed below the nitrided layer. A hard film is then formed by ion plating only on the outer circumferential surface of the piston ring. The hard film formed by ion plating and the nitrided layer with a Vickers hardness of 700 or more are separated without making contact in the vicinity of at least one of corner sections formed by the upper and lower surfaces and outer circumferential surface. The distance is within a range of 0.001 to 0.3 mm. The nitrided layers can be formed just on the upper and lower surfaces of the piston ring.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: January 21, 2003
    Assignee: Teikoku Piston Ring Co., Ltd.
    Inventors: Shoji Tanaka, Hiroto Fukutome, Shinichi Imai
  • Patent number: 6500769
    Abstract: A fluorine-containing organic film having a relative dielectric constant of 4 or less is deposited on a semiconductor substrate using a material gas containing fluorocarbon as a main component in a reactor chamber of a plasma processing apparatus. During the deposition of the fluorine-containing organic film, a scavenger gas for scavenging fluorine constituting the fluorocarbon is mixed in the material gas. The proportion of the mixed scavenger gas in the material gas is changed to adjust the mechanical strength and relative dielectric constant of the fluorine-containing organic film.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: December 31, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuhiro Jiwari, Shinichi Imai
  • Publication number: 20020089059
    Abstract: A method for manufacturing a semiconductor device of the present invention includes the steps of: (a) depositing an interlayer insulator film on a substrate including a plurality of conductive layers; (b) forming a plurality of contact holes running through the interlayer insulator film to reach respective ones of the plurality of conductive layers, each of the contact holes having a tapered portion at an upper end thereof; (c) depositing a conductive material film on the interlayer insulator film so as to fill the plurality of contact holes; (d) removing the conductive material film until a surface of the interlayer insulator film is exposed so as to form a plurality of plugs made of the conductive material film filling the plurality of contact holes; and (e) removing a portion of the interlayer insulator film, which has been exposed in the step (d), so as to remove the tapered portions.
    Type: Application
    Filed: January 2, 2002
    Publication date: July 11, 2002
    Inventor: Shinichi Imai
  • Publication number: 20020061654
    Abstract: An organic/inorganic hybrid film represented by SiCxHyOz (x>0, y≧0, z>0) is plasma-etched with an etching gas containing fluorine, carbon and nitrogen. During the etching, a carbon component is eliminated from the surface portion of the organic/inorganic hybrid film due to the existence of the nitrogen in the etching gas, to thereby reform the surface portion. The reformed surface portion is nicely plasma-etched with the etching gas containing fluorine and carbon.
    Type: Application
    Filed: April 19, 2001
    Publication date: May 23, 2002
    Inventors: Kenshi Kanegae, Shinichi Imai, Hideo Nakagawa
  • Publication number: 20020058390
    Abstract: A semiconductor device of the present invention includes a semiconductor substrate including an active region and an isolating region provided so as to enclose the active region; a capacitance insulating film that is provided on the active region and has a boundary portion in contact with the isolating region; an upper electrode provided on the capacitance insulating film so as to be spaced away from the isolating region; an electrode pad provided on the isolating region; a lead conductive film provided over a part of the capacitance insulating film and a part of the isolating region for connecting the upper electrode and the electrode pad; and an interlayer insulating film provided over the substrate.
    Type: Application
    Filed: September 24, 2001
    Publication date: May 16, 2002
    Inventor: Shinichi Imai
  • Publication number: 20010047849
    Abstract: In performing plasma processing, when plasma regions are extinguished, particles tend to fall onto an object to be processed and then be deposited thereon. The present invention provides various measures for preventing such deposition on the object. An electrode is disposed inside a reaction chamber, which is kept in a vacuum state by a turbo molecule pump and a dry pump that are provided for a main exhaust pipe. A substrate is placed on the electrode, a gas is introduced into the reaction chamber and then a voltage is applied from an RF power supply to the electrode and the substrate, thereby generating plasma regions in the reaction chamber. A large number of exhaust pipes, each having an opening, are disposed on substantially the same plane as the plane on which the interface between a plasma glow region and a plasma sheath is located. These multiple openings surround the interface between the plasma glow region and the plasma sheath.
    Type: Application
    Filed: September 1, 1998
    Publication date: December 6, 2001
    Inventors: NOBUHIRO JIWARI, SHINICHI IMAI
  • Publication number: 20010008124
    Abstract: The substrate cooling apparatus disclosed in the present invention comprises a semiconductor substrate holding electrode with a groove for conducting cooling gas formed in its holding surface for holding a semiconductor substrate thereon, wherein an inlet port for the substrate cooling gas is formed within 5 mm of the radially outermost edge of the semiconductor substrate holding electrode in such a manner as to connect with the groove from a surface of the electrode other than the holding surface thereof. When the semiconductor substrate is cooled by the substrate cooling apparatus, temperature difference within the substrate surface is small, and the substrate temperature is uniform through to the peripheral portions of the substrate. When this substrate cooling apparatus is used in a semiconductor manufacturing apparatus, semiconductor devices with stable device characteristics can be fabricated on the semiconductor substrate.
    Type: Application
    Filed: April 29, 1997
    Publication date: July 19, 2001
    Inventors: NOBUHIRO JIWARI, SHINICHI IMAI, HIDEO NIKOH
  • Patent number: 6251216
    Abstract: A plasma processing apparatus includes a reaction chamber in which plasma is generated from a reactive gas introduced thereto and a film on a substrate is processed with the plasma generated. The main members of the reaction chamber are covered with protective members made of synthetic quartz.
    Type: Grant
    Filed: December 16, 1998
    Date of Patent: June 26, 2001
    Assignee: Matsushita Electronics Corporation
    Inventors: Hideaki Okamura, Shinichi Imai, Nobuhiro Jiwari, Yoko Tohmori
  • Patent number: 6214740
    Abstract: A manufacturing apparatus for semiconductor devices comprises as a halogen scavenger a silicon ring (12) having an average surface roughness of 1-1000 &mgr;m, arranged around a silicon substrate (6) on a lower electrode (3) in a reaction chamber (7); and an upper silicon element (5) as another halogen scavenger, having an average surface roughness of 1-1000 &mgr;m, arranged above the silicon substrate (6). In this apparatus, C2F6 is used as a gas to be introduced into the chamber (7) and fluorine can be effectively scavenged in the initial phase of operation, so that semiconductor devices can be aged faster than in conventional apparatus.
    Type: Grant
    Filed: April 16, 1998
    Date of Patent: April 10, 2001
    Assignee: Matsushita Electronics Corporation
    Inventors: Shinichi Imai, Hideo Nikoh, Nobuhiro Jiwari