Patents by Inventor Shinichi Nakagawa

Shinichi Nakagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7276745
    Abstract: The present invention provides a gas sensor having excellent humidity resistance even if used in a high temperature and high humidity atmosphere. According to the present invention, a gas sensor is comprised of: a silicon substrate; a metal-oxide semiconductor portion comprised mainly of SnO2 and formed on the substrate; and a catalytic portion comprised of Pd and dispersed on a surface of the metal-oxide semiconductor portion, wherein the metal-oxide semiconductor portion and the catalytic portion constitute a gas sensing portion. Furthermore, an insulating portion comprised mainly of SiO2 is formed dispersedly on a surface of the gas sensing portion.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: October 2, 2007
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Shinichi Nakagawa, Yoshihiro Nakano, Masahito Kida, Takio Kojima
  • Publication number: 20070200166
    Abstract: Disclosed is a method of manufacturing a semiconductor device, including the steps of: forming on a second insulating film a first resist pattern having a first window; employing the first resist pattern as an etching mask to form first openings exposed from contact regions CR; forming, on a second conductive film, a second resist pattern having first resist portions; employing the second resist pattern as an etching mask to form first and second conductors, a floating gate and a control gate; forming a third resist pattern in regions I, II and III; and employing the third resist pattern as an etching mask to remove the portions of the second conductors under second windows.
    Type: Application
    Filed: April 27, 2007
    Publication date: August 30, 2007
    Applicant: FUJITSU LIMITED
    Inventor: Shinichi Nakagawa
  • Patent number: 7236703
    Abstract: As is described above, an optical wavelength division multiplexing and transmission apparatus according to the present invention has the configuration in which a plurality of slave racks coupling to a master rack can be additionally installed one after another with the master rack. Therefore, in cases where it is desired to expand a function of a transmitter and a function of a receiver due to the increase of a quality of information to be transmitted, the additional installation of the slave rack can be performed without exerting influence on a communication means installed in advance and currently used. Accordingly, it can be expected that the optical wavelength division multiplexing and transmission apparatus is adapted for the optical communication service which is more and more increased in the future.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: June 26, 2007
    Assignees: Mitsubishi Denki Kabushiki Kaisha, KDDI Submarine Cable Systems Inc.
    Inventors: Shigeo Yamanaka, Takashi Mizuochi, Katsuhiro Shimizu, Koji Goto, Shinichi Nakagawa, Eiichi Shibano, Tadami Yasuda
  • Patent number: 7235476
    Abstract: Disclosed is a method of manufacturing a semiconductor device, including the steps of: forming on a second insulating film a first resist pattern having a first window; employing the first resist pattern as an etching mask to form first openings exposed from contact regions CR; forming, on a second conductive film, a second resist pattern having first resist portions; employing the second resist pattern as an etching mask to form first and second conductors, a floating gate and a control gate; forming a third resist pattern in regions I, II and III; and employing the third resist pattern as an etching mask to remove the portions of the second conductors under second windows.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: June 26, 2007
    Assignee: Fujitsu Limited
    Inventor: Shinichi Nakagawa
  • Publication number: 20060226469
    Abstract: A non-volatile semiconductor memory device includes: a non-volatile memory area including gate electrodes, each including stack of a floating gate, an inter-electrode insulating film and a control gate, and having first insulating side walls formed on side walls of the gate electrode; a peripheral circuit area including single-layer gate electrodes made of the same layer as the control gate; and a first border area including: a first isolation region formed in the semiconductor substrate for isolating the non-volatile memory area and peripheral circuit area; a first conductive pattern including a portion made of the same layer as the control gate and formed above the isolation region; and a first redundant insulating side wall made of the same layer as the first insulating side wall and formed on the side wall of the first conductive pattern on the side of the non-volatile memory area.
    Type: Application
    Filed: August 11, 2005
    Publication date: October 12, 2006
    Applicant: FUJITSU LIMITED
    Inventor: Shinichi Nakagawa
  • Publication number: 20060196248
    Abstract: There is provided an oxidizing gas sensor that includes an insulating substrate, a gas sensing layer laminated on the insulating substrate and substantially made of tin oxide so as to make resistance changes in response to concentration variations in oxidizing gas and a plurality of catalyst grains applied to a surface of the gas sensing layer and substantially made of gold, wherein 20% or more of the catalyst grains have an aspect ratio of 2.0 or greater when viewed at from the surface of the gas sensing layer.
    Type: Application
    Filed: February 23, 2006
    Publication date: September 7, 2006
    Inventors: Yoshihiro Nakano, Masahito Kida, Shinichi Nakagawa, Takio Kojima
  • Publication number: 20060185420
    Abstract: The present invention provides a gas sensor having excellent humidity resistance even if used in a high temperature and high humidity atmosphere. According to the present invention, a gas sensor is comprised of: a silicon substrate; a metal-oxide semiconductor portion comprised mainly of SnO2 and formed on the substrate; and a catalytic portion comprised of Pd and dispersed on a surface of the metal-oxide semiconductor portion, wherein the metal-oxide semiconductor portion and the catalytic portion constitute a gas sensing portion. Furthermore, an insulating portion comprised mainly of SiO2 is formed dispersedly on a surface of the gas sensing portion.
    Type: Application
    Filed: February 21, 2006
    Publication date: August 24, 2006
    Inventors: Shinichi Nakagawa, Yoshihiro Nakano, Masahito Kida, Takio Kojima
  • Publication number: 20060099798
    Abstract: Disclosed is a method of manufacturing a semiconductor device, including the steps of: forming on a second insulating film a first resist pattern having a first window; employing the first resist pattern as an etching mask to form first openings exposed from contact regions CR; forming, on a second conductive film, a second resist pattern having first resist portions; employing the second resist pattern as an etching mask to form first and second conductors, a floating gate and a control gate; forming a third resist pattern in regions I, II and III; and employing the third resist pattern as an etching mask to remove the portions of the second conductors under second windows.
    Type: Application
    Filed: February 22, 2005
    Publication date: May 11, 2006
    Applicant: FUJITSU LIMITED
    Inventor: Shinichi Nakagawa
  • Publication number: 20060008995
    Abstract: On a surface of a Si substrate, a nonvolatile memory cell, an nMOS transistor, and a pMOS transistor are formed, and thereafter an interlayer insulation film covering the nonvolatile memory cell, the nMOS transistor, and the pMOS transistor is formed. Next, in the interlayer insulation film, there are formed plural contact plugs connected respectively to a control gate of the nonvolatile memory cell, a source or a drain of the nMOS transistor, and a source or a drain of the PMOS transistor. Thereafter, there is formed a single-layer wiring connecting the control gate to the sources or drains of the nMOS transistor and the pMOS transistor via the plural contact plugs.
    Type: Application
    Filed: December 23, 2004
    Publication date: January 12, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Koji Takahashi, Shinichi Nakagawa
  • Publication number: 20050201265
    Abstract: A phthalocyanine compound represented by the following general formula (I) and the mixture thereof, and an optical recording medium containing the compound/mixture in its recording layer. wherein in formula (I), M is two hydrogen atoms, a divalent metal atom, a mono-substituted trivalent metal atom, a di-substituted tetravalent metal atom, or an oxymetal, and L1, L2, L3 and L4 are each independently formula (a), formula (b), or formula (c): wherein X, Y, Z and R are defined.
    Type: Application
    Filed: February 14, 2003
    Publication date: September 15, 2005
    Applicants: Mitsui Chemicals, Inc., Yamamota Chemicals, Inc.
    Inventors: Kazuhiro Seino, Shinichi Nakagawa, Tsutami Misawa, Satoshi Kinoshita, Akihiro Kosaka, Hiroshi Terao, Yojiro Kumagae
  • Publication number: 20050189606
    Abstract: The semiconductor device comprises a gate electrode 112 formed over a semiconductor substrate 10, a sidewall spacer 116 formed on the sidewall of the gate electrode 112, a sidewall spacer 144 formed on the side wall of the gate electrode 112 with the sidewall spacer 116 formed on, and an oxide film 115 formed between the sidewall spacer 116 and the sidewall spacer 144, and the semiconductor substrate 10. The film thickness of the oxide film 115 between the sidewall spacer 144 and the semiconductor substrate 10 is thinner than the film thickness of the oxide film 115 between the sidewall spacer 116 and the semiconductor substrate 10.
    Type: Application
    Filed: June 22, 2004
    Publication date: September 1, 2005
    Applicant: FUJITSU LIMITED
    Inventor: Shinichi Nakagawa
  • Publication number: 20050142322
    Abstract: An optical recording medium containing in the recording layer a dipyrromethene-metal chelate compound of which the initial principal weight loss temperature is thermogravimetrically from 330° C. through 500° C. inclusive, capable of high speed and high density recording and playback with a laser having a wavelength of 520 to 690 nm.
    Type: Application
    Filed: March 27, 2003
    Publication date: June 30, 2005
    Applicants: Mitsui Chemicals, Inc., Yamamoto Chemicals, Inc
    Inventors: Taizo Nishimoto, Shinobu Inoue, Tsutami Misawa, Ryosuke Nara, Yuji Inatomi, Shunsuke Murayama, Tadashi Koike, Yasunori Saito, Shinichi Nakagawa
  • Publication number: 20050110071
    Abstract: The semiconductor group comprises a first semiconductor device including a first design macro and a nonvolatile memory, and a second semiconductor device including a second design macro having identity with the first design macro and including no nonvolatile memory. The first design macro includes a first active region and a first device isolation region formed on a first semiconductor substrate. The second design macro includes a second active region and a second device isolation region formed on a second semiconductor substrate. A curvature radius of an upper end of the first active region in a cross section is larger than a curvature radius of an upper end of the second active region in a cross section. A difference in height between a surface of the first active region and a surface of the first device isolation region is larger than a difference in height between a surface of the second active region and a surface of the device isolation region.
    Type: Application
    Filed: October 21, 2004
    Publication date: May 26, 2005
    Inventors: Taiji Ema, Hideyuki Kojima, Toru Anezaki, Shinichi Nakagawa
  • Patent number: 6844051
    Abstract: This invention relates to a separation finger used in an Electro photographic device such as photocopying devices and laser-beam printers. More specifically, it relates to a separation finger with remarkably improved durability which has a sharp tips and is capable of preventing paper jams, caused by, for example, adhesion of the toner, over extended periods of time.
    Type: Grant
    Filed: July 29, 1999
    Date of Patent: January 18, 2005
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: Daniel Eugene George, Shinichi Nakagawa, Akira Yokoyama
  • Patent number: 6767282
    Abstract: A golf game device that generates a natural interest in golf without taking up a large amount of space. A player swings a grip which is shaped like the grip of a golf club. On a first monitor, a virtual club head moving in accordance with the movement of the grip is displayed. An imaginary shaft extends from the grip, and the virtual club head is displayed as if it were attached to the end of the shaft. The player takes aim at his target direction (to which a ball is to be hit) by viewing scenery displayed on a second monitor, and hits a ball displayed in his underfoot view on the first monitor. The front view and underfoot view change according to the position where a virtual player stands in the game space. Accordingly, the player can play with the sense that he is actually playing a golf course.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: July 27, 2004
    Assignee: Konami Corporation
    Inventors: Shigenobu Matsuyama, Shinichi Nakagawa, Naoki Niihama
  • Patent number: 6744990
    Abstract: An object of the present invention is to realize almost the same transmission characteristic in all wavelengths at a transmission rate of 10 Gb/s or more. An optical transmitter 10 outputs WDM signal light multiplexed with signal light of a plurality of wavelengths toward an optical transmission line 12. The optical transmission line 12 comprises an optical transmission fiber 14, an optical repeating amplifier 16 and a dispersion compensating fiber 18. The gain characteristic of the optical repeating amplifier 16 is set so that the gain becomes the maximum at the effective zero dispersion wavelength of the optical transmission line 12 and that lowers inversely proportional to the distance from the effective zero dispersion wavelength. The whole optical transmission line 12 is set so that the peak power deviation between the effective zero dispersion wavelength &lgr;0 and the wavelength &lgr;1 or &lgr;n on both end becomes approximately 4 dB.
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: June 1, 2004
    Assignees: KDD Corporation, KDD Submarine Cable Systems Inc.
    Inventors: Masatoshi Suzuki, Noriyuki Takeda, Noboru Edagawa, Hideaki Tanaka, Shinichi Nakagawa, Hidenori Taga, Koji Goto
  • Patent number: 6720811
    Abstract: A semiconductor device includes a delay amount measuring unit, multiple delay sections and a correction signal generating unit. The delay amount measuring unit for measures an actual delay amount corresponding to a specified delay amount by supplying a clock signal with a known period to multiple 1-ns-delay strings with a preassigned delay amount, and by detecting phase variations of the clock signal by the 1-ns-delay strings. The delay sections includes a delay string capable of freely adjusting a connection number of its delay elements. The correction signal generating unit generates a correction signal for enabling each of the delay sections to correct the connection number of the delay strings such that each delay section has a desired delay amount, in accordance with the actual delay amount corresponding to the specified delay amount and measured by the delay measuring unit.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: April 13, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Minobu Yazawa, Shinichi Nakagawa, Yasushi Wada
  • Patent number: 6703092
    Abstract: A resin molded article for fitting to an inside wall of a liner in a chamber of a dry etching apparatus used in semiconductor manufacture is disclosed. The resin molded article is a seamless annular molded article having a heat resistance temperature of at least 100° C., a tensile elongation at break of at least 0.3%, a flexural modulus of at least 10,000 kg/cm2, an outside diameter from 0 to 0.3% larger than the inside diameter of the liner, and a wall thickness of not more than 2 mm.
    Type: Grant
    Filed: November 2, 2000
    Date of Patent: March 9, 2004
    Assignee: E.I. du Pont de Nemours and Company
    Inventors: Shinichi Nakagawa, Shuji Sakai
  • Patent number: 6696329
    Abstract: A silicon oxide film is formed by thermal oxidation on condition that the thickness thereof on the surface of a diffusion layer is about 3 nm. As a result, the silicon oxide film with a thickness of about 12 nm is formed on the surface of a source diffusion layer due to enhanced oxidation. Subsequently, after a silicon nitride film is formed on the entire surface, the silicon nitride film in a peripheral transistor region is removed. Thereafter, the resist film is removed, and thermal oxidation is performed in order to grow the silicon oxide film formed on the surface of the diffusion layer. On this occasion, the silicon oxide film formed on the surface of each of the source diffusion layer and the drain diffusion layer is covered with the silicon nitride film, and hence it does not grow.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: February 24, 2004
    Assignee: Fujitsu Limited
    Inventor: Shinichi Nakagawa
  • Patent number: D504096
    Type: Grant
    Filed: December 19, 2001
    Date of Patent: April 19, 2005
    Assignee: Mazda Motor Corporation
    Inventors: Shinichi Nakagawa, Ryou Yanagisawa, Kouichi Hayashi, Kunihiko Kurisu