Abstract: A flow channel device, a complex permittivity measuring apparatus, and a dielectric cytometry system are provided which can improve the measurement accuracy. A constriction portion having a constricted space is disposed between an inflow port and an outflow port of a flow channel. Electrodes are arranged between the inflow port and the constriction portion and between the outflow port and the constriction portion. The conductance of the constriction portion at a low-limit frequency is less than the combined conductance of an inflow channel portion and an outflow channel portion. The capacitance of the constriction portion at a high-limit frequency is less than the combined capacitance of the inflow channel portion and the outflow channel portion.

Abstract: To provide a mask able to prevent a drop in pattern position accuracy due to the influence of internal stress of a membrane and able to align patterns including complementary divided patterns precisely, a method of producing the same, and a method of producing a semiconductor device. A stencil mask having lattice-shaped struts formed by etching a silicon wafer on four regions of a membrane wherein the lattices are offset from each other in the four regions and all of the struts are connected to other struts or the silicon wafer around the membrane (frame), a method of producing a stencil mask, and a method of producing a semiconductor device.

Abstract: A transmission line substrate includes at least an insulating layer of a predetermined thickness, a pair of conductor layers arranged in a state of being opposed to each other such that the insulating layer is interposed between the conductor layers, the pair of conductor layers functioning as a high-frequency transmission line, and a fault part formed so as to make the conductor layer on one side disconnected, into which a sample to be measured can be introduced.

Abstract: To provide an exposure apparatus and an exposure method able to correct an image-placement error during an exposure which is unable to decrease only by correcting electron beam description data of a mask pattern, and a semiconductor device manufacturing method used the same, wherein an image placement R2 of a mask is measured at an inversion posture against an exposure posture (ST7), the measured image placement R2 is corrected with considering a pattern displacement caused by gravity at the exposure posture and a first correction data ?1 is prepared based on a difference of the corrected image placement and a designed data (ST10), and an exposure is performed by deflecting charged particle beam to correct a position of a pattern to be exposed to a subject based on the first correction data ?1 (ST13).

Abstract: A complementary division method able to suppress a pattern deformation by wet washing, having the steps of determining a definite division length able to suppress the pattern deformation when wet washing to a width and distance of a pattern that is assumed the pattern deformation over an elasticity limit is easiest given by wet washing in advance, dividing the entire line-and-space patterns at the determined division length in the longitudinal direction to divide suitably the line-and-space pattern by a simple algorithm, and further providing a method of producing a mask and program.

Abstract: A mask decreased in warping and having a high positioning precision, provided with at least a substrate aperture formed at a portion of a silicon substrate, a first silicon oxide film formed at one surface of the silicon substrate, a single crystal silicon layer formed on the first silicon layer and the substrate aperture, at least one aperture formed at a portion of the single crystal silicon layer on the substrate aperture and passing an exposure beam, a stress controlling layer formed on another surface of the silicon substrate having internal stress for flattening warping of the silicon substrate due to at least compressive stress of the first silicon oxide film; a method of producing the same, a mask blank decreased in warping, and a method of producing the same.

Abstract: A mask decreased in warping and having a high positioning precision, provided with at least a substrate aperture formed at a portion of a silicon substrate, a first silicon oxide film formed at one surface of the silicon substrate, a single crystal silicon layer formed on the first silicon layer and the substrate aperture, at least one aperture formed at a portion of the single crystal silicon layer on the substrate aperture and passing an exposure beam, a stress controlling layer formed on another surface of the silicon substrate having internal stress for flattening warping of the silicon substrate due to at least compressive stress of the first silicon oxide film; a method of producing the same, a mask blank decreased in warping, and a method of producing the same.

Abstract: A mask decreased in warping and having a high positioning precision, provided with at least a substrate aperture formed at a portion of a silicon substrate, a first silicon oxide film formed at one surface of the silicon substrate, a single crystal silicon layer formed on the first silicon layer and the substrate aperture, at least one aperture formed at a portion of the single crystal silicon layer on the substrate aperture and passing an exposure beam, a stress controlling layer formed on another surface of the silicon substrate having internal stress for flattening warping of the silicon substrate due to at least compressive stress of the first silicon oxide film; a method of producing the same, a mask blank decreased in warping, and a method of producing the same.

Abstract: A mask decreased in warping and having a high positioning precision, provided with at least a substrate aperture formed at a portion of a silicon substrate, a first silicon oxide film formed at one surface of the silicon substrate, a single crystal silicon layer formed on the first silicon layer and the substrate aperture, at least one aperture formed at a portion of the single crystal silicon layer on the substrate aperture and passing an exposure beam, a stress controlling layer formed on another surface of the silicon substrate having internal stress for flattening warping of the silicon substrate due to at least compressive stress of the first silicon oxide film; a method of producing the same, a mask blank decreased in warping, and a method of producing the same.

Abstract: To provide a mask able to prevent a drop in pattern position accuracy due to the influence of internal stress of a membrane and able to align patterns including complementary divided patterns precisely, a method of producing the same, and a method of producing a semiconductor device. A stencil mask having lattice-shaped struts formed by etching a silicon wafer on four regions of a membrane wherein the lattices are offset from each other in the four regions and all of the struts are connected to other struts or the silicon wafer around the membrane (frame), a method of producing a stencil mask, and a method of producing a semiconductor device.

Abstract: To provide a mask able to prevent a drop in pattern position accuracy due to the influence of internal stress of a membrane and able to align patterns including complementary divided patterns precisely, a method of producing the same, and a method of producing a semiconductor device. A stencil mask having lattice-shaped struts formed by etching a silicon wafer on four regions of a membrane wherein the lattices are offset from each other in the four regions and all of the struts are connected to other struts or the silicon wafer around the membrane (frame), a method of producing a stencil mask, and a method of producing a semiconductor device.

Abstract: A method of generating mask distortion data capable of improving accuracy of distortion measurement, an exposure method using the same and a method of producing a semiconductor device, wherein a production mask is produced by a first thin film formed with a predetermined pattern, and a positional accuracy measurement mask is produced by forming second positional accuracy measurement marks at substantially same positions as those of the first positional accuracy measurement marks on a mask blanks having a second thin film, positions of the second positional accuracy measurement marks and third positional accuracy measurement marks of the positional accuracy measurement mask are measured, a correlation function of the both are calculated, positions of the first positional accuracy measurement marks of the production mask are measured, and mask distortion data on the first thin film of the production mask is generated by using the correlation function.

Abstract: To provide a mask able to prevent a drop in pattern position accuracy due to the influence of internal stress of a membrane and able to align patterns including complementary divided patterns precisely, a method of producing the same, and a method of producing a semiconductor device. A stencil mask having lattice-shaped struts formed by etching a silicon wafer on four regions of a membrane wherein the lattices are offset from each other in the four regions and all of the struts are connected to other struts or the silicon wafer around the membrane (frame), a method of producing a stencil mask, and a method of producing a semiconductor device.

Abstract: Disclosed herein is a system for detecting interaction between substances includes a reaction field for allowing the interaction to proceed between the substances, and a voltage application section for applying a voltage to a working electrode arranged facing the reaction field such that a predetermined electrodynamic effect is given to the reaction field. The voltage application section is provided with a section for superimposingly applying two sinusoidal voltages of different frequencies to generate a beat. Also disclosed herein is a method for detecting interaction between substances in a procedure of allowing the interaction to proceed between the substances by making use of a predetermined electrodynamic effect, the method includes the step of applying two sinusoidal voltages of different frequencies superimposingly to generate a beat such that an electrochemical reaction is suppressed in a reaction field where the interaction is allowed to proceed.

Abstract: A mask pattern correction method capable of preventing a position of a pattern from deviating by deformation of a mask due to gravity, a mask production method, a mask, and a production method of a semiconductor device capable of forming a fine pattern with high accuracy are provided.

Abstract: To provide an exposure apparatus and an exposure method able to correct an image-placement error during an exposure which is unable to decrease only by correcting electron beam description data of a mask pattern, and a semiconductor device manufacturing method used the same, wherein an image placement R2 of a mask is measured at an inversion posture against an exposure posture (ST7), the measured image placement R2 is corrected with considering a pattern displacement caused by gravity at the exposure posture and a first correction data ?1 is prepared based on a difference of the corrected image placement and a designed data (ST10), and an exposure is performed by deflecting charged particle beam to correct a position of a pattern to be exposed to a subject based on the first correction data ?1 (ST13).

Abstract: To provide a mask able to prevent a drop in pattern position accuracy due to the influence of internal stress of a membrane and able to align patterns including complementary divided patterns precisely, a method of producing the same, and a method of producing a semiconductor device. A stencil mask having lattice-shaped struts formed by etching a silicon wafer on four regions of a membrane wherein the lattices are offset from each other in the four regions and all of the struts are connected to other struts or the silicon wafer around the membrane (frame), a method of producing a stencil mask, and a method of producing a semiconductor device.

Abstract: To provide a mask able to prevent a drop in pattern position accuracy due to the influence of internal stress of a membrane and able to align patterns including complementary divided patterns precisely, a method of producing the same, and a method of producing a semiconductor device. A stencil mask having lattice-shaped struts formed by etching a silicon wafer on four regions of a membrane wherein the lattices are offset from each other in the four regions and all of the struts are connected to other struts or the silicon wafer around the membrane (frame), a method of producing a stencil mask, and a method of producing a semiconductor device.

Abstract: To provide a mask that it becomes possible to perform destructive inspection without a mask for inspection or to perform more accurately non-destructive inspection and a method of inspecting the same. A mask comprising a thin film for exposure that has a transmission portion and a non-transmission portion of a beam for exposure, a thick film portion that is formed around the thin film for exposure and that supports the thin film for exposure, and a thin film for inspection that has a transmission portion and a non-transmission portion of the beam for exposure, that is formed at a distance from a thin film for exposure and that has thickness and material equal to those of a thin film for exposure, and a method of inspection of a mask that inspection is performed by using a thin film for inspection, and a method of producing a semiconductor device that lithography is performed by using a thin film for exposure of the mask.

Abstract: A mask capable of alignment by the TTR system and complementary division and having a high strength, a method of production of the same, and a method of production of a semiconductor device having a high pattern accuracy are provided. A stencil mask having stripe-shaped grid lines 4 formed by etching a silicon wafer in four sub-regions A to D on a membrane, having the stripes arranged point symmetrically about a center of the membrane, and having all of the grid lines connected to other grid lines or the silicon wafer around the membrane (support frame), a method of production of the same, and a method of production of a semiconductor device using the mask.