Patents by Inventor Shoji Matsumoto
Shoji Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240023231Abstract: A wiring board includes: a first conductor layer; a second conductor layer formed so as to face the first conductor layer; a plurality of differential signal wirings, each of which includes a pair of signal wirings, formed in the first conductor layer; and a plurality of first ground wirings formed in the second conductor layer and arranged along and not overlapping the pairs of signal wirings in a plan view viewed in a facing direction in which the first conductor layer and the second conductor layer face each other; and a plurality of second ground wirings formed in the second conductor layer with spacings so as to intersect the first ground wirings and to connect the two first ground wirings adjacent to each other.Type: ApplicationFiled: June 28, 2023Publication date: January 18, 2024Inventor: SHOJI MATSUMOTO
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Publication number: 20230133827Abstract: A transmission module includes a flexible printed wiring board including a signal line, a connector mounted on the flexible printed wiring board, and a reinforcing member disposed at a position opposing the connector with the flexible printed wiring board therebetween. The signal line includes a pad connected to a terminal of the connector. The reinforcing member includes a first portion disposed in a region including at least part of the pad as viewed in a direction perpendicular to a main surface of the flexible printed wiring board, and a second portion disposed around the first portion as viewed in the direction perpendicular to the main surface. A member constituting the first portion is a member having a nature that reduces a characteristic impedance of the pad more than a member constituting the second portion does.Type: ApplicationFiled: October 18, 2022Publication date: May 4, 2023Inventor: Shoji Matsumoto
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Patent number: 11610930Abstract: A transmission circuit includes a first semiconductor device, a second semiconductor device, a first signal line, a second signal line, a third signal line, and a ground line. A differential signal is composed of a first signal and a second signal. The first signal line is configured to connect the first semiconductor device and the second semiconductor device and used to transmit the first signal. The second signal line is configured to connect the first semiconductor device and the second semiconductor device and used to transmit the second signal. The second signal line, the first signal line, the ground line, and the third signal line are disposed in this order. A distance between the first signal line and the ground line is larger than a distance between the first signal line and the second signal line.Type: GrantFiled: May 20, 2021Date of Patent: March 21, 2023Assignee: CANON KABUSHIKI KAISHAInventor: Shoji Matsumoto
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Patent number: 11553586Abstract: A wiring substrate which includes a base member having a first surface, a first differential signal line disposed on the first surface of the base member and a second differential signal line disposed adjacent to the first differential signal line on the first surface of the base member. A ground layer which faces the first and second differential signal lines, has a plurality of openings continuously arranged along a predetermined direction. In a planar view of the wiring substrate, where a length of each of the plurality of openings in a direction along the signal lines is a length L1, a length of the opening in a direction orthogonal to Li is a length L2, and a distance between the first and second differential signal lines is a length L3, L1 is equal to or greater than four times L2, and L2 is equal to or less than L3.Type: GrantFiled: December 4, 2020Date of Patent: January 10, 2023Assignee: Canon Kabushiki KaishaInventors: Toshiyuki Yoshida, Yu Ogawa, Shoji Matsumoto
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Publication number: 20210273010Abstract: A transmission circuit includes a first semiconductor device, a second semiconductor device, a first signal line, a second signal line, a third signal line, and a ground line. A differential signal is composed of a first signal and a second signal. The first signal line is configured to connect the first semiconductor device and the second semiconductor device and used to transmit the first signal. The second signal line is configured to connect the first semiconductor device and the second semiconductor device and used to transmit the second signal. The second signal line, the first signal line, the ground line, and the third signal line are disposed in this order. A distance between the first signal line and the ground line is larger than a distance between the first signal line and the second signal line.Type: ApplicationFiled: May 20, 2021Publication date: September 2, 2021Inventor: Shoji Matsumoto
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Patent number: 11043525Abstract: A transmission circuit includes a first semiconductor device, a second semiconductor device, a first signal line, a second signal line, a third signal line, and a ground line. A differential signal is composed of a first signal and a second signal. The first signal line is configured to connect the first semiconductor device and the second semiconductor device and used to transmit the first signal. The second signal line is configured to connect the first semiconductor device and the second semiconductor device and used to transmit the second signal. The second signal line, the first signal line, the ground line, and the third signal line are disposed in this order. A distance between the first signal line and the ground line is larger than a distance between the first signal line and the second signal line.Type: GrantFiled: September 3, 2019Date of Patent: June 22, 2021Assignee: CANON KABUSHIKI KAISHAInventor: Shoji Matsumoto
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Publication number: 20210185798Abstract: A wiring substrate which includes a base member having a first surface, a first differential signal line disposed on the first surface of the base member and a second differential signal line disposed adjacent to the first differential signal line on the first surface of the base member. A ground layer which faces the first and second differential signal lines, has a plurality of openings continuously arranged along a predetermined direction. In a planar view of the wiring substrate, where a length of each of the plurality of openings in a direction along the signal lines is a length L1, a length of the opening in a direction orthogonal to L1 is a length L2, and a distance between the first and second differential signal lines is a length L3, L1 is equal to or greater than four times L2, and L2 is equal to or less than L3.Type: ApplicationFiled: December 4, 2020Publication date: June 17, 2021Inventors: Toshiyuki Yoshida, Yu Ogawa, Shoji Matsumoto
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Patent number: 11019719Abstract: A printed circuit board includes an electrical component including a signal terminal, and a printed wiring board on which the electrical component is mounted. The printed wiring board includes a signal line connected to the signal terminal. The signal line includes a first line portion, a second line portion, a third line portion, and a fourth line portion disposed continuously in this order. The signal terminal is joined with the fourth line portion such that the signal terminal and the fourth line portion form an integral structure. A second characteristic impedance of the second line portion is lower than a first characteristic impedance of the first line portion. A third characteristic impedance of the third line portion is higher than the first characteristic impedance. A fourth characteristic impedance of the integral structure formed by the fourth line portion and the signal terminal is lower than the first characteristic impedance.Type: GrantFiled: July 14, 2020Date of Patent: May 25, 2021Assignee: CANON KABUSHIKI KAISHAInventor: Shoji Matsumoto
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Publication number: 20210045228Abstract: A printed circuit board includes an electrical component including a signal terminal, and a printed wiring board on which the electrical component is mounted. The printed wiring board includes a signal line connected to the signal terminal. The signal line includes a first line portion, a second line portion, a third line portion, and a fourth line portion disposed continuously in this order. The signal terminal is joined with the fourth line portion such that the signal terminal and the fourth line portion form an integral structure. A second characteristic impedance of the second line portion is lower than a first characteristic impedance of the first line portion. A third characteristic impedance of the third line portion is higher than the first characteristic impedance. A fourth characteristic impedance of the integral structure formed by the fourth line portion and the signal terminal is lower than the first characteristic impedance.Type: ApplicationFiled: July 14, 2020Publication date: February 11, 2021Inventor: Shoji Matsumoto
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Patent number: 10716211Abstract: A printed wiring board includes a plurality of first wirings and a plurality of second wirings. The plurality of first wirings each include a first via conductor disposed outside a first region, a second region, and a third region in a plan view, and a first conductor pattern extending from the first via conductor to the first region. The plurality of second wirings each include a second via conductor disposed outside the first region, the second region, and the third region, and a second conductor pattern extending from the second via conductor to the first region. A fourth region overlaps with a fifth region in the plan view, the fourth region being a region in which a plurality of first conductor patterns are disposed, the fifth region being a region in which a plurality of second conductor patterns are disposed.Type: GrantFiled: January 31, 2019Date of Patent: July 14, 2020Assignee: CANON KABUSHIKI KAISHAInventors: Takashi Numagi, Shoji Matsumoto, Hiroyuki Yamaguchi, Youhei Tazawa
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Patent number: 10679766Abstract: A printed circuit board has a printed wiring board and a semiconductor package mounted on the printed wiring board. The printed wiring board and the semiconductor package are connected with a plurality of solder balls. An underfill material covering the plurality of solder balls is filled between the printed wiring board and the semiconductor package. The underfill material has a relative dielectric constant of 8.6 or more and 54.4 or less. Thus, crosstalk noise generated in wiring in the out-of-plane direction is reduced without increasing the mounting area.Type: GrantFiled: March 19, 2018Date of Patent: June 9, 2020Assignee: Canon Kabushiki KaishaInventors: Takuya Kondo, Shoji Matsumoto, Seiji Hayashi
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Publication number: 20200098816Abstract: A transmission circuit includes a first semiconductor device, a second semiconductor device, a first signal line, a second signal line, a third signal line, and a ground line. A differential signal is composed of a first signal and a second signal. The first signal line is configured to connect the first semiconductor device and the second semiconductor device and used to transmit the first signal. The second signal line is configured to connect the first semiconductor device and the second semiconductor device and used to transmit the second signal. The second signal line, the first signal line, the ground line, and the third signal line are disposed in this order. A distance between the first signal line and the ground line is larger than a distance between the first signal line and the second signal line.Type: ApplicationFiled: September 3, 2019Publication date: March 26, 2020Inventor: Shoji Matsumoto
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Publication number: 20190246498Abstract: A printed wiring board includes a plurality of first wirings and a plurality of second wirings. The plurality of first wirings each include a first via conductor disposed outside a first region, a second region, and a third region in a plan view, and a first conductor pattern extending from the first via conductor to the first region. The plurality of second wirings each include a second via conductor disposed outside the first region, the second region, and the third region, and a second conductor pattern extending from the second via conductor to the first region. A fourth region overlaps with a fifth region in the plan view, the fourth region being a region in which a plurality of first conductor patterns are disposed, the fifth region being a region in which a plurality of second conductor patterns are disposed.Type: ApplicationFiled: January 31, 2019Publication date: August 8, 2019Inventors: Takashi Numagi, Shoji Matsumoto, Hiroyuki Yamaguchi, Youhei Tazawa
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Publication number: 20190224260Abstract: [Problem] To provide a metabolic syndrome inhibitor which can inhibit the accumulation of visceral fat and body fat to thereby ameliorate or prevent metabolic syndrome. [Solution] The metabolic syndrome inhibitor according to the present invention comprises soybean hypocotyl oil as an active ingredient. In particular, the metabolic syndrome inhibitor serves as a body fat accumulation inhibitor and/or a blood neutral fat increase inhibitor. In particular, the body fat accumulation inhibitor serves as a visceral fat accumulation inhibitor.Type: ApplicationFiled: June 26, 2017Publication date: July 25, 2019Inventors: Shoji MATSUMOTO, Saki NISHIMURA, Masayoshi SAKAINO, Takatoshi YAMASHITA
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Patent number: 10306761Abstract: Provided is a printed wiring board including: a plurality of inner layers including a ground layer and a power supply layer; and a plurality of ground vias and a plurality of power supply vias each provided to penetrate at least the ground layer and the power supply layer in a thickness direction of the printed wiring board, a ground potential being applied to the plurality of ground vias at the ground layer, and a power supply potential being applied to the plurality of power supply vias at the power supply layer. In a top view from a direction perpendicular to the printed wiring board, a distance between vias to which the same potential is applied is shorter than a distance between vias to which different potentials are applied.Type: GrantFiled: November 29, 2017Date of Patent: May 28, 2019Assignee: CANON KABUSHIKI KAISHAInventors: Takashi Numagi, Youhei Tazawa, Shoji Matsumoto
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Publication number: 20180211743Abstract: A printed circuit board has a printed wiring board and a semiconductor package mounted on the printed wiring board. The printed wiring board and the semiconductor package are connected with a plurality of solder balls. An underfill material covering the plurality of solder balls is filled between the printed wiring board and the semiconductor package. The underfill material has a relative dielectric constant of 8.6 or more and 54.4 or less. Thus, crosstalk noise generated in wiring in the out-of-plane direction is reduced without increasing the mounting area.Type: ApplicationFiled: March 19, 2018Publication date: July 26, 2018Inventors: Takuya Kondo, Shoji Matsumoto, Seiji Hayashi
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Publication number: 20180168039Abstract: Provided is a printed wiring board including: a plurality of inner layers including a ground layer and a power supply layer; and a plurality of ground vias and a plurality of power supply vias each provided to penetrate at least the ground layer and the power supply layer in a thickness direction of the printed wiring board, a ground potential being applied to the plurality of ground vias at the ground layer, and a power supply potential being applied to the plurality of power supply vias at the power supply layer. In a top view from a direction perpendicular to the printed wiring board, a distance between vias to which the same potential is applied is shorter than a distance between vias to which different potentials are applied.Type: ApplicationFiled: November 29, 2017Publication date: June 14, 2018Inventors: Takashi Numagi, Youhei Tazawa, Shoji Matsumoto
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Patent number: 9953743Abstract: A printed circuit board has a printed wiring board and a semiconductor package mounted on the printed wiring board. The printed wiring board and the semiconductor package are connected with a plurality of solder balls. An underfill material covering the plurality of solder balls is filled between the printed wiring board and the semiconductor package. The underfill material has a relative dielectric constant of 8.6 or more and 54.4 or less. Thus, crosstalk noise generated in wiring in the out-of-plane direction is reduced without increasing the mounting area.Type: GrantFiled: April 16, 2015Date of Patent: April 24, 2018Assignee: Canon Kabushiki KaishaInventors: Takuya Kondo, Shoji Matsumoto, Seiji Hayashi
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Patent number: 9894751Abstract: First and second semiconductor devices and first and second bypass circuits are mounted on a printed wiring board. The first bypass circuit and the second bypass circuit are provided closer to the first semiconductor device and to the second semiconductor device, respectively. The first bypass circuit has one end connected to a power plane through a first power supply via and the other end connected to a ground plane through a first ground via. The second bypass circuit has one end connected to the power plane through a second power supply via and the other end connected to the ground plane through a second ground via. The ground plane has a slit between the connecting portions of the first and second ground vias to increase the impedance between the connecting portions of the first and the second ground vias. Thus, jitters caused by power supply noise can be reduced.Type: GrantFiled: November 18, 2015Date of Patent: February 13, 2018Assignee: Canon Kabushiki KaishaInventors: Yusuke Murai, Shoji Matsumoto, Takashi Numagi, Hiroyuki Yamaguchi, Nobuaki Yamashita
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Publication number: 20170368015Abstract: An object of the invention is to provide a compound that can be utilized as an antiviral agent, in particular as an anti-RNA viral agent, and especially as an anti-RS viral agent. The invention provides a compound indicated by Formula (1), wherein R1 each independently represent hydrogen, halogen, hydroxyl, amino, carboxyl, C1-C6 alkyl, C1-C6 alkoxyl, C1-C6 halogenoalkyl, C1-C6 alkoxycarbonyl, C1-C6 alkylamino, C2-C5 alkenyl, C3-C6 cycloalkyl, or optionally substituted aryl; R2 each independently represent hydrogen, C1-C6 alkyl, C1-C6 halogenoalkyl, C2-C5 alkenyl, C3-C6 cycloalkyl, optionally substituted aryl or heterocyclic group; and one or more R1 may be present in the same ring, an isomer thereof, a pharmaceutically acceptable salt thereof, or a mixture of these. The compounds provided by the invention are useful as drugs for the prevention or treatment of infectious diseases by virus, especially RS virus, and in particular infectious diseases in the lower airways (e.g., bronchiolitis, pneumonia, etc.).Type: ApplicationFiled: December 25, 2015Publication date: December 28, 2017Applicant: NATIONAL UNIVERSITY CORPORATION CHIBA UNIVERSITYInventors: Hiroshi SHIRASAWA, Takayoshi ARAI, Yutaka TAMURA, Kengo SAITO, Akiko SUGANAMI, Yoshifumi OHNO, Akira YANAGISAWA, Shoji MATSUMOTO, Tetsuhiro NEMOTO, Ouji WATANABE