Abstract: Some embodiments include methods of forming one or more doped regions in a semiconductor substrate. Plasma doping may be used to form a first dopant to a first depth within the substrate. The first dopant may then be impacted with a second dopant to knock the first dopant to a second depth within the substrate. In some embodiments the first dopant is p-type (such as boron) and the second dopant is neutral type (such as germanium). In some embodiments the second dopant is heavier than the first dopant.

Abstract: An earphone includes a headset plug and an earphone cord connecting to the headset plug. A protector is located around the junction of the headset plug and the earphone cord. The protector includes a fastening member secured to the headset plug, and a rotary member located around the earphone cord and assembled to the fastening member, so that the rotary member can rotate relative to the fastening member with the earphone cord when the earphone cord is bent.

Abstract: Rapid thermal processing systems and associated methods are disclosed herein. In one embodiment, a method for heating a microelectronic substrate include generating a plasma, applying the generated plasma to a surface of the microelectronic substrate, and raising a temperature of the microelectronic substrate with the generated plasma applied to the surface of the microelectronic substrate. The method further includes continuing to apply the generated plasma until the microelectronic substrate reaches a desired temperature.

Abstract: Some embodiments include methods of processing a unit containing crystalline material. A damage region may be formed within the crystalline material, and a portion of the unit may be above the damage region. A chuck may be used to bend the unit and thereby induce cleavage along the damage region to form a structure from the portion of the unit above the damage region. Some embodiments include methods of forming semiconductor-on-insulator constructions. A unit may be formed to have dielectric material over monocrystalline semiconductor material. A damage region may be formed within the monocrystalline semiconductor material, and a portion of the monocrystalline semiconductor material may be between the damage region and the dielectric material. The unit may be incorporated into an assembly with a handle component, and a chuck may be used to contort the assembly and thereby induce cleavage along the damage region.

Abstract: Methods of implanting dopant ions in a substrate include depositing a sacrificial material on a substrate. Dopant ions are implanted into the substrate while sputtering the sacrificial material, without substantially sputtering the substrate. Substantially no sacrificial material remains on the substrate after the implanting of the dopant ions. Some methods include forming a sacrificial material over a substrate, and implanting dopant ions into the substrate while removing substantially all the sacrificial material from the substrate. Substantially no sputtering of the substrate occurs during the implanting of the dopant ions. Methods of doping a substrate include implanting dopant ions into a substrate having a sacrificial material thereon, and sputtering the sacrificial material while implanting the dopant ions without substantially sputtering the substrate. Substantially no sacrificial material remains on the substrate after implanting the dopant ions.

Abstract: Some embodiments include methods of forming one or more doped regions in a semiconductor substrate. Plasma doping may be used to form a first dopant to a first depth within the substrate. The first dopant may then be impacted with a second dopant to knock the first dopant to a second depth within the substrate. In some embodiments the first dopant is p-type (such as boron) and the second dopant is neutral type (such as germanium). In some embodiments the second dopant is heavier than the first dopant.

Abstract: Methods of implanting dopants into a silicon substrate using a predeposited sacrificial material layer with a defined thickness that is removed by sputtering effect is provided.

Abstract: A method for fabricating a dielectric layer with improved insulating properties is provided, including: providing a dielectric layer having a first resistivity; performing a hydrogen plasma doping process to the dielectric layer; and annealing the dielectric layer, wherein the dielectric layer has a second resistivity greater than that of the first resistivity after annealing thereof.

Abstract: A method for fabricating a dielectric layer with improved insulating properties is provided, including: providing a dielectric layer having a first resistivity; performing a hydrogen plasma doping process to the dielectric layer; and annealing the dielectric layer, wherein the dielectric layer has a second resistivity greater than that of the first resistivity after annealing thereof.

Abstract: Some embodiments include methods of forming one or more doped regions in a semiconductor substrate. Plasma doping may be used to form a first dopant to a first depth within the substrate. The first dopant may then be impacted with a second dopant to knock the first dopant to a second depth within the substrate. In some embodiments the first dopant is p-type (such as boron) and the second dopant is neutral type (such as germanium). In some embodiments the second dopant is heavier than the first dopant.

Abstract: A electronic device (100) includes a removable chip card (40) for carrying information, comprise a housing (10) and a ejecting mechanism (30). The housing (10) defines a chamber (12) and a base (14) formed adjacent to the chamber. The chamber (12) is used for accommodating a battery (20) therein. The base (14) is used for receiving the chip card (40) therewith. The ejecting mechanism (30) is mounted in the housing (10) and includes a sliding member (32) and an elastic member (36). When the battery (20) is accommodated in the chamber (12), the chip card (40) is secured between the sliding member (32) and the battery (20). When the battery (20) is removed from the chamber (12), the elastic member (36) biases the sliding member (32) to eject the chip card (40) outwardly from the base (14).

Abstract: A housing (10) of a portable electronic device includes an upper housing (11), a lower housing (12) and a protecting component (13). The upper housing defines a first latching member (1112) therein. The lower housing defines a second latching member (121) therein. The protecting component is assembled between the upper housing and the lower housing for preventing dust and vapor from entering the electronic device and defines a first latching portion (1313) corresponding to the first latching member and a second latching portion (1314) corresponding to the second latching member. The first latching portion and the second latching member respectively cooperate with the first latching member and the second latching member to assemble the upper housing, the lower housing and the protecting component together.

Abstract: Methods of implanting dopants into a silicon substrate using a predeposited sacrificial material layer with a defined thickness that is removed by sputtering effect is provided.

Abstract: Methods of implanting dopants into a silicon substrate using a predeposited sacrificial material layer with a defined thickness that is removed by sputtering effect is provided.

Abstract: Rapid thermal processing systems and associated methods are disclosed herein. In one embodiment, a method for heating a microelectronic substrate include generating a plasma, applying the generated plasma to a surface of the microelectronic substrate, and raising a temperature of the microelectronic substrate with the generated plasma applied to the surface of the microelectronic substrate. The method further includes continuing to apply the generated plasma until the microelectronic substrate reaches a desired temperature.

Abstract: A hinge assembly (200) includes a housing (12), a shaft (11), a fixing pin (14), a transposition mechanism (13) and a first spring (16). The housing has a circumferential wall defining a manual slot (121) and an automatic slot (123). Each of the manual slot and the automatic slot runs through a circumferential wall thereof. The shaft defines a pin hole (1141), and the shaft is engaged in the housing. The fixing pin passes through the pin hole of the shaft. One end of the fixing pin is alternatively received in the manual slot or the automatic slot. The transposition mechanism is configured for switching the pin from the manual slot to the automatic slot. The first spring provides an elastic force causing the housing to move relative to the shaft when the pin breaks away from the manual slot.

Abstract: A method of forming an intermediate semiconductor device is disclosed that comprises providing a semiconductor substrate, forming a photoresist layer on the semiconductor substrate, implanting a dopant into the semiconductor substrate, and removing a dopant-containing layer from the photoresist layer. The dopant-containing layer includes dopant residuals and a carbon-rich crust and may be formed during implantation. The dopant-containing layer may be removed from the photoresist layer by exposing the dopant-containing layer to a water rinse, a chlorinated plasma or to a fluorinated plasma. The water rinse may include deionized water that is maintained at a temperature that ranges from approximately 25° C. to approximately 80° C. The fluorinated plasma may be formed from a gaseous precursor selected from the group consisting of nitrogen trifluoride, carbon tetrafluoride, trifluoromethane, hexafluoroethane, sulfur hexafluoride, and mixtures thereof.

Abstract: Elevated crystal silicon photosensors for imagers pixels, each photosensor formed of crystal silicon above the surface of a substrate that has pixel circuitry formed thereon. The imager has a high fill factor and good imaging properties due to the crystal silicon photosensor.

Abstract: A electronic device (100) includes a removable chip card (40) for carrying information, comprise a housing (10) and a ejecting mechanism (30). The housing (10) defines a chamber (12) and a base (14) formed adjacent to the chamber. The chamber (12) is used for accommodating a battery (20) therein. The base (14) is used for receiving the chip card (40) therewith. The ejecting mechanism (30) is mounted in the housing (10) and includes a sliding member (32) and an elastic member (36). When the battery (20) is accommodated in the chamber (12), the chip card (40) is secured between the sliding member (32) and the battery (20). When the battery (20) is removed from the chamber (12), the elastic member (36) biases the sliding member (32) to eject the chip card (40) outwardly from the base (14).

Abstract: Methods of determining a total impurity dose for a plasma doping process, and an apparatus configured to determine same. A total ion dose implanted in a semiconductor substrate is directly measured, such as by utilizing a Faraday cup. A ratio of impurity-based ion species to non-impurity-based ion species in a plasma generated by the plasma doping process and a ratio of each impurity-based ion species to a total impurity-based ion species in the plasma are directly measured. The ratios may be directly measured by ion mass spectroscopy. The total ion dose and the ratios are used to determine the total impurity dose. The apparatus includes an ion detector, an ion mass spectrometer, a dosimeter, and software.