Abstract: A method and apparatus for using different timings to latch signals sent by two memory devices of identical design to compensate for differences in the lengths of conductors across which the signals must propagate.

Abstract: A method and apparatus for adjusting memory signal timings by shifting the timing of a clock signal generated by a memory controller relative to the time at which other signals begin to be transmitted by the memory controller.

Abstract: A programmable termination circuit (12) selectively providing a termination voltage to a driver or receiver of a high-speed serial link, such as CML I/O's. The programmable termination circuit (12) is adapted for use both at a transmitter front end (10) and at a receiver front-end (20) to selectively terminate the respective circuit to one of multiple available voltage supplies (VDDA, VDDT), such as 1.8 volts and 3.3 volts. The programmable termination circuit is software controllable via a single control signal (TS). A level shifter (14) circuit is provided for coupling the termination control signal (TS) to the programmable termination circuit (12) to level shift the termination control signal to a logic level suitable with large FETs (M1, M2) coupled to and controlling the connection of the voltage supplies.

Abstract: A semiconductor device is designed with a common supply voltage terminal (330). A plurality of standard cells (360-364), each having a plurality of leads (308,326) is connected to the common supply terminal. A plurality of connecting leads (322-324) corresponding to respective standard cells is coupled between at least two leads of the plurality of leads.

Abstract: Methods are provided for the clssification of disease types (e.g., cancer types), outcome predictions, and treatment classes based on algorithmic classifiers used to analyze large datasets.

Abstract: An electrostatic discharge (ESD) protection device formed in the semiconductor layer of a semiconductor-on-insulator device, wherein the semiconductor layer has first and second wells. A discharge circuit is formed in the first well, operable to discharge the ESD pulse to ground. A pump circuit is formed in the second well, operable to use a portion of an ESD pulse's voltage to pump current into the first well for allowing the discharge circuit to turn on uniformly.

Abstract: A new method for identifying a predetermined number of data points of interest in a large data set. The data points of interest are ranked in relation to the distance to their neighboring points. The method employs partition-based detection algorithms to partition the data points and then compute upper and lower bounds for each partition. These bounds are then used to eliminate those partitions that do contain the predetermined number of data points of interest. The data points of interest are then computed from the remaining partitions that were not eliminated. The present method eliminates a significant number of data points from consideration as the points of interest, thereby resulting in substantial savings in computational expense compared to conventional methods employed to identify such points.

Abstract: A programmable termination circuit (12) selectively providing a termination voltage to a driver or receiver of a high-speed serial link, such as CML I/O's. The programmable termination circuit (12) is adapted for use both at a transmitter front end (10) and at a receiver front-end (20) to selectively terminate the respective circuit to one of multiple available voltage supplies (VDDA, VDDT), such as 1.8 volts and 3.3 volts. The programmable termination circuit is software controllable via a single control signal (TS). A level shifter (14) circuit is provided for coupling the termination control signal (TS) to the programmable termination circuit (12) to level shift the termination control signal to a logic level suitable with large FETs (M1, M2) coupled to and controlling the connection of the voltage supplies.

Abstract: A method for generating an approximate answer to a query in a database environment in which the database has a plurality of base relations. A query relating to a database is received, and an approximate answer to the query is generated such that the approximate answer is based on at least one join synopsis formed from the database. The method further includes steps of forming a sample-tuple set for at least one selected base relation of a plurality of base relations of a database such that each sample-tuple set contains at least one sample tuple from a corresponding base relation, and forming a join synopsis set for each selected base relation such that each join synopsis set contains a join synopsis for each sample tuple in a sample-tuple set. A join synopsis of a sample tuple is based on a join of the sample tuple and at least one descendent relation of the sample tuple. All join synopsis sets form a statistical summary of the database and are stored.

Abstract: For simulating electrostatic discharge and latch-up in semiconductor devices, the disclosed system and method for extracting parasitic devices combine input data from device layout, technology rules and doping profiles in order to extract netlists, element location and substrate resistance, analyze the layout for parasitic device formation, store these lists in a verification data base, translate the data base into a specific format, and finally output lists of ESD- and latch-up-sensitive elements and their locations in a specific format such as SPICE format.

Abstract: A new method for identifying a predetermined number of data points of interest in a large data set. The data points of interest are ranked in relation to the distance to their neighboring points. The method employs partition-based detection algorithms to partition the data points and then compute upper and lower bounds for each partition. These bounds are then used to eliminate those partitions that do contain the predetermined number of data points of interest. The data points of interest are then computed from the remaining partitions that were not eliminated. The present method eliminates a significant number of data points from consideration as the points of interest, thereby resulting in substantial savings in computational expense compared to conventional methods employed to identify such points.

Abstract: For quantitatively identifying sensitivities against electrostatic discharge (ESD) and latch-up in an integrated circuit (IC) design (before the actual IC is fabricated), the disclosed computer system and method combine information from the design netlist, the elements model, a safe operating file, and a list of stress simulations, and apply a simulated, quantified ESD event to the design. The observed sensitivities of the design elements to ESD and latch-up are then quantitatively analyzed, critical stress values are judged, and element failures recorded. Finally, element and location lists of sensitivities and failures are output in a specific format.

Abstract: For quantitatively identifying sensitivities against electrostatic discharge (ESD) and latch-up in an integrated circuit (IC) design (before the actual IC is fabricated), the disclosed computer system and method combine information from the design netlist, the elements model, a safe operating file, and a list of stress simulations, and apply a simulated, quantified ESD event to the design. The observed sensitivities of the design elements to ESD and latch-up are then quantitatively analyzed, critical stress values are judged, and element failures recorded. Finally, element and location lists of sensitivities and failures are output in a specific format.

Abstract: For simulating electrostatic discharge and latch-up in semiconductor devices, the disclosed system and method for extracting parasitic devices combine input data from device layout, technology rules and doping profiles in order to extract netlists, element location and substrate resistance, analyze the layout for parasitic device formation, store these lists in a verification data base, translate the data base into a specific format, and finally output lists of ESD- and latch-up-sensitive elements and their locations in a specific format such as SPICE format.

Abstract: Sets of genetic markers for specific tumor classes are described, as well as methods of identifying a biological sample based on these markers. Also described are diagnostic, prognostic, and therapeutic screening uses for these markers, as well as oligonucleotide arrays comprising these markers.

Abstract: A semiconductor device is designed with a common supply voltage terminal (330). A plurality of standard cells (360-364), each having a plurality of leads (308,326) is connected to the common supply terminal. A plurality of connecting leads (322-324) corresponding to respective standard cells is coupled between at least two leads of the plurality of leads.

Abstract: The present invention provides various methods and apparatus for providing accurate estimates for point and range queries over two-dimensional rectangular data. However, the techniques of the present invention for rectangular data can be applied to data of other shapes, point data, or linear data. The present invention provides several grouping techniques for the approximating of spatial data. A method is disclosed for grouping a plurality of spatial inputs into a plurality of buckets. In one form of the present invention the plurality of spatial inputs, is grouped based on an equi-area partitioning technique. The equi-area partitioning technique can use the longest dimension of a bucket or bounding polygon as the criteria for splitting into further buckets or bounding polygons. An equi-count technique can also be used wherein the buckets are split using the highest projected spatial input count along a dimension as a splitting criteria. The bounding polygons may be minimum bounding rectangles.

Abstract: I/O-efficient methods and apparatus are provided for the d-dimensional join problem in one, two, and three dimensions, and are also generalized for arbitrary higher dimensions. Let N be the total number of rectangles in the two sets to be joined, M the total amount of memory available, B the disk block size, and T the total number of pairs in the output of the join. Define n=N/B, m=M/B, and t=T/B. For one and two dimensions, I/O-optimal join methods are provided that run in O(nlogmn+t) I/O operations and have utility to temporal and spatial database systems. For dimensions d≧3, methods are provided that run in O(nlogm(d−1) n+t) I/O operations, which is within a logm(d−2)n factor of the currently known lower bounds.

Abstract: A system and method for discovering association rules that display regular cyclic variation over time is disclosed. Such association rules may apply over daily, weekly or monthly (or other) cycles of sales data or the like. A first technique, referred to as the sequential algorithm, treats association rules and cycles relatively independently. Based on the interaction between association rules and time, we employ a new technique called cycle pruning, which reduces the amount of time needed to find cyclic association rules. A second algorithm, the interleaved algorithm, uses cycle pruning and other optimization techniques for discovering cyclic association rules with reduced overhead.

Abstract: A system and method for determining calendric association rules are provided. The method uses calendars to describe the variation of association rules over time, where a specific calendar is defined as a collection of time intervals describing some phenomenon. In accordance with the invention, there is provided a method for identifying calendric association rules in transactional data with time stamped data items. In one exemplary embodiment, the method identifies large itemsets in each time unit, where a large itemset is an itemset that occurs in the transactions more than a given threshold. The method then identifies association rules of the form X—Y from the large itemsets by determining if a requisite support for the itemset XY and a given confidence threshold (ratio of (support of XY)/(support of X)) has been satisfied. Calendric association rules are then generated by examining identified association rules to determine which ones exhibit the temporal patterns specified by given calendars.