Patents by Inventor Stefan Landau
Stefan Landau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10020245Abstract: A method of manufacturing a laminate electronic device is disclosed. One embodiment provides a carrier, the carrier defining a first main surface and a second main surface opposite to the first main surface. The carrier has a recess pattern formed in the first main surface. A first semiconductor chip is attached on one of the first and second main surface. A first insulating layer overlying the main surface of the carrier on which the first semiconductor chip is attached and the first semiconductor chip is formed. The carrier is then separated into a plurality of parts along the recess pattern.Type: GrantFiled: January 9, 2014Date of Patent: July 10, 2018Assignee: Infineon Technologies AGInventors: Henrik Ewe, Joachim Mahler, Anton Prueckl, Stefan Landau
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Patent number: 9953952Abstract: A semiconductor device includes a carrier, a chip attached to the carrier, a sealant vapor deposited over the chip and the carrier, and encapsulation material deposited over the sealed chip and the sealed carrier.Type: GrantFiled: August 20, 2008Date of Patent: April 24, 2018Assignee: Infineon Technologies AGInventors: Joachim Mahler, Michael Juerss, Stefan Landau
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Patent number: 9147649Abstract: A multi-chip module and method is disclosed. One embodiment provides an electronic module having a first metal structure and a second metal structure. A first semiconductor chip is electrically connected with its back side to the first metal structure. A second semiconductor chip is arranged with its back side lying over the front side of the first semiconductor chip. The second metal structure includes multiple external contact elements attached over the front side of the second semiconductor chip. At least two of the multiple external contact elements are electrically connected to the front side of the second semiconductor chip.Type: GrantFiled: January 24, 2008Date of Patent: September 29, 2015Assignee: Infineon Technologies AGInventors: Stefan Landau, Joachim Mahler, Thomas Wowra
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Patent number: 9142739Abstract: A method and a system for a reliable LED semiconductor device are provided. In one embodiment, the device comprises a carrier, a light emitting diode disposed on the carrier, an encapsulating material disposed over the light emitting diode and the carrier, at least one through connection formed in the encapsulating material, and a metallization layer disposed and structured over the at least one through connection.Type: GrantFiled: June 18, 2013Date of Patent: September 22, 2015Assignee: Infineon Technologies AGInventors: Andreas Eder, Henrik Ewe, Stefan Landau, Joachim Mahler
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Patent number: 8980687Abstract: A method of manufacturing a semiconductor device includes providing a transfer foil. A plurality of semiconductor chips is placed on and adhered to the transfer foil. The plurality of semiconductor chips adhered to the transfer foil is placed over a multi-device carrier. Heat is applied to laminate the transfer foil over the multi-device carrier, thereby accommodating the plurality of semiconductor chips between the laminated transfer foil and the multi-device carrier.Type: GrantFiled: February 8, 2012Date of Patent: March 17, 2015Assignee: Infineon Technologies AGInventors: Ivan Nikitin, Stefan Landau, Joachim Mahler, Alexander Heinrich, Ralf Wombacher
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Patent number: 8969985Abstract: A semiconductor chip package and a method to manufacture a semiconductor chip package are disclosed. An embodiment of the present invention comprises a substrate and a semiconductor chip disposed on the substrate and laterally surrounded by a packaging material. The package further comprises a current rail adjacent the semiconductor chip, the current rail isolated from the semiconductor chip by an isolation layer, a first external pad, and a via contact contacting the current rail with the first external pad.Type: GrantFiled: August 30, 2011Date of Patent: March 3, 2015Assignee: Infineon Technologies AGInventors: Volker Strutz, Stefan Landau, Udo Ausserlechner
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Patent number: 8866302Abstract: A device includes a first semiconductor chip with a first contact pad on a first face and a second semiconductor chip with a first contact pad on a first face. The second semiconductor chip is placed over the first semiconductor chip, wherein the first face of the first semiconductor chip faces the first face of the second semiconductor chip. Exactly one layer of an electrically conductive material is arranged between the first semiconductor chip and the second semiconductor chip. The exactly one layer of an electrically conductive material electrically couples the first contact pad of the first semiconductor chip to the first contact pad of the second semiconductor chip.Type: GrantFiled: January 25, 2011Date of Patent: October 21, 2014Assignee: Infineon Technologies AGInventors: Henrik Ewe, Joachim Mahler, Anton Prueckl, Stefan Landau
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Patent number: 8836113Abstract: An electronic module. One embodiment includes a carrier. A first transistor is attached to the carrier. A second transistor is attached to the carrier. A first connection element includes a first planar region. The first connection element electrically connects the first transistor to the carrier. A second connection element includes a second planar region. The second connection element electrically connects the second transistor to the carrier. In one embodiment, a distance between the first planar region and the second planar region is smaller than 100 ?m.Type: GrantFiled: August 14, 2012Date of Patent: September 16, 2014Assignee: Infineon Technologies AGInventors: Stefan Landau, Erwin Huber, Josef Hoeglauer, Joachim Mahler, Tino Karczeweski
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Patent number: 8828804Abstract: An electronic device and fabrication of an electronic device. One embodiment provides applying a paste including electrically conductive particles to a surface of a semiconductor wafer. The semiconductor wafer is singulated with the electrically conductive particles for obtaining a plurality of semiconductor chips. At least one of the plurality of semiconductor chips is placed over a carrier with the electrically conductive particles facing the carrier. The electrically conductive particles are heated until the at least one semiconductor chip adheres to the carrier.Type: GrantFiled: April 30, 2008Date of Patent: September 9, 2014Assignee: Infineon Technologies AGInventors: Ivan Nikitin, Alexander Heinrich, Stefan Landau
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Patent number: 8816504Abstract: A device includes a first semiconductor chip with a first contact pad on a first face and a second semiconductor chip with a first contact pad on a first face. The second semiconductor chip is placed over the first semiconductor chip, wherein the first face of the first semiconductor chip faces the first face of the second semiconductor chip. Exactly one layer of an electrically conductive material is arranged between the first semiconductor chip and the second semiconductor chip. The exactly one layer of an electrically conductive material electrically couples the first contact pad of the first semiconductor chip to the first contact pad of the second semiconductor chip.Type: GrantFiled: January 25, 2011Date of Patent: August 26, 2014Assignee: Infineon Technologies AGInventors: Henrik Ewe, Joachim Mahler, Anton Prueckl, Stefan Landau
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Publication number: 20140117565Abstract: A method of manufacturing a laminate electronic device is disclosed. One embodiment provides a carrier, the carrier defining a first main surface and a second main surface opposite to the first main surface. The carrier has a recess pattern formed in the first main surface. A first semiconductor chip is attached on one of the first and second main surface. A first insulating layer overlying the main surface of the carrier on which the first semiconductor chip is attached and the first semiconductor chip is formed. The carrier is then separated into a plurality of parts along the recess pattern.Type: ApplicationFiled: January 9, 2014Publication date: May 1, 2014Applicant: Infineon Technologies AGInventors: Henrik Ewe, Joachim Mahler, Anton Prueckl, Stefan Landau
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Patent number: 8686569Abstract: A die arrangement includes a carrier having a first side and a second side opposite the first side, the carrier including an opening leading from the first side of the carrier to the second side of the carrier; a first die disposed over the first side of the carrier and electrically contacting the carrier; a second die disposed over the second side of the carrier and electrically contacting the carrier; and an electrical contact structure leading through the opening in the carrier and electrically contacting the second die.Type: GrantFiled: December 14, 2010Date of Patent: April 1, 2014Assignee: Infineon Technologies AGInventors: Frank Daeche, Joachim Mahler, Anton Prueckl, Stefan Landau, Josef Hoeglauer
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Patent number: 8687370Abstract: A housing for a chip arrangement is provided, the housing including: a carrier including a first carrier side configured to receive a chip arrangement, a second carrier side and one or more through-holes extending from the first carrier side to the second carrier side; at least one electrical connector inserted through a through-hole, the at least one electrical connector arranged to extend from the second carrier side to the first carrier side; wherein the at least one electrical connector may include: a first portion on the first carrier side; a second portion on the first carrier side, wherein the first portion is configured to extend away from the first carrier side at an angle to the second portion; and a third portion on the second carrier side, wherein the third portion is configured to extend away from the second carrier side at an angle to the second portion.Type: GrantFiled: November 14, 2011Date of Patent: April 1, 2014Assignee: Infineon Technologies AGInventors: Stefan Landau, Joachim Mahler
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Patent number: 8664043Abstract: A method of manufacturing a laminate electronic device is disclosed. One embodiment provides a carrier, the carrier defining a first main surface and a second main surface opposite to the first main surface. The carrier has a recess pattern formed in the first main surface. A first semiconductor chip is attached on one of the first and second main surface. A first insulating layer overlying the main surface of the carrier on which the first semiconductor chip is attached and the first semiconductor chip is formed. The carrier is then separated into a plurality of parts along the recess pattern.Type: GrantFiled: December 1, 2009Date of Patent: March 4, 2014Assignee: Infineon Technologies AGInventors: Henrik Ewe, Joachim Mahler, Anton Prueckl, Stefan Landau
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Publication number: 20130341780Abstract: A chip arrangement is provided. The chip arrangement including: a chip including at least one electrically conductive contact; a passivation material formed over the at least one electrically conductive contact; an encapsulation material formed over the passivation material; one or more holes formed through the encapsulation material and the passivation material, wherein the passivation material at least partially surrounds the one or more holes; and electrically conductive material provided within the one or more holes, wherein the electrically conductive material is electrically connected to the at least one electrically conductive contact.Type: ApplicationFiled: June 20, 2012Publication date: December 26, 2013Applicant: INFINEON TECHNOLOGIES AGInventors: Thorsten Scharf, Boris Plikat, Henrik Ewe, Anton Prueckl, Stefan Landau
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Publication number: 20130277704Abstract: A method and a system for a reliable LED semiconductor device are provided. In one embodiment, the device comprises a carrier, a light emitting diode disposed on the carrier, an encapsulating material disposed over the light emitting diode and the carrier, at least one through connection formed in the encapsulating material, and a metallization layer disposed and structured over the at least one through connection.Type: ApplicationFiled: June 18, 2013Publication date: October 24, 2013Inventors: Andreas Eder, Henrik Ewe, Stefan Landau, Joachim Mahler
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Publication number: 20130264721Abstract: The electronic module includes a first carrier and a first semiconductor chip arranged on the first carrier. A second semiconductor chip is arranged above the first semiconductor chip. A material layer adheres the second semiconductor chip to the first carrier and encapsulates the first semiconductor chip.Type: ApplicationFiled: April 5, 2012Publication date: October 10, 2013Applicant: INFINEON TECHNOLOGIES AGInventors: Stefan Landau, Joachim Mahler, Khalil Hosseini, Ivan Nikitin, Thomas Wowra, Lukas Ossowski
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Publication number: 20130200502Abstract: A method of manufacturing a semiconductor device includes providing a transfer foil. A plurality of semiconductor chips is placed on and adhered to the transfer foil. The plurality of semiconductor chips adhered to the transfer foil is placed over a multi-device carrier. Heat is applied to laminate the transfer foil over the multi-device carrier, thereby accommodating the plurality of semiconductor chips between the laminated transfer foil and the multi-device carrier.Type: ApplicationFiled: February 8, 2012Publication date: August 8, 2013Applicant: INFINEON TECHNOLOGIES AGInventors: Ivan Nikitin, Stefan Landau, Joachim Mahler, Alexander Heinrich, Ralf Wombacher
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Publication number: 20130120940Abstract: A housing for a chip arrangement is provided, the housing including: a carrier including a first carrier side configured to receive a chip arrangement, a second carrier side and one or more through-holes extending from the first carrier side to the second carrier side; at least one electrical connector inserted through a through-hole, the at least one electrical connector arranged to extend from the second carrier side to the first carrier side; wherein the at least one electrical connector may include: a first portion on the first carrier side; a second portion on the first carrier side, wherein the first portion is configured to extend away from the first carrier side at an angle to the second portion; and a third portion on the second carrier side, wherein the third portion is configured to extend away from the second carrier side at an angle to the second portion.Type: ApplicationFiled: November 14, 2011Publication date: May 16, 2013Applicant: INFINEON TECHNOLOGIES AGInventors: Stefan Landau, Joachim Mahler
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Publication number: 20130049746Abstract: A semiconductor chip package and a method to manufacture a semiconductor chip package are disclosed. An embodiment of the present invention comprises a substrate and a semiconductor chip disposed on the substrate and laterally surrounded by a packaging material. The package further comprises a current rail adjacent the semiconductor chip, the current rail isolated from the semiconductor chip by an isolation layer, a first external pad, and a via contact contacting the current rail with the first external pad.Type: ApplicationFiled: August 30, 2011Publication date: February 28, 2013Applicant: Infineon Technologies AGInventors: Volker Strutz, Stefan Landau, Udo Ausserlechner