Abstract: A semiconductor device and method. One embodiment provides an integral array of first carriers and an integral array of second carries connected to the integral array of first carriers. First semiconductor chips are arranged on the integral array of first carriers. The integral array of second carriers is arranged over the first semiconductor chips.

Abstract: A multi-chip module and method is disclosed. One embodiment provides an electronic module having a first metal structure and a second metal structure. A first semiconductor chip is electrically connected with its back side to the first metal structure. A second semiconductor chip is arranged with its back side lying over the front side of the first semiconductor chip. The second metal structure includes multiple external contact elements attached over the front side of the second semiconductor chip. At least two of the multiple external contact elements are electrically connected to the front side of the second semiconductor chip.

Abstract: A method for producing a power semiconductor module having surface mountable flat external contact areas is disclosed. At least one power semiconductor chip is fixed by its rear side on a drain external contact. An insulation layer covers the top side over the side edges of the semiconductor chip as far as the inner housing plane was a leaving free the source and gate contact areas on the top side of the semiconductor chip and also was partly leaving free the top sides of the corresponding external contacts.

Abstract: A semiconductor device includes a carrier such as a lead frame, a semiconductor die and an attachment member affixing the semiconductor die to the carrier. The attachment device includes an electrically conductive organic material.

Abstract: A method includes providing an integral array of first carriers, arranging first semiconductor chips on the first carriers, and arranging an integral array of second carriers over the semiconductor chips.

Abstract: A power semiconductor module having surface-mountable flat external contact areas and a method for producing the same is disclosed. In one embodiment, the top sides of the external contacts form an inner housing plane, on which at least one power semiconductor chip is fixed by its rear side on a drain external contact. An insulation layer covers the top side over the edge sides of the semiconductor chip as far as the inner housing plane whilst leaving free the source and gate contact areas on the top side of the semiconductor chip and also whilst partly leaving free the top sides of the corresponding external contacts. Arranged on the insulation layer is a connecting conductive layer between the source contact areas on the top side of the semiconductor chip and the top sides of the source external contacts, and also a gate connecting layer from the gate contact areas to the top side of the gate external contact.

Abstract: A multi-chip module includes at least one integrated circuit chip that is electrically connected to first external terminals of the multi-chip module and at least one power semiconductor chip that is electrically connected to second external terminals of the multi-chip module. All first external terminals of the multi-chip module are arranged in a contiguous region of an terminal area of the multi-chip module.

Abstract: The invention relates to a semiconductor device (1) comprising a semiconductor chip stack (2) and a plastic housing (3), and to methods for producing the semiconductor device (1). The semiconductor device (1) is constructed on a device carrier (4), on which a first semiconductor chip (5) is fixed by its rear side (6). At least one second semiconductor chip (8) is adhesively bonded by its rear side (9) on the top side (7) of the first semiconductor chip (5) by means of an adhesive layer (10). A second plastic composition (17) is arranged between a first plastic housing composition (11) of the plastic housing (3) and the edge sides (12, 13) of the adhesive layer and the edge sides (14, 15) of the second semiconductor chip (8) and also the top side (16) of the second semiconductor chip (8) in such a way that the first plastic housing composition (11) has no physical contact with the second semiconductor chip (8) and with the adhesive layer (10).

Abstract: A semiconductor component arrangement having a semiconductor component, a mount, and an adhesive, wherein the adhesive connects the semiconductor component to the mount and the adhesive contains a marker substance. Also disclosed is a method for inspecting the connection of a semiconductor component to a mount. The semiconductor component is fixed on the mount using an adhesive, wherein the adhesive contains a marker substance, the mount with the semiconductor component is cleaned, and the mount is inspected for residues of the adhesive on the basis of radiation which is characteristic of the marker substance.

Abstract: Power semiconductor module comprising surface-mountable flat external contact areas and method for producing the same The invention relates to a power semiconductor module (1) comprising surface-mountable flat external contact areas (3) and a method for producing the same. The top sides (10) of the external contacts (3) form an inner housing plane (11), on which at least one power semiconductor chip (6) is fixed by its rear side (8) on a drain external contact (13). An insulation layer (14) covers the top side (7) over the edge sides (15 to 18) of the semiconductor chip (6) as far as the inner housing plane (11) whilst leaving free the source and gate contact areas on the top side (7) of the semiconductor chip (6) and also whilst partly leaving free the top sides (10) of the corresponding external contacts (19 and 20).

Abstract: A power semiconductor component and process for producing power semiconductor components is disclosed. In one embodiment, a power semiconductor component is produced, including applying a semiconductor ship to a substrate using a fluorescent marker substance.