Abstract: A stacked semiconductor package including a number of solder ball pads formed on a lower surface of an interposing print circuit board, which is smaller than that of solder ball pads formed on an upper surface thereof, a pitch of the solder ball pads formed on the lower surface of the interposing print circuit board is greater than a pitch of the solder ball pads formed on the upper interposing print circuit board.

Abstract: Disclosed herein is a steer-by-wire system for automobiles. The steer-by-wire system includes a steering control unit and a signal input unit. The central control unit includes a reaction force generation unit, a damping force generation unit. The reaction force generation unit generates steering reaction force or restoring force, acting in the reverse direction to that of a steering torque. The damping force generation unit generates damping force, acting in the reverse direction to the steering reaction force or the restoring force (in the same direction as the steering torque). Furthermore, the central control unit generates a current control signal, which is applied to a steering feel generation motor, by combining the resulting values determined by the reaction force generation unit and the damping force generation unit a vehicle velocity signal in response to a steering angle signal, a steering torque signal and a steering angular velocity signal.

Abstract: Example embodiments of the present invention provide a reflector for generating a neutral beam and a substrate processing apparatus including the same. The reflector may include at least one reflecting plate including a reflecting layer onto which an ion beam collides and a supporting layer. The reflecting layer may reflect and convert the ion beam into a neutral beam, and the supporting layer may reduce thermal deformation of the reflecting layer.

Abstract: An ion beam apparatus includes a plasma chamber with a grid assembly installed at one end of the plasma chamber and a plasma sheath controller disposed between the plasma chamber and the grid assembly. The grid assembly includes first ion extraction apertures. The plasma sheath controller includes second ion extraction apertures smaller than the first ion extraction apertures. When the plasma sheath controller is used in this configuration, the surface of the plasma takes on a more planar configuration adjacent the controller so that ions, extracted from the plasma in a perpendicular direction to the plasma surface, pass cleanly through the apertures of the grid assembly rather than collide with the sidewalls of the grid assembly apertures. A semiconductor manufacturing apparatus and method for forming an ion beam are also provided.

Abstract: Provided is a semiconductor apparatus using an ion beam. The semiconductor apparatus may include a first grid to which a voltage applied. The voltage applied to the first grid may have the same potential level as that of a reference voltage applied to a wall portion of a plasma chamber in which plasma may be generated. The first grid may adjoin the plasma. Therefore, a potential level difference between the first grid and the wall portion of the plasma chamber may be zero, and thus the plasma may be stable.

Abstract: In a substrate processing apparatus using a neutralized beam and a method thereof, the substrate processing apparatus includes: an ion source for emitting an ion beam at an emitting angle; reflectors at which the ion beam emitted by the ion source is incident and subject to 2n collisions (where n is a positive integer) in first and second opposite directions to neutralize the ion beam as a neutralized beam and to restore a direction of propagation of the neutralized beam to the emitting angle of the ion beam; and a substrate at which the neutralized beam generated by the reflectors is incident on to perform a process. Accordingly, an incident angle of the resultant neutralized beam is perpendicular to a substrate, while the direction of propagation of the originating ion source and the surface of the substrate are maintained to be perpendicular to each other.

Abstract: A package-on-package (POP) package in which semiconductor packages are stacked using lead lines rather than conventional solder balls, and a fabricating method thereof are provided. According to the POP package and the fabricating method thereof of the present invention, the POP package is prevented from being short-circuited even when an underlying semiconductor package gets thicker and the POP package can sufficiently withstand deformation caused by post-fabrication warpage.

Abstract: A semiconductor device including a transistor and a method of forming thereof are provided. The semiconductor device comprises a metal gate electrode. A lower portion of the metal gate electrode fills a channel trench formed at a predetermined region of a substrate, and an upper portion of the metal gate electrode protrudes on the substrate. A gate insulating layer is interposed between inner sidewalls and a bottom surface of the channel trench, and the metal gate electrode. Source/drain regions are formed at the substrate in both sides of the metal gate electrode.

Abstract: A semiconductor chip package mounting structure may mount a semiconductor chip package on a module board by implementing a flexible circuit board. The semiconductor chip package may be electrically connected to a first surface of the flexible circuit board and the module board may be electrically connected to a second surface of the flexible circuit board.

Abstract: An apparatus and/or method for controlling an ion beam may be provided, and/or a method for preparing an extraction electrode for the same may be provided. In the apparatus, a plurality of extraction electrodes may be disposed in a path of an ion beam. At least one extraction electrode may include a plurality of sub-grids.

Abstract: In an example embodiment, a printed circuit board (PCB) includes a package substrate having a plurality of first solder balls and a first resist layer formed on the first side. The first resist layer may have a plurality of first elliptical openings. Each of the first elliptical openings exposes a portion of one of the solder ball lands, respectively. In a related example embodiment, the first solder ball lands may be disposed along at least one direction of the first side and long axis of the first elliptical openings are disposed having a declination of 30° to 60° with respect to the at least one direction. In yet another example embodiment, the PCB may also have a plurality of second solder ball lands formed on a second side of the package substrate, along with a second resist layer formed on the second side of the package and including a plurality of second elliptical openings exposing a portion of one of the second solder ball lands, respectively.

Abstract: Example embodiments of the present invention provide a reflector for generating a neutral beam and a substrate processing apparatus including the same. The reflector may include at least one reflecting plate including a reflecting layer onto which an ion beam collides and a supporting layer. The reflecting layer may reflect and convert the ion beam into a neutral beam, and the supporting layer may reduce thermal deformation of the reflecting layer.

Abstract: There is provided an apparatus for measuring an angle distribution of neutral beams. The apparatus includes a Faraday cup assembly having an opening disposed in a trajectory path of neutral beams supplied from a neutral beam source and receives neutral beam particles, a secondary electron emission plate disposed in the Faraday cup such that the neutral beam particles passing through the opening collide with it to generate secondary electron emissions, and a secondary electron collector disposed to collect the secondary electron emissions.

Abstract: A substrate processing apparatus may include a processing chamber including a plasma generating unit arranged in an upper region thereof. A grid system, which may extract ions from plasma formed by the plasma generating unit and may accelerate the ions to have substantially uniform directivity. The grid system may be positioned below the plasma generating unit. A reflector may be arranged below the grid system and may include parallel reflecting plates for converting the ions accelerated from the grid system into neutral beams.

Abstract: In a substrate processing apparatus using a neutralized beam and a method thereof, the substrate processing apparatus includes: an ion source for emitting an ion beam at an emitting angle; reflectors at which the ion beam emitted by the ion source is incident and subject to 2n collisions (where n is a positive integer) in first and second opposite directions to neutralize the ion beam as a neutralized beam and to restore a direction of propagation of the neutralized beam to the emitting angle of the ion beam; and a substrate at which the neutralized beam generated by the reflectors is incident on to perform a process. Accordingly, an incident angle of the resultant neutralized beam is perpendicular to a substrate, while the direction of propagation of the originating ion source and the surface of the substrate are maintained to be perpendicular to each other.

Abstract: A stacked semiconductor package including a number of solder ball pads formed on a lower surface of an interposing print circuit board, which is smaller than that of solder ball pads formed on an upper surface thereof, a pitch of the solder ball pads formed on the lower surface of the interposing print circuit board is greater than a pitch of the solder ball pads formed on the upper interposing print circuit board.

Abstract: A semiconductor device including a transistor and a method of forming thereof are provided. The semiconductor device comprises a metal gate electrode. A lower portion of the metal gate electrode fills a channel trench formed at a predetermined region of a substrate, and an upper portion of the metal gate electrode protrudes on the substrate. A gate insulating layer is interposed between inner sidewalls and a bottom surface of the channel trench, and the metal gate electrode. Source/drain regions are formed at the substrate in both sides of the metal gate electrode.

Abstract: A computer simulation method for a semiconductor device manufacturing process, includes: a first step for forming an initial section of the material with only open cells exposed to the growth or etching among the cells; a second step for inputting information including growth or etching points into each open cell; a third step for computing a movement speed for the growth or etching points; a fourth step for moving the growth or etching points for a time determined according to the movement speed; and a fifth step for forming a new etching section by re-arranging the open cells exposed to the growth or etching, after moving the growth or etching points, the second to fifth steps being repeatedly performed on the re-arranged open cells until the sum of the predetermined time reaches the time (T).