Patents by Inventor Tadashi Ogasawara

Tadashi Ogasawara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050085095
    Abstract: A sintered object of silicon monoxide for use as a material for forming silicon oxide thin films is provided of which the evaporation residue as determined by subjecting a sample thereof to thermogravimetry at a heating temperature of 1,300° C. and in a vacuum atmosphere, namely at a pressure of not higher than 10 Pa, is not more than 4% by mass relative to the sample before measurement. This sintered object can be produced by sintering SiO particles having a particle diameter of not smaller than 250 ?m, either after press forming thereof or during press forming thereof, in a non-oxygen atmosphere. This sintered object is high in evaporation rate and, when it is used as a material for film formation, an improvement in productivity in producing silicon oxide thin films can be expected. Thus, it can be widely applied in forming silicon oxide thin films useful as electric insulating films, mechanical protection films, optical films, barrier films of food packaging materials, etc.
    Type: Application
    Filed: November 29, 2002
    Publication date: April 21, 2005
    Inventors: Yoshitake Natsume, Tadashi Ogasawara, Munetoshi Watanabe, Kazuomi Azuma, Toshiharu Iwase
  • Patent number: 6813137
    Abstract: A chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, wherein when assuming a minimum distance from an outermost side of the internal electrode layer in the stacking direction to a surface of the element body is 1 and measuring an ion intensity ratio of Li and Zn, (Li/Zn), in a range from the surface of the element body to a depth of (0.9×1) by a secondary ion mass spectrometry (SIMS), 0.001≦(Li/Zn)≦500. According to the invention, it is possible to provide a chip shaped electronic device, such as a multilayer chip varistor, not requiring glass coating or other insulative protective layer, being tolerant of temperature changes, capable of maintaining high resistance of an element surface even by reflow soldering, being highly reliable, and capable of being easily produced, and a method of producing the same.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: November 2, 2004
    Assignee: TDK Corporation
    Inventors: Dai Matsuoka, Hidetaka Kitamura, Tadashi Ogasawara
  • Publication number: 20040182700
    Abstract: It is an object of the present invention to provide a silicon monoxide sinter having a uniform texture, good machinability, and splash resistance, which are all required of a silicon monoxide vapor deposition material, or a silicon monoxide sinter having a diameter of at least 100 mm and the shape required of a sputtering target material, and to obtain both of these sinters stably and with good productivity. A silicon monoxide sinter with a bulk density of at least 1.68 g/cm3 can be obtained by sintering under hot pressing conditions comprising a pressing pressure of at least 15 MPa and a temperature of 1200 to 1350° C., and by using a press die which comprises an inner die divided into a plurality of segments and integrated in an integrated outer die with a gap therebetween, and a cushioning material disposed in this gap, it is possible to obtain a silicon monoxide sinter whose diameter is at least 100 mm and whose bulk density is at least 2.
    Type: Application
    Filed: July 17, 2003
    Publication date: September 23, 2004
    Inventors: Yoshitake Natsume, Takashi Onishi, Tadashi Ogasawara, Munetoshi Watanabe, Toshiharu Iwase
  • Publication number: 20040169267
    Abstract: A chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, wherein when assuming a minimum distance from an outermost side of the internal electrode layer in the stacking direction to a surface of the element body is 1 and measuring an ion intensity ratio of Li and Zn, (Li/Zn), in a range from the surface of the element body to a depth of (0.9×1) by a secondary ion mass spectrometry (SIMS), 0.001≦(Li/Zn)≦500. According to the invention, it is possible to provide a chip shaped electronic device, such as a multilayer chip varistor, not requiring glass coating or other insulative protective layer, being tolerant of temperature changes, capable of maintaining high resistance of an element surface even by reflow soldering, being highly reliable, and capable of being easily produced, and a method of producing the same.
    Type: Application
    Filed: October 29, 2003
    Publication date: September 2, 2004
    Applicant: TDK CORPORATION
    Inventors: Dai Matsuoka, Hidetaka Kitamura, Tadashi Ogasawara
  • Publication number: 20040110059
    Abstract: Provided are a porous sintered compact suitable for a filter, a power feeder in a polymer electrolyte membrane type water electrolyzer, a current collector in a solid polymer fuel cell and in addition a liquid dispersion plate, especially an ink dispersion plate for an ink jet printer ink and the like. A titanium powder sintered compact made of a plate-like porous compact is obtained by sintering spherical powder made of titanium or a titanium alloy produced by means of a gas atomization method. A void ratio in the range of from 35 to 55% is realized by filling without applying a pressure and sintering without applying a pressure.
    Type: Application
    Filed: February 2, 2004
    Publication date: June 10, 2004
    Inventors: Takashi Onishi, Tadashi Ogasawara, Munetoshi Watanabe, Masamichi Kato
  • Publication number: 20030150377
    Abstract: A high-purity silicon monoxide vapor deposition material which, in the formation of a film by vapor deposition, is effective in inhibiting splashino, and which has an average bulk density of 2.0 g/cml and a Vickers hardness of 500 or hiolier; a process for producing a high-purity silicon monoxide vapor deposition mate-rial consisting of SiO and metal impurities as the remainder, the total amount of the impurities beinc, 50 ppm or smaller, which comprises conducting a degassinc, treatment in a raw-material chamber at a temperature lower than the sublimation temperature of silicon monoxide, raising the temperature to sublimate silicon monoxide, and depositing the silicon monoxide on a substrate in a deposition chamber.
    Type: Application
    Filed: April 4, 2003
    Publication date: August 14, 2003
    Inventors: Nobuhiro Arimoto, Kazuo Nishioka, Shingo Kizaki, Tadashi Ogasawara, Makoto Fujita
  • Patent number: 6346871
    Abstract: A laminate type varistor has at least one pair of first and second inner electrodes and a varistor layer. The at least one pair of first and second electrodes and the varistor layer are laminated. A first outer electrode and a second outer electrode electrically are connected to the first inner electrode and the second inner electrode, respectively. In the laminate type varistor, the first inner electrode and the first inner electrode are separated by a predetermined distance from the outer electrode so that the first inner electrode has no electrode surface facing to an electrode surface of the second inner electrode.
    Type: Grant
    Filed: December 18, 1998
    Date of Patent: February 12, 2002
    Assignee: TDK Corporation
    Inventors: Tadashi Ogasawara, Ryuichi Tanaka, Mikikazu Takehana
  • Patent number: 5994995
    Abstract: A laminated chip varistor has a varistor element including at least one varistor layer and at least two inner electrodes which are laminated alternatively, and outer most layers comprising the same material as the varistor layer; and terminal electrodes electrically connected to the inner electrodes each formed at each of the both edge portions of the varistor element; wherein a surface roughness (R) of the varistor element is in the range of 0.60 to 0.90 .mu.m.
    Type: Grant
    Filed: February 2, 1998
    Date of Patent: November 30, 1999
    Assignee: TDK Corporation
    Inventors: Tadashi Ogasawara, Kaneo Mori, Masaaki Taniguchi, Masahiko Konno, Dai Matsuoka
  • Patent number: 5635436
    Abstract: A voltage-dependent nonlinear resistor or varistor ceramic composition consists essentially of (1) an oxide of the formula: {Sr.sub.(1-x-y) Ba.sub.x Ca.sub.y }.sub.z TiO.sub.3 wherein 0.3<x.ltoreq.0.9, 0.1.ltoreq.y.ltoreq.0.5, x+y.ltoreq.1, and 0.84<z<1.16, (2) 0.001 to 5.000 mol % of at least one oxide of niobium, tantalum, tungsten, manganese or R wherein R is yttrium or lanthanide, (3) 0.001 to 5.000 mol % of SiO.sub.2, and (4) 0.001 to 5.000 mol % of MgO. When the varistor voltage is controlled by changing a re-oxidizing temperature without changing the composition, a satisfactory nonlinear index .alpha. is available over a wide range of varistor voltage. The dependency of varistor voltage on heat treating temperature is reduced.
    Type: Grant
    Filed: June 13, 1996
    Date of Patent: June 3, 1997
    Assignee: TDK Corporation
    Inventors: Masaru Fukuda, Tadashi Ogasawara, Toshio Marui, Dai Matsuoka
  • Patent number: 5544002
    Abstract: A high voltage capacitor is disclosed that comprises a grounding member (1), two through type capacitors (2 and 3), an insulating case (6) and insulating resin (71 and 72). The grounding member (1) has two raised portions (101 and 102) on which the through type capacitors (2 and 3) are secured. The insulating case (6) has two hollow cylindrical portions (61, 62) spaced apart by a distance D with their upper open ends joined to each other to form a recessed enclosure (63) in line with and following the inner diameter sections (611, 621) of the hollow cylindrical portions (61, 82) and their lower open ends fitted on the outer circumference of the raised portions (101, 102). The insulating resin (71 and 72) is provided around the through type capacitors (2 and 3) within the inner diameter sections (611, 621).
    Type: Grant
    Filed: February 24, 1994
    Date of Patent: August 6, 1996
    Assignee: TDK Corporation
    Inventors: Shouichi Iwaya, Masahiro Yahagi, Hitoshi Kudou, Shigeru Itou, Isao Fujiwara, Tadashi Ogasawara, Makoto Morita, Teruo Taguchi, Setuo Sasaki
  • Patent number: 5089094
    Abstract: In a process for the electrolytic production of magnesium by the molten salt electrolysis of magnesium chloride using a molten salt cell bath comprised mainly of one or more salts selected from alkali metal chlorides and alkaline earth metal chlorides, the molten salt bath is enriched with magnesium chloride by suspending a magnesium oxide and/or magnesium carbonate powder to form a molten suspension and passing a chlorine-containing gas through the molten suspension at a temperature of 600.degree.-900.degree. C. so as to react the suspended powder with chlorine to form magnesium chloride. The resulting molten salt enriched with magnesium chloride can be directly introduced into the cell for electrolysis, thereby eliminating moisture absorption by the highly hygroscopic magnesium chloride. A pure magnesium can be produced with a high yield and improved current efficiency.
    Type: Grant
    Filed: March 15, 1990
    Date of Patent: February 18, 1992
    Assignee: Osaka Titanium Company Limited
    Inventors: Tadashi Ogasawara, Yoshitake Natsume, Kenji Fujita
  • Patent number: 4709509
    Abstract: A numerically controlled grinding machine equipped with two registers in which data concerning the positions of the cylindrical and shoulder grinding surfaces of a grinding wheel is stored. A reference point is established on the wheel spindle stock. A reference member having two reference surfaces is disposed on the worktable. The machine further includes a manual pulse generator for moving the grinding wheel head and the worktable, detectors for detecting the distances traveled by the wheel head and the worktable, a data entry device, an arithmetic processing unit, and a memory.
    Type: Grant
    Filed: October 17, 1986
    Date of Patent: December 1, 1987
    Assignee: Toyoda Koki Kabushiki Kaisha
    Inventors: Takao Yoneda, Tadashi Ogasawara, Norio Ohta, Yasuji Sakakibara
  • Patent number: 4706415
    Abstract: An operator's panel for a numerical controller of a grinding machine comprises a main frame of a generally box shape, which is carried on a front portion of a bed of the grinding machine for pivotal movement about a horizontal axis. A manual pulse generator for supplying the numerical controller with pulse signals is mounted in the main frame, and a manual feed handle is secured to an input shaft of the pulse generator. A mechanism is further provided for locking the main frame at such an angular position as desired by an operator of the grinding machine.
    Type: Grant
    Filed: June 26, 1986
    Date of Patent: November 17, 1987
    Assignee: Toyoda Koki Kabushiki Kaisha
    Inventors: Hiroshi Okada, Toshio Tsujiuchi, Tadashi Ogasawara