Patents by Inventor Tadashi Yamaguchi

Tadashi Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145552
    Abstract: A first amorphous film containing hafnium, oxygen and a first element such as zirconium is formed, a plurality of grains containing a second element different from any of hafnium, oxygen and the first element are formed on the first amorphous film, a second amorphous film made of the same material as the first amorphous film is formed on the plurality of grains and on the first amorphous film, and a metal film is formed on the second amorphous film. Thereafter, by performing heat treatment, the first amorphous film is crystallized to form a first orthorhombic ferroelectric film and the second amorphous film is crystallized to form a second orthorhombic ferroelectric film.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Inventor: Tadashi YAMAGUCHI
  • Patent number: 11973119
    Abstract: A first amorphous film containing hafnium, oxygen and a first element such as zirconium is formed, a plurality of grains containing a second element different from any of hafnium, oxygen and the first element are formed on the first amorphous film, a second amorphous film made of the same material as the first amorphous film is formed on the plurality of grains and on the first amorphous film, and a metal film is formed on the second amorphous film. Thereafter, by performing heat treatment, the first amorphous film is crystallized to form a first orthorhombic ferroelectric film and the second amorphous film is crystallized to form a second orthorhombic ferroelectric film.
    Type: Grant
    Filed: April 5, 2021
    Date of Patent: April 30, 2024
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Tadashi Yamaguchi
  • Publication number: 20240120406
    Abstract: It is related to improving a performance of a semiconductor device and suppressing yield deterioration. Using a resist pattern as a mask, an ion-implantation is performed from an upper surface of a semiconductor substrate to form an ion-implanted layer in the semiconductor substrate. By subsequently, another ion-implantation is performed. Then, another ion-implanted layer is formed in the semiconductor substrate so as to overlap with the ion-implanted layer. Next, a heat treatment is performed on the semiconductor substrate to diffuse impurities contained in the ion-implanted layers, thereby an p-type floating region is formed.
    Type: Application
    Filed: August 15, 2023
    Publication date: April 11, 2024
    Inventors: Tadashi YAMAGUCHI, Yoshiki MARUYAMA
  • Patent number: 11953247
    Abstract: A recycle information management system includes a communication device and a management device. The communication device transmits recycle information acquired from a recycle system via a network. The recycle system includes at least a recycling device that removes at least oil from the collected refrigerant to recycle the refrigerant. The management device includes a storage unit that stores the recycle information in association with a recycle system ID usable to identify the recycle system.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: April 9, 2024
    Assignees: Daikin Industries, Ltd., DAIKIN EUROPE N.V.
    Inventors: Takahiro Yamaguchi, Tadashi Hirose, Suguru Seikoba, Yumi Yamaguchi
  • Publication number: 20230411320
    Abstract: A metal film, a manufacturing method of the metal film, semiconductor device, and a manufacturing method of semiconductor device are provided with high crack resistance (higher hardness) during wire bonding. The Metal film has first metal crystal grains, and the second metal crystal grains. Each of the first metal crystal grains has dislocations. Each of the second metal crystal grains has no dislocations. The number of the first metal crystal grains having the dislocations is larger than the number of the second metal crystal grains having no dislocations.
    Type: Application
    Filed: April 20, 2023
    Publication date: December 21, 2023
    Inventor: Tadashi YAMAGUCHI
  • Publication number: 20230353795
    Abstract: An information processing apparatus includes a storage management unit that stores negative content determined as negative scene contents among material content constituting a story of content to be automatically produced in a state of being distinguishable from other material content.
    Type: Application
    Filed: June 24, 2021
    Publication date: November 2, 2023
    Inventors: Yuta Nakao, Satoru Ishii, Seijiro Inaba, Tadashi Yamaguchi, Masashi Wakatsuki
  • Publication number: 20230345734
    Abstract: A ferroelectric memory cell includes a paraelectric film formed on a semiconductor substrate and a ferroelectric layer formed on the paraelectric film. The ferroelectric layer includes ferroelectric films and a plurality of grains. The ferroelectric films are made of a material containing a metal oxide and a first element. The plurality of grains are made of a material different from the material forming the ferroelectric films, and are made of a ferroelectric.
    Type: Application
    Filed: March 7, 2023
    Publication date: October 26, 2023
    Inventors: Kazuyuki OMORI, Tadashi YAMAGUCHI
  • Publication number: 20230260549
    Abstract: An information processing apparatus includes a story generation unit that, based on a plurality of material content recorded in an accessible state, selects material content constituting a story set in story setting processing, and performs automatic content production by editing processing using the selected material content.
    Type: Application
    Filed: June 24, 2021
    Publication date: August 17, 2023
    Inventors: YUTA NAKAO, SATORU ISHII, SEIJIRO INABA, TADASHI YAMAGUCHI, MASASHI WAKATSUKI
  • Publication number: 20230199299
    Abstract: The present technology relates to an imaging device, an imaging method and a program, each of which enables a user to appropriately give an instruction on a subject to be focused. The imaging device according to the present technology includes a signal processing unit configured to display information representing recognition results of a subject in an image obtained by shooting, and to display in a superimposed manner, in response to a user's voice input indicating a focus position, information representing the focus position estimated as the user's intention on the image. The present technology can be applied to an imaging device operable by a voice.
    Type: Application
    Filed: March 12, 2021
    Publication date: June 22, 2023
    Inventors: SATORU ISHII, TADASHI YAMAGUCHI
  • Publication number: 20230187550
    Abstract: A Semiconductor device includes a semiconductor substrate, an insulating film, a first conductive film, a ferroelectric film, an insulating layer, a first plug and a second plug. The semiconductor substrate includes a source region and a drain region which are formed on a main surface thereof. The insulating film is formed on the semiconductor substrate such that the insulating film is located between the source region and the drain region in a plan view. The first conductive film is formed on the insulating film. The ferroelectric film is formed on the first conductive film. The insulating layer covers the first conductive film and the ferroelectric film. The first plug reaches the first conductive film. The second plug reaches the ferroelectric film. A material of the ferroelectric film includes hafnium and oxygen. In plan view, a size of the ferroelectric film is smaller than a size of the insulating film.
    Type: Application
    Filed: February 1, 2023
    Publication date: June 15, 2023
    Inventor: Tadashi YAMAGUCHI
  • Patent number: 11672121
    Abstract: In a semiconductor device having MONOS memories configured by fin-type MISFETs, an increase in parasitic capacitance between wirings accompanying miniaturization of the semiconductor device is prevented, and the reliability of the semiconductor device is improved. In a memory cell array in which a plurality of MONOS type memory cells formed on fins are arranged, source regions formed on the plurality of fins arranged in a short direction of the fin are electrically connected to each other by one epitaxial layer straddling the fins.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: June 6, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Tadashi Yamaguchi
  • Patent number: 11664706
    Abstract: A rotary electric machine unit includes a rotary electric machine, where a protruding portion extending in an axial direction from a one end side cover portion toward the rotary electric machine is formed at a position below a rotation axis of the rotary electric machine and overlapping with the rotary electric machine. A refrigerant flow lower surface formed on a tip end side of the protruding portion and extending in the axial direction, and a recessed surface adjacent to a base side end portion of the refrigerant flow lower surface and extending in the axial direction at a position recessed upward than the refrigerant flow lower surface are formed below a center of the protruding portion in the upper-lower direction. The refrigerant flow lower surface of the protruding portion is arranged such that an axial central portion overlaps the rotary electric machine in the axial direction.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: May 30, 2023
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Tadashi Yamaguchi, Akio Tsumasaka
  • Publication number: 20230105851
    Abstract: There is provided a copper bonding wire that exhibits a favorable bondability even when a scrub at the time of bonding is reduced. The copper bonding wire is characterized in that when a sum of percentages of Cu, Cu2O, CuO and Cu(OH)2 on a surface of the wire as measured by X-ray Photoelectron Spectroscopy (XPS) is defined as 100%, Cu[II]/Cu[I] which is a ratio of a total percentage of CuO and Cu(OH)2 (Cu[II]) corresponding to bivalent Cu to a percentage of Cu2O (Cu[I]) corresponding to monovalent Cu falls within a range from 0.8 to 12.
    Type: Application
    Filed: February 19, 2021
    Publication date: April 6, 2023
    Inventors: Tomohiro UNO, Tetsuya OYAMADA, Daizo ODA, Kota SHIMOMURA, Tadashi YAMAGUCHI
  • Publication number: 20230099218
    Abstract: To provide an insulated wire that can increase in a partial discharge starting voltage, prevent deterioration of an insulator, and not cause worsening of an occupancy ratio, a coil that uses the insulated wire, a variable-thickness insulating tape used in manufacture of the insulated wire, and a manufacturing method of the same. The above-described problem is solved by an insulated wire (10) for a coil, comprising a conductor (1), and insulating coatings (2, 3) provided on an outer periphery of the conductor (1). The insulated wire (10) is constituted by the thick insulating coating (3) for an area where voltage increases and partial discharge readily occurs, and the thin insulating coating (2) for an area where the voltage does not increase and partial discharge does not readily occur, when the coil is wound. The thick insulating coating (3) and the thin insulating coating (2) are repeatedly provided at desired intervals.
    Type: Application
    Filed: December 24, 2020
    Publication date: March 30, 2023
    Applicant: TOTOKU ELECTRIC CO., LTD.
    Inventors: Tadashi YAMAGUCHI, Shigeo HAYASHI
  • Publication number: 20230093165
    Abstract: The present technology relates to an information processing apparatus, an information processing method, and a program capable of performing a voice operation by a natural expression. An information processing apparatus according to the present technology includes a command processing unit that, in a case where a voice command that is input by a user and instructs to control a device includes a predetermined word for which a degree of control is determined as ambiguous, executes processing matching the voice command by using a parameter matching a way of speaking of a user at a time when the voice command is input. The present technology is applicable to, for example, an imaging apparatus that can be operated by a voice.
    Type: Application
    Filed: March 9, 2021
    Publication date: March 23, 2023
    Inventors: TADASHI YAMAGUCHI, SATORU ISHII
  • Publication number: 20230066650
    Abstract: A performance of a memory cell including a ferroelectric film is improved. Reliability of the memory cell is ensured. A semiconductor device having a memory cell includes: a plurality of semiconductor layers configuring a channel region; a pair of semiconductor layers SI2 provided so as to sandwich the plurality of semiconductor layers SI1 in an X direction, connected to the plurality of semiconductor layers SI1, and configuring a source region and a drain region; a plurality of paraelectric films IL covering outer peripheries of the plurality of semiconductor layers SI1, respectively; a bottom electrode BE covering outer peripheries of the plurality of paraelectric films IL between the pair of semiconductor layers SI2; a ferroelectric film FE formed on the bottom electrode BE; and a top electrode TE formed on the ferroelectric film FE.
    Type: Application
    Filed: June 23, 2022
    Publication date: March 2, 2023
    Inventor: Tadashi YAMAGUCHI
  • Patent number: 11563020
    Abstract: A method for manufacturing a semiconductor device to provide a Metal Insulator Semiconductor Field Effect Transistor (MISFET) in a first region of a semiconductor substrate includes forming a first gate insulating film on the semiconductor substrate in the first region, forming a first gate electrode containing silicon on the first gate insulating film, forming first impurity regions inside the semiconductor substrate so as to sandwich the first gate electrode in the first region, the first impurity regions configuring a part of a first source region and a part of a first drain region, forming a first silicide layer on the first impurity region, forming a first insulating film on the semiconductor substrate so as to cover the first gate electrode and the first silicide layer, polishing the first insulating film so as to expose the first gate electrode, and forming a second silicide layer on the first gate electrode.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: January 24, 2023
    Assignee: Renesas Electronics Corporation
    Inventor: Tadashi Yamaguchi
  • Patent number: 11523047
    Abstract: Provided is an imaging device including: as assistant control unit that determines, on the basis of user's proficiency level information regarding imaging, an item presented to assist the imaging; and a presentation unit that presents item information, which is information regarding the item, to the user.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: December 6, 2022
    Assignee: Sony Group Corporation
    Inventors: Tadashi Yamaguchi, Seijiro Inaba, Satoru Ishii
  • Patent number: 11476339
    Abstract: To allow a metal oxide film composed mainly of O and at least one of Hf and Zr to exhibit ferroelectric properties. After deposition of a hafnium oxide film on a semiconductor substrate via an insulating film, the semiconductor substrate is exposed to microwaves to selectively heat the hafnium oxide film. This makes it possible to form a larger number of orthorhombic crystals in the crystals of the hafnium oxide film. The hafnium oxide film thus obtained can therefore exhibit ferroelectric properties without adding, thereto, an impurity such as Si. This means that the hafnium oxide film having a reverse size effect can be used as a ferroelectric film of a ferroelectric memory cell and contributes to the manufacture of a miniaturized ferroelectric memory cell.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: October 18, 2022
    Assignee: Renesas Electronics Corporation
    Inventor: Tadashi Yamaguchi
  • Publication number: 20220157832
    Abstract: A semiconductor device includes a semiconductor substrate, an insulating film, a ferroelectric film, a first seed layer and a control gate electrode. The semiconductor substrate includes a source region and a drain region which are formed on a main surface of the semiconductor substrate. The insulating film is formed on the main surface of the semiconductor substrate such that the insulating film is positioned between the source region and the drain region in a plan view. The ferroelectric film is formed on the insulating film and includes hafnium and oxygen. The first seed layer is formed on the ferroelectric film. The control gate electrode is formed on the ferroelectric film. A material of the first seed layer includes at least one material of the ferroelectric film and at least one material of the first conductive film.
    Type: Application
    Filed: November 13, 2020
    Publication date: May 19, 2022
    Inventor: Tadashi YAMAGUCHI