Patents by Inventor Tadashi Yamaguchi

Tadashi Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10603720
    Abstract: A bonded diamond body having a high bonded strength is provided. The bonded diamond body includes a sintered polycrystalline diamond body, a hard substrate, and a hard layer provided between the sintered polycrystalline diamond body and the hard substrate, the sintered polycrystalline diamond body containing a diamond grain and a sintering aid, the hard substrate containing tungsten carbide and cobalt, and the hard layer containing cobalt and a hard grain made of a carbide, a nitride, or a carbonitride having a Vickers hardness of 1100 Hv or more.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: March 31, 2020
    Assignees: Sumitomo Electric Hardmetal Corp., Sumitomo Electric Industries, Ltd.
    Inventors: Taisuke Higashi, Tadashi Yamaguchi, Shinichiro Yurugi, Mari Sogabe
  • Publication number: 20190355584
    Abstract: A first amorphous film containing hafnium, oxygen and a first element such as zirconium is formed, a plurality of grains containing a second element different from any of hafnium, oxygen and the first element are formed on the first amorphous film, a second amorphous film made of the same material as the first amorphous film is formed on the plurality of grains and on the first amorphous film, and a metal film is formed on the second amorphous film. Thereafter, by performing heat treatment, the first amorphous film is crystallized to form a first orthorhombic ferroelectric film and the second amorphous film is crystallized to form a second orthorhombic ferroelectric film.
    Type: Application
    Filed: May 10, 2019
    Publication date: November 21, 2019
    Inventor: Tadashi YAMAGUCHI
  • Publication number: 20190341395
    Abstract: A method for manufacturing a semiconductor device to provide a Metal Insulator Semiconductor Field Effect Transistor (MISFET) in a first region of a semiconductor substrate includes forming a first gate insulating film on the semiconductor substrate in the first region, forming a first gate electrode containing silicon on the first gate insulating film, forming first impurity regions inside the semiconductor substrate so as to sandwich the first gate electrode in the first region, the first impurity regions configuring a part of a first source region and a part of a first drain region, forming a first silicide layer on the first impurity region, forming a first insulating film on the semiconductor substrate so as to cover the first gate electrode and the first silicide layer, polishing the first insulating film so as to expose the first gate electrode, and forming a second silicide layer on the first gate electrode.
    Type: Application
    Filed: July 18, 2019
    Publication date: November 7, 2019
    Inventor: Tadashi YAMAGUCHI
  • Publication number: 20190280549
    Abstract: A rotary electric machine includes a stator. A plurality of slots are formed in a stator core of the stator, and a coil and an insulating sheet layer are inserted into the slots. A first coil side surface and a second coil side surface of the coil inserted into the slots serve as adhesive regions, which are adhered to a slot inner circumferential surface via the insulating sheet layer. In addition, a first coil end surface and a second coil end surface of the coil inserted into the slots serve as non-adhesive regions, which are maintained in a non-contact manner with respect to the slot inner circumferential surface.
    Type: Application
    Filed: February 27, 2019
    Publication date: September 12, 2019
    Inventors: Masashi Inoue, Tadashi Yamaguchi
  • Publication number: 20190259138
    Abstract: In a case where it is determined by a reliability determination section 501 that retention aberration information of an in-apparatus aberration information retention section 31 is unreliable, a control section 50 sets detection aberration information generated by performing aberration detection processing by a lens aberration detection processing section 32 as application aberration information for correcting an aberration of a captured image. In a case where it is determined that the retention aberration information is reliable, the control section 50 sets the retention aberration information as the application aberration information. Aberration information can be generated if necessary.
    Type: Application
    Filed: June 13, 2017
    Publication date: August 22, 2019
    Applicant: Sony Corporation
    Inventors: Masafumi WAKAZONO, Yoshimi TSUBOI, Tadashi YAMAGUCHI, Haruka ASAI, Kazumi FUKUDA
  • Publication number: 20190207009
    Abstract: In a ferroelectric memory having a ferroelectric film between a gate electrode and a semiconductor substrate, dielectric breakdown of a gate insulating film is prevented and the polarization performance of the ferroelectric film is enhanced to improve the performance of a semiconductor device. In a memory cell including a field effect transistor including a control gate electrode formed over the semiconductor substrate, between the control gate electrode and a main surface of the semiconductor substrate, a paraelectric film and the ferroelectric film are formed by being stacked in this order over the main surface of the semiconductor substrate.
    Type: Application
    Filed: November 16, 2018
    Publication date: July 4, 2019
    Inventor: Tadashi YAMAGUCHI
  • Publication number: 20190191102
    Abstract: A status change estimating unit 501 estimates a change in lens status of an interchangeable lens 21. A warning control unit 502 determines whether user setting lens status set by a user for the interchangeable lens 21 through a user interface unit 41 or a communication unit 43 and interchangeable lens status are the same. In a case where the warning control unit 502 determines that the user setting lens status and the interchangeable lens status are different from each other, the warning control unit 502 outputs warning information to a warning unit 42 to warn the user. This configuration enables the user to recognize a difference between the user setting lens status and the interchangeable lens status by the warning issued by the warning unit 42.
    Type: Application
    Filed: May 1, 2017
    Publication date: June 20, 2019
    Applicant: Sony Corporation
    Inventors: Yoshimi TSUBOI, Tadashi YAMAGUCHI, Haruka ASAI
  • Publication number: 20190149005
    Abstract: A stator of a rotating electric machine includes a stator core provided with a plurality of slots along a circumferential direction, coils of a plurality of phases distributedly wound around the stator core via the plurality of slots, and an insulating paper disposed between the slot and the coil. The insulating paper has an adhesive portion which fixes the coil to the stator core and a part of the coil of each phase is fixed to the stator core by the adhesive portion.
    Type: Application
    Filed: November 7, 2018
    Publication date: May 16, 2019
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Tadashi YAMAGUCHI, Ryutaro KATO, Tomohiro KOTA, Yusuke KAWANO, Takashi SUGAWARA, Kazuyuki OHTA, Tadamichi SASAKI, Taisuke MARUYAMA
  • Publication number: 20190109505
    Abstract: There is provided an insulation paper to be disposed between a slot formed in a stator core and a coil inserted into the slot. A crease is provided in advance at a folding position where the insulation paper is to be folded when disposed in the slot. The crease is provided in an area of the insulation paper excluding both end portions thereof.
    Type: Application
    Filed: October 2, 2018
    Publication date: April 11, 2019
    Applicant: HONDA MOTOR CO., LTD.
    Inventor: Tadashi YAMAGUCHI
  • Publication number: 20190109506
    Abstract: There is provided a stator of a rotary electric machine which includes a stator core including a plurality of slots in a circumferential direction thereof, a coil inserted into each of the slots, and an insulation paper disposed between each of the slots and the coil. The insulation paper includes a first adhesive layer provided on one surface of the insulation paper and a second adhesive layer provided on the other surface of the insulation paper. The first adhesive layer and the second adhesive layer are disposed to be displaced from each other when the insulation paper located on one side in the circumferential direction is viewed from the coil inserted into the slot.
    Type: Application
    Filed: October 2, 2018
    Publication date: April 11, 2019
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Tadashi YAMAGUCHI, Ryutaro KATO, Tomohiro KOTA, Yusuke KAWANO, Takashi SUGAWARA, Kazuyuki OHTA, Taisuke MARUYAMA, Tadamichi SASAKI
  • Publication number: 20190081058
    Abstract: A memory gate electrode and a control gate electrode are formed to cover a fin projecting from the upper surface of a semiconductor substrate. A part of the fin which is covered by the memory gate electrode and the control gate electrode is sandwiched by a silicide layer as a part of a source region and a drain region of a memory cell. This silicide layer is formed as a silicide layer.
    Type: Application
    Filed: August 21, 2018
    Publication date: March 14, 2019
    Inventor: Tadashi YAMAGUCHI
  • Patent number: 10229925
    Abstract: A method of manufacturing a semiconductor device, includes forming a fin structure on a main surface of semiconductor substrate, the fin structure including a silicon material; forming a first gate electrode over the fin structure via a first insulating film, and forming a second gate electrode over the fin structure via a second insulating film having a charge accumulating part, such that the second gate electrode is disposed along a sidewall of the first gate electrode in a plan view; forming source and drain regions over a surface of the fin structure at both sides of a structure defined by the first and second gate electrodes; performing a first heat treatment to the semiconductor substrate to keep the semiconductor substrate at a first predetermined temperature; and forming a first metal film on the fin structure by sputtering in condition that the semiconductor substrate is at the first predetermined temperature.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: March 12, 2019
    Assignee: Renesas Electronics Corporation
    Inventor: Tadashi Yamaguchi
  • Patent number: 10186518
    Abstract: Performance and reliability of a semiconductor device are improved. An insulating film is formed such that a control gate electrode, a memory gate electrode, and a gate electrode are embedded, and then tops of the control gate electrode, the memory gate electrode, and the gate electrode are exposed by first polishing. Subsequently, a trench is formed by removing the gate electrode and filled with a metal film, and second polishing is performed to form a gate electrode including the metal film. The insulating film is an O3-TEOS film having a high gap filling characteristic, and thus reduces formation of a seam in the insulating film. Furthermore, the O3-TEOS film is subjected to heat treatment in an oxidizing atmosphere before the first polishing, thereby dishing of the insulating film is reduced during the second polishing.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: January 22, 2019
    Assignee: Renesas Electronics Corporation
    Inventor: Tadashi Yamaguchi
  • Publication number: 20180337055
    Abstract: To allow a metal oxide film composed mainly of O and at least one of Hf and Zr to exhibit ferroelectric properties. After deposition of a hafnium oxide film on a semiconductor substrate via an insulating film, the semiconductor substrate is exposed to microwaves to selectively heat the hafnium oxide film. This makes it possible to form a larger number of orthorhombic crystals in the crystals of the hafnium oxide film. The hafnium oxide film thus obtained can therefore exhibit ferroelectric properties without adding, thereto, an impurity such as Si. This means that the hafnium oxide film having a reverse size effect can be used as a ferroelectric film of a ferroelectric memory cell and contributes to the manufacture of a miniaturized ferroelectric memory cell.
    Type: Application
    Filed: March 1, 2018
    Publication date: November 22, 2018
    Inventor: Tadashi YAMAGUCHI
  • Patent number: 10121895
    Abstract: A semiconductor device having a memory cell includes: a first gate electrode formed on a semiconductor substrate via a first insulating film; a second gate electrode formed on the semiconductor substrate via the second insulating film having a charge storage portion inside so as to be adjacent to the first gate electrode; a third insulating film interposed between the first gate electrode and the second gate electrode; a first source/drain region formed on a main surface of the semiconductor substrate; a first silicide layer formed in contact with an upper surface of the first source/drain region; a second silicide layer formed in contact with an upper surface of the first gate electrode; and a third silicide layer formed in contact with an upper surface of the second gate electrode. The first to third silicide layers contain platinum.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: November 6, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Tadashi Yamaguchi
  • Patent number: 10096510
    Abstract: To provide a semiconductor device having improved performance. The semiconductor device has a first insulating film formed on the main surface of a semiconductor substrate and a second insulating film formed on the first insulating film. The semiconductor device further has a first opening portion penetrating through the second insulating film and reaching the first insulating film, a second opening portion penetrating through the first insulating film and reaching the semiconductor substrate, and a trench portion formed in the semiconductor substrate. A first opening width of the first opening portion and a second opening width of the second opening portion are greater than a trench width of the trench portion. The trench portion is closed by a third insulating film while leaving a space in the trench portion.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: October 9, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Tadashi Yamaguchi
  • Patent number: 10075687
    Abstract: The present technology relates to an imaging apparatus, an imaging method, and a program that are capable of obtaining a higher-quality luminance image. The imaging apparatus captures a luminance image with a monochrome image sensor and also captures a color image with a color image sensor. A magnification aberration amount determination unit analyzes the amount of magnification chromatic aberration of each image height position on the basis of information on magnification chromatic aberration of a lens unit. A recording image selection unit selects the luminance image captured with the monochrome image sensor or a luminance image obtained from the color image captured with the color image sensor on the basis of the result of the analysis on the amount of magnification chromatic aberration, and sets the selected luminance image as a recording image.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: September 11, 2018
    Assignee: SONY CORPORATION
    Inventor: Tadashi Yamaguchi
  • Patent number: D872780
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: January 14, 2020
    Assignee: Sumitomo Electric Hardmetal Corp.
    Inventors: Takeshi Sato, Tadashi Yamaguchi, Shinichiro Yurugi
  • Patent number: D879846
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: March 31, 2020
    Assignee: Sumitomo Electric Hardmetal Corp.
    Inventors: Takeshi Sato, Tadashi Yamaguchi, Shinichiro Yurugi
  • Patent number: D879847
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: March 31, 2020
    Assignee: Sumitomo Electric Hardmetal Corp.
    Inventors: Takeshi Sato, Tadashi Yamaguchi, Shinichiro Yurugi