Abstract: A semiconductor device having a memory cell includes: a first gate electrode formed on a semiconductor substrate via a first insulating film; a second gate electrode formed on the semiconductor substrate via the second insulating film having a charge storage portion inside so as to be adjacent to the first gate electrode; a third insulating film interposed between the first gate electrode and the second gate electrode; a first source/drain region formed on a main surface of the semiconductor substrate; a first silicide layer formed in contact with an upper surface of the first source/drain region; a second silicide layer formed in contact with an upper surface of the first gate electrode; and a third silicide layer formed in contact with an upper surface of the second gate electrode. The first to third silicide layers contain platinum.

Abstract: To provide a semiconductor device having improved performance. The semiconductor device has a first insulating film formed on the main surface of a semiconductor substrate and a second insulating film formed on the first insulating film. The semiconductor device further has a first opening portion penetrating through the second insulating film and reaching the first insulating film, a second opening portion penetrating through the first insulating film and reaching the semiconductor substrate, and a trench portion formed in the semiconductor substrate. A first opening width of the first opening portion and a second opening width of the second opening portion are greater than a trench width of the trench portion. The trench portion is closed by a third insulating film while leaving a space in the trench portion.

Abstract: A silicide layer on a gate electrode of a MONOS memory is prevented from being disconnected, and a property of a MISFET is improved. As means for that, when a memory cell and a MISFET formed by so-called gate-last process are mixedly mounted, a silicide layer on a source/drain region is formed by a salicide process with relatively high temperature heat treatment, and then, a silicide layer is formed on each of the control gate electrode and the memory gate electrode of the memory cell by a salicide process with relatively low temperature heat treatment.

Abstract: The pixel characteristics are prevented from being degraded due to diffusion of electrons and Fe (iron) from the surface of an element isolation trench formed in the top surface of a semiconductor substrate into a photodiode forming the pixel of an image sensing element. Further, oxygen is prevented from being diffused from a boron oxide film formed at the surface of the element isolation trench into the photodiode. In the top surface of the semiconductor substrate, a trench for embedding an element isolation region surrounding a photodiode-forming region is formed. Then, B (boron) is doped into the surface of the trench to form a semiconductor layer. Subsequently, the boron oxide film resulting from the reaction between the boron deposited at the surface and oxygen is removed by APM washing. Then, a heat treatment is performed to diffuse the boron in the semiconductor layer.

Abstract: A method of manufacturing a semiconductor device, includes forming a fin structure on a main surface of semiconductor substrate, the fin structure including a silicon material; forming a first gate electrode over the fin structure via a first insulating film, and forming a second gate electrode over the fin structure via a second insulating film having a charge accumulating part, such that the second gate electrode is disposed along a sidewall of the first gate electrode in a plan view; forming source and drain regions over a surface of the fin structure at both sides of a structure defined by the first and second gate electrodes; performing a first heat treatment to the semiconductor substrate to keep the semiconductor substrate at a first predetermined temperature; and forming a first metal film on the fin structure by sputtering in condition that the semiconductor substrate is at the first predetermined temperature.

Abstract: To provide a semiconductor device having improved performance. The semiconductor device has a first insulating film formed on the main surface of a semiconductor substrate and a second insulating film formed on the first insulating film. The semiconductor device further has a first opening portion penetrating through the second insulating film and reaching the first insulating film, a second opening portion penetrating through the first insulating film and reaching the semiconductor substrate, and a trench portion formed in the semiconductor substrate. A first opening width of the first opening portion and a second opening width of the second opening portion are greater than a trench width of the trench portion. The trench portion is closed by a third insulating film while leaving a space in the trench portion.

Abstract: Provided is a stator for a rotary electric machine capable of fixing a stator core and a coil while preventing internal contamination of the rotary electric machine. A stator (5) for a rotary electric machine includes a stator core (11) having teeth (21) and slots (23) alternately in a circumferential direction, a coil (13) mounted on the stator core (11), and an insulating layer (35) and a foamed adhesive layer (37) disposed between an inner circumferential surface of the slot (23) and the coil (13). The foamed adhesive layer (37) is disposed such that an end portion of at least one side thereof in an axial direction of the stator core (11) is disposed further inside than an end surface (11a) of a side of the stator core (11) in the axial direction.

Abstract: The present invention makes it possible to improve the performance of a semiconductor device. After anisotropic etching is applied to an insulating film covering a gate electrode of a transfer transistor and a sidewall spacer is formed over the sidewall of the gate electrode, a damaged layer formed in the interior of a semiconductor substrate by the anisotropic etching is removed by oxidizing the surface of the semiconductor substrate, forming a sacrificial oxide film, and removing the sacrificial oxide film.

Abstract: The performances of a semiconductor device are improved. A method for manufacturing a semiconductor device includes the steps of: providing a semiconductor substrate having a gettering layer formed by ion implanting a cluster, and an epitaxial layer; subjecting the semiconductor substrate to a heat treatment at 800° C. or more, and thereby forming a hydrogen adsorption site; forming an element isolation film at the semiconductor substrate, to be performed thereafter; implanting an impurity for forming a first semiconductor region in the semiconductor substrate; implanting an impurity for forming a second semiconductor region; and performing a heat treatment for a photodiode, to be performed thereafter.

Abstract: A rotor core has a rotational axis. A permanent magnet has a polygonal shape viewed along the rotational axis. The rotor core includes a magnet insertion hole defined by an inner wall. The polygonal shape includes first to third sides. The magnet insertion hole includes: a first space provided between the first side and the inner wall; a second space provided between the second side and the inner wall; and an injection portion, a first communication portion, and a second communication portion provided between the third side and the inner wall; viewed along the rotational axis. The first communication portion and the second communication portion connect the injection portion to the first space and the second space, respectively. The first communication portion has a first length along the third side. The second communication portion has a second length along the third side which is equal to the first length.

Abstract: Performance and reliability of a semiconductor device are improved. An insulating film is formed such that a control gate electrode, a memory gate electrode, and a gate electrode are embedded, and then tops of the control gate electrode, the memory gate electrode, and the gate electrode are exposed by first polishing. Subsequently, a trench is formed by removing the gate electrode and filled with a metal film, and second polishing is performed to form a gate electrode including the metal film. The insulating film is an O3-TEOS film having a high gap filling characteristic, and thus reduces formation of a seam in the insulating film. Furthermore, the O3-TEOS film is subjected to heat treatment in an oxidizing atmosphere before the first polishing, thereby dishing of the insulating film is reduced during the second polishing.

Abstract: Resistance of a FINFET is reduced while performance of an element is prevented from being deteriorated due to an increase in stress, thereby performance of a semiconductor device is improved. When a memory cell formed on an upper side of a first fin and an n transistor formed on an upper side of a second fin are mounted on the same semiconductor substrate, the surface of the first fin having a source/drain region of the memory cell is covered with a silicide layer, and part of a source/drain region of the n transistor is formed of an epitaxial layer covering the surface of the second fin.

Abstract: Resistance of a FINFET is reduced while performance of an element is prevented from being deteriorated due to an increase in stress, thereby performance of a semiconductor device is improved. When a memory cell formed on an upper side of a first fin and an n transistor formed on an upper side of a second fin are mounted on the same semiconductor substrate, the surface of the first fin having a source/drain region of the memory cell is covered with a silicide layer, and part of a source/drain region of the n transistor is formed of an epitaxial layer covering the surface of the second fin.

Abstract: Object is to prevent deterioration in pixel characteristics due to dark-time white spot defects in a pixel. Generation of these dark-time white spot defects is attributable to diffusion of electrons and Fe (iron) from the vicinity of an interface between a semiconductor substrate and an element isolation region obtained by filling a trench formed in the upper surface of the semiconductor substrate with an insulating film. A semiconductor layer is formed by forming, in the upper surface of a semiconductor substrate, a trench for filling it with an element isolation region surrounding a photodiode formation region; and carrying out plasma doping to introduce B (boron) into the side wall and bottom surface of the trench.

Abstract: The performances of a semiconductor device are improved. A method for manufacturing a semiconductor device includes the steps of: providing a semiconductor substrate having a gettering layer formed by ion implanting a cluster, and an epitaxial layer; subjecting the semiconductor substrate to a heat treatment at 800° C. or more, and thereby forming a hydrogen adsorption site; forming an element isolation film at the semiconductor substrate, to be performed thereafter; implanting an impurity for forming a first semiconductor region in the semiconductor substrate; implanting an impurity for forming a second semiconductor region; and performing a heat treatment for a photodiode, to be performed thereafter.

Abstract: A rotor includes a rotor core, a plurality of permanent magnets, and a rotating shaft. The rotor core includes a through-hole, an inner circumference-side rotor core, an outer circumference-side rotor core, an annular portion, a plurality of inner circumference-side ribs, and a plurality of outer circumference-side ribs. The through-hole is provided on a first inner circumference side of magnet insertion holes. The inner circumference-side rotor core is located on a second inner circumference side of the through-hole. The outer circumference-side rotor core is located on an outer circumference side of the through-hole. The annular portion has a substantially annular shape, and is being provided inside the through-hole. The plurality of inner circumference-side ribs connect the inner circumference-side rotor core and the annular portion and are provided at predetermined intervals in a circumferential direction.

Abstract: An MISFET has a gate electrode formed on a semiconductor substrate via a gate insulating film, and a source region and a drain region formed inside the semiconductor substrate so as to sandwich the gate electrode. And, a first silicide layer is formed on surfaces of the source region and the drain region, and a second silicide layer is formed on a surface of the gate electrode. Each of the first silicide layer and the second silicide layer is made of a first metal and silicon, and further contains a second metal different from the first metal. And, a concentration of the second metal inside the second silicide layer is lower than a concentration of the second metal inside the first silicide layer.

Abstract: A silicide layer on a gate electrode of a MONOS memory is prevented from being disconnected, and a property of a MISFET is improved. As means for that, when a memory cell and a MISFET formed by so-called gate-last process are mixedly mounted, a silicide layer on a source/drain region is formed by a salicide process with relatively high temperature heat treatment, and then, a silicide layer is formed on each of the control gate electrode and the memory gate electrode of the memory cell by a salicide process with relatively low temperature heat treatment.

Abstract: When upper surfaces of a control gate electrode and a memory gate electrode are exposed from an interlayer insulating film by polishing the interlayer insulating film in a gate last process, a silicide layer covering the upper surfaces of the gate electrodes is formed. Thereafter, by reacting a metal film deposited on the silicide layer with the control gate electrode and the memory gate electrode, a silicide layer thicker than the former silicide layer is formed on each of the gate electrodes.

Abstract: The present technology relates to an imaging apparatus, an imaging method, and a program that are capable of obtaining a higher-quality luminance image. The imaging apparatus captures a luminance image with a monochrome image sensor and also captures a color image with a color image sensor. A magnification aberration amount determination unit analyzes the amount of magnification chromatic aberration of each image height position on the basis of information on magnification chromatic aberration of a lens unit. A recording image selection unit selects the luminance image captured with the monochrome image sensor or a luminance image obtained from the color image captured with the color image sensor on the basis of the result of the analysis on the amount of magnification chromatic aberration, and sets the selected luminance image as a recording image.