Abstract: A threshold control layer of a second MIS transistor is formed under the same conditions for forming a threshold control layer of a first MIS transistor. LLD regions of the second MIS transistor are formed under the same conditions for forming LDD regions of a third transistor.

Abstract: Sidewalls are formed on side surfaces of fin-shaped active regions, and then substrate regions surrounded by a device isolation groove are formed, where the widths of each substrate region in a channel length direction and in a channel width direction are respectively larger than those of the active region. Next, the sidewalls are removed, the device isolation groove and regions between the active regions are filled with an insulator film, and the insulator film is etched such that upper surfaces of the substrate regions are exposed. Next, an impurity is implanted in an upper portion of the substrate regions to form a punch through stopper diffusion layer, thereby forming fin transistors.

Abstract: A semiconductor device includes a capacitor formed by successively stacking a lower electrode, a capacitor dielectric film and an upper electrode on a substrate. The lower electrode includes a first conducting layer and a second conducting layer formed on the first conducting layer and having higher resistivity than the first conducting layer, and the capacitor dielectric film is formed so as to be in contact with the second conducting layer of the lower electrode.

Abstract: A semiconductor device includes a MIS transistor formed in a FET formation region of a semiconductor substrate, a silicon dioxide film formed in a trench provided in the semiconductor substrate to define the FET formation region, a gate insulating film formed over the FET formation region and the silicon dioxide film, and a gate electrode formed on the gate insulating film. The portion of the gate insulating film formed between the portion of the gate electrode located in the trench and the side surface of the semiconductor substrate contains aluminum, while the portion of the gate insulating film formed between the gate electrode and the upper surface of the semiconductor substrate does not contain aluminum.

Abstract: A semiconductor memory device has a first interlayer insulating film formed on a semiconductor substrate and having a capacitor opening portion provided in the film, and a capacitance element formed over the bottom and sides of the capacitor opening portion and composed of a lower electrode, a capacitance insulating film, and an upper electrode. A bit-line contact plug is formed through the first interlayer insulating film. At least parts of respective upper edges of the lower electrode, the capacitance insulating film, and the upper electrode at a side facing the bit-line contact plug are located below the surface of the first interlayer insulating film, the lower electrode, the capacitance insulating film, and the upper electrode being located over the sides of the capacitor opening portion. The upper electrode is formed over only the bottom and sides of the capacitor opening portion.

Abstract: A capacitor of a semiconductor memory of the present invention includes: a lower electrode which covers the surface of a storage node hole from the bottom to at least one of the sidewalls up to a level lower than the top surface of a second interlayer insulating film; a capacitive insulating film which covers the lower electrode; and an upper electrode which covers the capacitive insulating film.

Abstract: Fine metal particles each comprising a magnetic metal core particle and two or more coating layers, the outermost layer among the two or more coating layers containing an oxide of silicon and aluminum at an Al/Si atomic ratio of 0.01-0.2, and a method for producing fine metal particles comprising the steps of coating each primary particle comprising a magnetic metal core particle and a first coating layer with a mixture of silicon alkoxide and aluminum alkoxide, and then hydrolyzing the silicon alkoxide and the aluminum alkoxide, thereby forming a second coating layer comprising an oxide of silicon and aluminum at an Al/Si atomic ratio of 0.01-0.2.

Abstract: A semiconductor memory device includes: a transistor formed in a substrate; a capacitor formed above one of source/drain regions of the transistor; a bit line formed above the substrate and extending in the gate length direction of the transistor; a first conductive plug connecting one of the source/drain regions and the capacitor; a second conductive plug connected to the other source/drain region that is not connected to the first conductive plug; and a third conductive plug formed on the second conductive plug and connected to the bit line. The central axis of the third conductive plug is displaced from the central axis of the second conductive plug in the gate width direction of the transistor.

Abstract: A method for producing coated, fine metal particles comprising the steps of mixing powder comprising TiC and TiN with powder of an oxide of a metal M meeting the relation of ?GM-O>?GTiO2, wherein ?GM-O represents the standard free energy of formation of metal M oxide, and heat-treating the resultant mixed powder in a non-oxidizing atmosphere to reduce the oxide of the metal M with the powder comprising TiC and TiN, while coating the resultant metal M particles with Ti oxide, and coated, fine metal particles each comprising a metal core particle and a Ti oxide coating and having a carbon content of 0.2-1.4% by mass and a nitrogen content of 0.01-0.2% by mass.

Abstract: A threshold control layer of a second MIS transistor is formed under the same conditions for forming a threshold control layer of a first MIS transistor. LLD regions of the second MIS transistor are formed under the same conditions for forming LDD regions of a third transistor.

Abstract: A semiconductor device includes: a semiconductor substrate having an element formation region containing impurities of a first conductivity type; a gate electrode formed on the element formation region with a gate insulating film interposed therebetween; and a silicon alloy layer formed on a lateral side of the gate electrode in the element formation region, and containing impurities of a second conductivity type. A boundary layer containing impurities of the second conductivity type is formed between the silicon alloy layer and the element formation region.

Abstract: A carburizing apparatus that performs a vacuum carburizing treatment with respect to an object includes: a carburizing furnace that contains the object; a gas supply apparatus that supplies a carburizing gas to the carburizing furnace; a light emitting device that emits light by using an in-furnace gas inside of the carburizing furnace which is supplied with the carburizing gas; a light receiving device that receives light emitted from the light emitting device; and a processing device that calculates the composition of the in-furnace gas based on the light receiving result of the light receiving device.

Abstract: A threshold control layer of a second MIS transistor is formed under the same conditions for forming a threshold control layer of a first MIS transistor. LLD regions of the second MIS transistor are formed under the same conditions for forming LDD regions of a third transistor.

Abstract: After protective insulating films are formed on first to third active regions, the protective insulating films formed on the first and third active regions are removed. Subsequently, an insulating film to be a first gate insulating film is formed on each of the first and third active regions, and then, the protective insulating film formed on the second active region is removed. Next, an insulating film to be a second gate insulating film is formed on the second active region, and then, the insulating film to be the first gate insulating film formed on the third active region is removed. Finally, an insulating film to be a third gate insulating film is formed on the third active region.

Abstract: A distributed feedback semiconductor laser comprises a first cladding layer, a first optical guide layer, an active layer, a second optical guide layer, an InP semiconductor layer, an InGaAsP semiconductor layer, and a second cladding layer. The first optical guide layer is provided on the first cladding layer. The active layer is provided on the first optical guide layer. The second optical guide layer is provided on the active layer and made of AlGaInAs semiconductor. The InP semiconductor layer is provided on the second optical guide layer. The InGaAsP semiconductor layer is provided on the InP semiconductor layer. The second cladding layer is provided on the InGaAsP semiconductor layer and made of InP semiconductor. A diffraction grating for the distributed feedback semiconductor laser includes the InGaAsP semiconductor layer and the second cladding layer.

Abstract: A semiconductor memory device has a first interlayer insulating film formed on a semiconductor substrate and having a capacitor opening portion provided in the film, and a capacitance element formed over the bottom and sides of the capacitor opening portion and composed of a lower electrode, a capacitance insulating film, and an upper electrode. A bit-line contact plug is formed through the first interlayer insulating film. At least parts of respective upper edges of the lower electrode, the capacitance insulating film, and he upper electrode at a side facing the bit-line contact plug are located below the surface of the first interlayer insulating film, the lower electrode, the capacitance insulating film, and the upper electrode being located over the sides of the capacitor opening portion. The upper electrode is formed over only the bottom and sides of the capacitor opening portion.

Abstract: A semiconductor memory device includes: a transistor formed in a substrate; a capacitor formed above one of source/drain regions of the transistor; a bit line formed above the substrate and extending in the gate length direction of the transistor; a first conductive plug connecting one of the source/drain regions and the capacitor; a second conductive plug connected to the other source/drain region that is not connected to the first conductive plug; and a third conductive plug formed on the second conductive plug and connected to the bit line. The central axis of the third conductive plug is displaced from the central axis of the second conductive plug in the gate width direction of the transistor.

Abstract: A semiconductor device has a capacitor including a first lower electrode, a capacitor insulating film, and a first upper electrode which are successively formed above a substrate and a fuse element including a second lower electrode, a fuse insulating film, and a second upper electrode which are successively formed above a different region of the substrate from the region thereof on which the capacitor is formed. The first lower electrode is formed to have a depressed cross-sectional configuration. The second lower electrode has a columnar configuration and is made of the same conductive material as the first lower electrode.

Abstract: After protective insulating films are formed on first to third active regions, the protective insulating films formed on the first and third active regions are removed. Subsequently, an insulating film to be a first gate insulating film is formed on each of the first and third active regions, and then, the protective insulating film formed on the second active region is removed. Next, an insulating film to be a second gate insulating film is formed on the second active region, and then, the insulating film to be the first gate insulating film formed on the third active region is removed. Finally, an insulating film to be a third gate insulating film is formed on the third active region.

Abstract: A distributed feedback semiconductor laser comprises a first cladding layer, a first optical guide layer, an active layer, a second optical guide layer, an InP semiconductor layer, an InGaAsP semiconductor layer, and a second cladding layer. The first optical guide layer is provided on the first cladding layer. The active layer is provided on the first optical guide layer. The second optical guide layer is provided on the active layer and made of AlGaInAs semiconductor. The InP semiconductor layer is provided on the second optical guide layer. The InGaAsP semiconductor layer is provided on the InP semiconductor layer. The second cladding layer is provided on the InGaAsP semiconductor layer and made of InP semiconductor. A diffraction grating for the distributed feedback semiconductor laser includes the InGaAsP semiconductor layer and the second cladding layer.