Patents by Inventor Takashi Totsuka

Takashi Totsuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7296754
    Abstract: An IC card module includes first external connecting terminals and second external connecting terminals both exposed to one surface of a card substrate, a microcomputer connected to the first external connecting terminals, a memory controller connected to the second external connecting terminals, and a volatile memory connected to the memory controller. The shape of the card substrate and the layout of the first external connecting terminals are based on a standard of plug-in UICC of ETSI TS 102 221 V4.4.0 (2001-10). The second external connecting terminals are disposed outside the minimum range of the terminal layout based on the standard for the first external connecting terminals. The first and second external connecting terminals include signal terminals electrically separated from one another.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: November 20, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Hirotaka Nishizawa, Takashi Totsuka, Kenji Osawa, Junichiro Osako, Tamaki Wada, Michiaki Sugiyama
  • Patent number: 7291903
    Abstract: This invention is to provide an ultra-miniaturized, thin-sized memory card provided with a mechanism for preventing a wrong insertion to a memory card slot. A multi-function memory card is composed of a card body and a cap for housing the card body. The card body is made of mold resin that encapsulates plural semiconductor chips mounted on a main surface of a wiring substrate. The card body is housed into the cap with the back face of the wiring substrate facing outward. Guide channels are provided at both side faces of the cap for preventing that the card is inserted upside down. Further, a convex section is provided at the trailing edge of the cap for preventing that the card is inserted in the wrong direction.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: November 6, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Hirotaka Nishizawa, Kenji Osawa, Junichiro Osako, Tamaki Wada, Michiaki Sugiyama, Takashi Totsuka
  • Patent number: 7267287
    Abstract: An IC card capable of reinforcing the prevention of the electrostatic damage without causing a rise in the cost of a semiconductor integrated circuit chip. The semiconductor integrated circuit chip (2) is mounted on a card substrate (1), and plural connection terminals (3) are exposed. The connection terminals are connected to predetermined external terminals (4) of the semiconductor integrated circuit chip, first overvoltage protection elements (7, 8, 9) connected to the external terminals are integrated in the semiconductor integrated circuit chip, and second overvoltage protection elements such as surface-mount type varistors (11) connected to the connection terminals are mounted on the card substrate. The varistors are variable resistor elements having a current tolerating ability greater than that of the first overvoltage protection elements.
    Type: Grant
    Filed: January 2, 2007
    Date of Patent: September 11, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Hirotaka Nishizawa, Yosuke Yukawa, Takashi Totsuka
  • Patent number: 7224052
    Abstract: An IC card capable of reinforcing the prevention of the electrostatic damage without causing a rise in the cost of a semiconductor integrated circuit chip. The semiconductor integrated circuit chip (2) is mounted on a card substrate (1), and plural connection terminals (3) are exposed. The connection terminals are connected to predetermined external terminals (4) of the semiconductor integrated circuit chip, first overvoltage protection elements (7, 8, 9) connected to the external terminals are integrated in the semiconductor integrated circuit chip, and second overvoltage protection elements such as surface-mount type varistors (11) connected to the connection terminals are mounted on the card substrate. The varistors are variable resistor elements having a current tolerating ability greater than that of the first overvoltage protection elements.
    Type: Grant
    Filed: April 8, 2003
    Date of Patent: May 29, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Hirotaka Nishizawa, Yosuke Yukawa, Takashi Totsuka
  • Publication number: 20070102530
    Abstract: An IC card capable of reinforcing the prevention of the electrostatic damage without causing a rise in the cost of a semiconductor integrated circuit chip. The semiconductor integrated circuit chip (2) is mounted on a card substrate (1), and plural connection terminals (3) are exposed. The connection terminals are connected to predetermined external terminals (4) of the semiconductor integrated circuit chip, first overvoltage protection elements (7, 8, 9) connected to the external terminals are integrated in the semiconductor integrated circuit chip, and second overvoltage protection elements such as surface-mount type varistors (11) connected to the connection terminals are mounted on the card substrate. The varistors are variable resistor elements having a current tolerating ability greater than that of the first overvoltage protection elements.
    Type: Application
    Filed: January 2, 2007
    Publication date: May 10, 2007
    Inventors: Hirotaka NISHIZAWA, Yosuke Yukawa, Takashi Totsuka
  • Publication number: 20070102798
    Abstract: An IC card capable of reinforcing the prevention of the electrostatic damage without causing a rise in the cost of a semiconductor integrated circuit chip. The semiconductor integrated circuit chip (2) is mounted on a card substrate (1), and plural connection terminals (3) are exposed. The connection terminals are connected to predetermined external terminals (4) of the semiconductor integrated circuit chip, first overvoltage protection elements (7, 8, 9) connected to the external terminals are integrated in the semiconductor integrated circuit chip, and second overvoltage protection elements such as surface-mount type varistors (11) connected to the connection terminals are mounted on the card substrate. The varistors are variable resistor elements having a current tolerating ability greater than that of the first overvoltage protection elements.
    Type: Application
    Filed: January 2, 2007
    Publication date: May 10, 2007
    Inventors: Hirotaka Nishizawa, Yosuke Yukawa, Takashi Totsuka
  • Publication number: 20070102799
    Abstract: An IC card capable of reinforcing the prevention of the electrostatic damage without causing a rise in the cost of a semiconductor integrated circuit chip. The semiconductor integrated circuit chip (2) is mounted on a card substrate (1), and plural connection terminals (3) are exposed. The connection terminals are connected to predetermined external terminals (4) of the semiconductor integrated circuit chip, first overvoltage protection elements (7, 8, 9) connected to the external terminals are integrated in the semiconductor integrated circuit chip, and second overvoltage protection elements such as surface-mount type varistors (11) connected to the connection terminals are mounted on the card substrate. The varistors are variable resistor elements having a current tolerating ability greater than that of the first overvoltage protection elements.
    Type: Application
    Filed: January 2, 2007
    Publication date: May 10, 2007
    Inventors: Hirotaka NISHIZAWA, Yosuke Yukawa, Takashi Totsuka
  • Publication number: 20070023530
    Abstract: A card tray to be mounted to a memory card can make the memory card mountable in a card slot for memory cards conforming to standards different from those to which the memory card conforms. The card tray has a main body and a recessed mount section. The recessed mount section is formed such that the holder of a second memory card can be mounted to one of the major surfaces of the main body. A memory-card-mounted body is produced when the second memory card is mounted to the recessed mount section. The card tray is configured such that, when the first memory card is placed on the memory-card-mounted body with the left and right edges thereof aligned with each other, the contact pieces of the first memory card and the contact pieces of the second memory card have longitudinally overlapping parts and transversally overlapping parts as viewed from above.
    Type: Application
    Filed: July 17, 2006
    Publication date: February 1, 2007
    Inventors: Yoshitaka Aoki, Keiichi Tsutsui, Hirotaka Nishizawa, Takashi Totsuka
  • Patent number: 7162645
    Abstract: A storage device includes a tamper-resistant module and a flash memory. In correspondence with a command, a CPU inside the tamper-resistant module judges the security of data received from the outside, then recording the data as follows: High-security and small-capacity data is recorded into a memory inside the tamper-resistant module. High-security and large-capacity data is encrypted, then being recorded into the flash memory. Low-security data is recorded as it is into the flash memory. This recording method permits large-capacity data to be stored while ensuring a security (i.e., a security level) corresponding thereto.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: January 9, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Shinya Iguchi, Takashi Tsunehiro, Motoyasu Tsunoda, Haruji Ishihara, Nagamasa Mizushima, Takashi Totsuka
  • Patent number: 7100055
    Abstract: A storage medium includes a storage device for storing information, information required for encryption and encrypted information, and an I/F device for inputting and outputting information, information required for coding and store encrypted information in a storage device or from an external apparatus other than the storage device, and an encoding device for coding of information and decoding of encoded information. When outputting information stored inside the storage device, information is encoded using encryption key information, and along with obtaining the encoded information and obtaining the encoded encryption key information by using another encryption key. Both the encoded information and encoded encryption key information are output so that decoding the information without the storage medium is impossible.
    Type: Grant
    Filed: September 4, 2001
    Date of Patent: August 29, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Toru Owada, Jun Kitahara, Takeshi Asahi, Takayuki Tamura, Nagamasa Mizushima, Ikuya Kawasaki, Takashi Totsuka
  • Patent number: 7079144
    Abstract: A user gives, as input, two curves at a start time and at an end time and reference correspondence points with respect to the respective curves. Then, a pursuit operation of pursuing a reference correspondence point is carried out with respect to picture images successive in the time axis direction. As a result, positions of reference correspondence points at respective intermediate stages can be determined. Then, interpolation of the shape is carried out. Then, the determined interpolated shape is deformed in correspondence with the determined reference correspondence point. Accordingly, even in the case where a contour shape does not linearly move, it is possible to precisely pursue correspondence points on the contour. Thus, a contour shape with higher precision can be prepared.
    Type: Grant
    Filed: February 25, 2000
    Date of Patent: July 18, 2006
    Assignee: Sony Corporation
    Inventors: Shigehiro Shimada, Junichi Tsukamoto, Takashi Totsuka
  • Patent number: 7054990
    Abstract: The external storage device according to the present invention which uses a non-volatile semiconductor memory such as a flash memory is provided with plural areas which store user data, and restricts access to the user data from a host computer and also dynamically changes an area an access to which is to be restricted. Accordingly, the ease of use of the external storage device for the host computer is improved. Specifically, the interior of the flash memory is divided into a normal area not protected by a password or the like and a protected area protected by a password or the like. A microprocessor controls accesses to the normal area and the protected area in accordance with a command from the host computer. In addition, the host computer can access the protected area after passing through authentication using a password. Moreover, the host computer changes information indicative of the location of the protected area, thereby dynamically changing the protection area.
    Type: Grant
    Filed: August 10, 2000
    Date of Patent: May 30, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Takayuki Tamura, Jun Kitahara, Toru Owada, Shinichi Sawamura, Takeshi Asahi, Nagamasa Mizushima, Takashi Totsuka, Yasushi Akao
  • Publication number: 20060097060
    Abstract: In a memory card with a newly-added module for performing data communication, data communication is stably performed without receiving a noise effect. As an embodiment of the present invention, a memory card 100 has a thin-plate-shaped holding member 20, a memory section 24 provided as buried in the holding member 20, plural first connection pieces 2-10 connected to the memory section 24, a data communication section 26 provided as buried in the holding member 20, and two connection pieces 11, 12 connected to the data communication section 26. The two second connection pieces 11, 12 are disposed at the end of a row part R1 on which only the plural first connection pieces 2-10 are aligned. One first connection piece 10 positioned at the end of the row part R1 is a ground terminal. That is to say, in the plural first connection pieces 2-10, the first connection piece 10 adjacent to the second connection piece 11 is a ground terminal.
    Type: Application
    Filed: October 21, 2005
    Publication date: May 11, 2006
    Inventors: Yoshitaka Aoki, Hideaki Bando, Keiichi Tsutsui, Hirotaka Nishizawa, Kenji Ohsawa, Takashi Totsuka
  • Publication number: 20050253239
    Abstract: This invention is to provide an ultra-miniaturized, thin-sized memory card provided with a mechanism for preventing a wrong insertion to a memory card slot. A multi-function memory card is composed of a card body and a cap for housing the card body. The card body is made of mold resin that encapsulates plural semiconductor chips mounted on a main surface of a wiring substrate. The card body is housed into the cap with the back face of the wiring substrate facing outward. Guide channels are provided at both side faces of the cap for preventing that the card is inserted upside down. Further, a convex section is provided at the trailing edge of the cap for preventing that the card is inserted in the wrong direction.
    Type: Application
    Filed: April 25, 2005
    Publication date: November 17, 2005
    Inventors: Hirotaka Nishizawa, Kenji Osawa, Junichiro Osako, Tamaki Wada, Michiaki Sugiyama, Takashi Totsuka
  • Publication number: 20050252978
    Abstract: To realize compatibility with an SIM card and adaptation to a high-speed memory access in an IC card module having a microcomputer and a memory card controller. An IC card module includes a plurality of first external connecting terminals and a plurality of second external connecting terminals both exposed to one surface of a card substrate, a microcomputer connected to the first external connecting terminals, a memory controller connected to the second external connecting terminals, and a volatile memory connected to the memory controller. The shape of the card substrate and the layout of the first external connecting terminals are based on a standard of plug-in UICC of ETSI TS 102 221 V4.4.0 (2001-10) or have compatibility. The second external connecting terminals are disposed outside the minimum range of the terminal layout based on the standard for the first external connecting terminals.
    Type: Application
    Filed: May 10, 2005
    Publication date: November 17, 2005
    Inventors: Hirotaka Nishizawa, Takashi Totsuka, Kenji Osawa, Junichiro Osako, Tamaki Wada, Michiaki Sugiyama
  • Publication number: 20050251411
    Abstract: A content sharing system and content importance level judging method are provided. The content sharing system provides an importance level of arbitrary content is individually judged with respect to users and a notice message valuable for a user is appropriately notified to a client or the outside tool. Further, an access user is able to set the disclosure level of access record of a user accessed the content. In the content sharing system, an importance level of content of multimedia data on a server shared with clients of a plurality of users is judged, in which the importance level of the content with respect to each user is individually calculated by interpreting existing data or a user environment, the client condition is judged, a notice rule setting is changed in accordance with the client condition or an instruction from the client, and a notice message is issued to an appropriate address based on the calculated importance level and a notice rule of the content.
    Type: Application
    Filed: May 19, 2005
    Publication date: November 10, 2005
    Inventors: Shinya Ishii, Yuichi Abe, Yoshihiro Manabe, Takao Shimada, Norikazu Hiraki, Kenichiro Nakamura, Ryoichi Imaizumi, Takashi Totsuka
  • Patent number: D552098
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: October 2, 2007
    Assignees: Renesas Technology Corporation, Sony Kabushiki Kaisha
    Inventors: Hirotaka Nishizawa, Kenji Osawa, Junichiro Osako, Tamaki Wada, Michiaki Sugiyama, Takashi Totsuka, Yoshitaka Aoki, Keiichi Tsutsui
  • Patent number: D552099
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: October 2, 2007
    Assignees: Renesas Technology Corporation, Sony Kabushiki Kaisha
    Inventors: Hirotaka Nishizawa, Kenji Osawa, Junichiro Osako, Tamaki Wada, Michiaki Sugiyama, Takashi Totsuka, Yoshitaka Aoki, Keiichi Tsutsui
  • Patent number: D552612
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: October 9, 2007
    Assignee: Renesas Technology Corporation
    Inventors: Hirotaka Nishizawa, Kenji Osawa, Junichiro Osako, Tamaki Wada, Michiaki Sugiyama, Takashi Totsuka
  • Patent number: D556764
    Type: Grant
    Filed: May 22, 2007
    Date of Patent: December 4, 2007
    Assignees: Renesas Technology Corporation, Sony Kabushiki Kaisha
    Inventors: Hirotaka Nishizawa, Kenji Osawa, Junichiro Osako, Tamaki Wada, Michiaki Sugiyama, Takashi Totsuka, Yoshitaka Aoki, Keiichi Tsutsui