Patents by Inventor Takashi Totsuka

Takashi Totsuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6053089
    Abstract: In this invention, an idea is adopted in which the pressure at a forward portion and a backward portion of valve device is steppingly dropped twice. The valve device of the present invention includes, on the axis of a spool 600, a first valve 710 located nearer an inlet port and a second valve 720 located nearer an outlet port. A throttling area made by the second valve 720 is larger than a throttling area made by the first valve 710. For example, of all the pressure difference equal to 120 kg/cm.sup.2 or more required at the forward and backward portions of the valve device, a portion in the range where the problem of an occurrence of a foreign noise is not encountered (for example, a portion ranging from 100 to 120 kg/cm.sup.2) is undertaken by the first valve 710, and the remaining portion ranging from 20 to 30 kg/cm.sup.2 is undertaken by the second valve 720.
    Type: Grant
    Filed: August 19, 1998
    Date of Patent: April 25, 2000
    Assignees: Mitsubishi Jidosha Kogyo Kabushiki Kaisha, Bosch Braking Systems Co., Ltd.
    Inventors: Takashi Totsuka, Tetsuya Masuda, Kazunori Yamawaki, Akira Yamada
  • Patent number: 6014731
    Abstract: In a storage disk control apparatus, a load of a computer caused by transferring data is reduced, and a waiting time until a data transfer operation is commenced is shortened. In the disk control method for controlling a disk apparatus including a disk having a plurality of storage regions for storing data therein by way of an external apparatus external addresses produced from the external apparatus are related to internal addresses indicative of positions of the storage regions the external addresses are converted into the internal addresses related thereto, and the disk is accessed based on the internal addresses.
    Type: Grant
    Filed: June 28, 1995
    Date of Patent: January 11, 2000
    Assignee: Sony Corporation
    Inventors: Takashi Totsuka, Yasunobu Kato, Noboru Oya, Hiroyuki Shioya
  • Patent number: 5995662
    Abstract: An edge detecting method and an edge detecting device detecting from a picture element group which is changing rapidly as compared with its surroundings an edge from within image data in which each picture element is composed of independent N numbers of dark and light data R, G, and B respectively, by calculating N sets of coefficients Wr, Wg, Wb corresponding to N numbers of dark and light data R, G, B respectively, and each picture element is judged whether it is an edge or not depending upon N numbers of dark and light data R, G, B and N sets of coefficients Wr, Wg, Wb.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: November 30, 1999
    Assignee: Sony Corporation
    Inventors: Takashi Totsuka, Tomoo Mitsunaga
  • Patent number: 5974194
    Abstract: The present invention is directed to a method of scratch removal from digitized images wherein a "scratched" portion of a digitized image which requires repair or noise removal, is identified and a binary mask is generated which distinguishes the defined "scratched" portion from the other portions of the digitized image. A repair window is defined which delineates the portion of the digitized image desired to be repaired of scratches or other noise. A sample window having the same dimensional attributes as the repair window, and preferably free of any scratch or other noise, is then defined. The sample window is preferably selected so as to be as close in resemblance to the repair window as possible.
    Type: Grant
    Filed: October 21, 1996
    Date of Patent: October 26, 1999
    Assignee: Sony Corporation
    Inventors: Anil Hirani, Takashi Totsuka
  • Patent number: 5973964
    Abstract: A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data.
    Type: Grant
    Filed: October 30, 1998
    Date of Patent: October 26, 1999
    Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd., Hitachi ULSI Engineering Co., Ltd.
    Inventors: Tsunehiro Tobita, Jun Kitahara, Takashi Tsunehiro, Kunihiro Katayama, Ryuichi Hattori, Yukihiro Seki, Hajime Yamagami, Takashi Totsuka, Takeshi Wada, Yosio Takaya, Manabu Saito, Kenichi Kaki, Takao Okubo, Takashi Kikuchi, Masamichi Kishi, Takeshi Suzuki, Shigeru Kadowaki
  • Patent number: 5963668
    Abstract: Polygonal data input in a first step is subjected to evaluation in which all edges of the polygon data are ranked in importance on the basis of a volume change caused by removal of that edge. The edges are sorted on the basis of an evaluation value in a third step. In a fourth step, the edge of a small evaluation value is determined to be an edge of a small influence on the general shape and is removed. In a fifth step, a new vertex is determined from the loss of vertex by the edge removal. In a sixth step, a movement of texture coordinates and a removal of the texture after the edge removal are executed on the basis of the area change of the texture due to the edge removal by a predetermined evaluating function. In a seventh step, by repeating the processes in the second to sixth steps, a polygon model approximated to a desired layer can be obtained.
    Type: Grant
    Filed: November 25, 1996
    Date of Patent: October 5, 1999
    Assignee: Sony Corporation
    Inventors: Junji Horikawa, Takashi Totsuka
  • Patent number: 5914916
    Abstract: A method and apparatus for controlling the access to a recording disk which determines a skew so that a rotational delay time at an average distance of movement when a head accesses the recording disk is minimized. The methods and apparatus determine the position of a data block on the recording disk based on at least the determined skew, schedules an order of a plurality of input disk access requests so that an amount of movement of the head becomes small at the time of access with respect to the recording disk by the head, and the head accesses the recording disk based on the result of the scheduling.
    Type: Grant
    Filed: July 10, 1997
    Date of Patent: June 22, 1999
    Assignee: Sony Corporation
    Inventors: Takashi Totsuka, Yasunobu Kato, Noboru Oya, Hiroyuki Shioya
  • Patent number: 5892853
    Abstract: Methods and apparatus for removing scratch and wire noise from digitized images handle the difficult case of non-uniformly shaded images which is the common situation in real applications. The methods and apparatus also utilize a soft edge noise mask to allow a smoother blending of the reconstructed noise and the image around the noise. wire noise removal from digitized images wherein a scratched portion of a digitized image which requires repair or noise removal is identified and a binary mask is generated which distinguishes the defined scratched portion from the other portions of the digitized image. The methods and apparatus utilize both the spatial and frequency domains to effectively reconstruct many contiguous noisy pixels, reconstruct textures even when they are large featured, maintain sharpness and maintain continuity of features across a noisy region. A set of instructions for executing the methods is contained in a program storage device.
    Type: Grant
    Filed: July 23, 1997
    Date of Patent: April 6, 1999
    Assignee: Sony Corporation
    Inventors: Anil Hirani, Takashi Totsuka
  • Patent number: 5887082
    Abstract: An image area extracting method for extracting the desired areas from the image accurately and efficiently. The rough boundary area, in which the boundary area is roughly assigned between the desired area and areas other than the desired area, is divided into a plurality of small areas. The area extracting procedure is executed on each small area and the desired area and areas other than the desired area are detected from each small area. The boundary area mask image is formed based on the detection result and the desired area is extracted based on the boundary area mask image. Thus, the desired area can be extracted from the image accurately and efficiently.
    Type: Grant
    Filed: November 21, 1995
    Date of Patent: March 23, 1999
    Assignee: Sony Corporation
    Inventors: Tomoo Mitsunaga, Takashi Totsuka
  • Patent number: 5862083
    Abstract: A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data.
    Type: Grant
    Filed: April 30, 1996
    Date of Patent: January 19, 1999
    Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Tsunehiro Tobita, Jun Kitahara, Takashi Tsunehiro, Kunihiro Katayama, Ryuichi Hattori, Yukihiro Seki, Hajime Yamagami, Takashi Totsuka, Takeshi Wada, Yosio Takaya, Manabu Saito, Kenichi Kaki, Takao Okubo, Takashi Kikuchi, Masamichi Kishi, Takeshi Suzuki, Shigeru Kadowaki
  • Patent number: 5774498
    Abstract: A reordering device 1.sub.-- 1 rearranges the segments of each block of time series data comprised of a plurality of blocks in block units. A selecting device 2.sub.-- 1 selects from among a plurality of time series data S1.sub.-- 1 to 1.sub.-- 4 rearranged by the reordering device 1 by switching in accordance with the speed and transmits the corresponding segments of the selected time series data sequentially to the reordering device 3.sub.-- 1 etc. as the streams S2.sub.-- 1 etc. The repeat reordering device 3.sub.-- 1 rearranges the segments contained in the stream S2.sub.-- 1 in units of blocks so as to restore the original order and transmits this rearranged time series data.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: June 30, 1998
    Assignee: Sony Corporation
    Inventors: Noboru Oya, Takashi Totsuka, Yasunobu Kato, Hiroyuki Shioya
  • Patent number: 5774130
    Abstract: A drawing method of computer graphics in which an approximation of a model is executed in consideration of a target point of the observer, a position of model, a size of model on a picture plane, and a moving speed of model are considered and, further, a feeling of physical disorder that is given to the eyes of a human being is reduced is provided. Geometric model data inputted in step S1 is subjected to a filtering process in order to reduce a complexity of the model in step S2 and an outline of the model is extracted in step S3. As for the model from which the outline was extracted, characteristic points to which the human being largely react are extracted from such an outline in step S4. The processes in steps S2 to S4 are executed by a number of times as many as the number of necessary hierarchies (step S5). The characteristic points extracted every hierarchy in step S4 are made correspond among the hierarchies in step S6.
    Type: Grant
    Filed: August 31, 1995
    Date of Patent: June 30, 1998
    Assignee: Sony Corporation
    Inventors: Junji Horikawa, Takashi Totsuka
  • Patent number: 5708632
    Abstract: A method and apparatus for controlling the access to a recording disk which determines a skew so that a rotational delay time at an average distance of movement when a head accesses the recording disk is minimized. The methods and apparatus determine the position of a data block on the recording disk based on at least the determined skew, schedules an order of a plurality of input disk access requests so that an amount of movement of the head becomes small at the time of access with respect to the recording disk by the head, and the head accesses the recording disk based on the result of the scheduling.
    Type: Grant
    Filed: October 21, 1996
    Date of Patent: January 13, 1998
    Assignee: Sony Corporation
    Inventors: Takashi Totsuka, Yasunobu Kato, Noboru Oya, Hiroyuki Shioya
  • Patent number: 5530673
    Abstract: A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data.
    Type: Grant
    Filed: April 8, 1994
    Date of Patent: June 25, 1996
    Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Tsunehiro Tobita, Jun Kitahara, Takashi Tsunehiro, Kunihiro Katayama, Ryuichi Hattori, Yukihiro Seki, Hajime Yamagami, Takashi Totsuka, Takeshi Wada, Yosio Takaya, Manabu Saito, Kenichi Kaki, Takao Okubo, Takashi Kikuchi, Masamichi Kishi, Takeshi Suzuki, Shigeru Kadowaki