Patents by Inventor Takayuki Ikeda

Takayuki Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11794679
    Abstract: An occupant protection device which can protect an occupant without delay is provided. An image taken by an imaging device is analyzed to judge whether there is an object approaching the subject car. In the case where a collision between the object and the subject car is judged to be inevitable, an airbag device is activated before the collision, whereby the occupant can be protected without delay. By using selenium for a light-receiving element of the imaging device, an accurate image can be obtained even under low illuminance. Imaging in a global shutter system leads to an accurate image with little distortion. This enables more accurate image analysis.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: October 24, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takayuki Ikeda, Yoshiyuki Kurokawa
  • Patent number: 11799430
    Abstract: A novel comparison circuit, a novel amplifier circuit, a novel battery control circuit, a novel battery protection circuit, a power storage device, a semiconductor device, an electric device, and the like are provided. In a semiconductor device, one of a source and a drain of a first transistor is electrically connected to one of a source and a drain of a second transistor and one of a source and a drain of a third transistor; the other of the source and the drain of the third transistor is electrically connected to a first output terminal; and the other of the source and the drain of the second transistor is electrically connected to a second output terminal.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: October 24, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kei Takahashi, Takeshi Aoki, Munehiro Kozuma, Takayuki Ikeda
  • Publication number: 20230336006
    Abstract: A protection circuit and a control circuit of a secondary battery are provided, for example. A circuit with low power consumption is provided. A circuit with a high degree of integration is provided. The control circuit includes a first resistance circuit, a second resistance circuit, a comparator, and a memory circuit.
    Type: Application
    Filed: September 13, 2021
    Publication date: October 19, 2023
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidetomo KOBAYASHI, Yuto YAKUBO, Takayuki IKEDA
  • Patent number: 11790817
    Abstract: A display device in which a pixel defect is less likely to be perceived is provided. The display device includes a display portion where pixels are arranged in a matrix, and a sensor portion including a photoelectric conversion element. First, the display portion is divided into a first region and a second region. Next, first light is emitted from the pixel included in the first region, and the luminance of the first light is detected by the photoelectric conversion element. Moreover, second light is emitted from the pixel included in the second region, and the luminance of the second light is detected by the photoelectric conversion element. Then, the luminance of the first light is compared to the luminance of the second light, and on the basis of the comparison result, one of the first region and the second region is divided into a third region and a fourth region. By repeating these operations, a defective pixel is detected.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: October 17, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takayuki Ikeda
  • Patent number: 11791640
    Abstract: Rapid degradation an off-leakage current in an overdischarged state is prevented. In order to prevent an overdischarged state, a control circuit with low leakage current includes a transistor using an oxide semiconductor, whereby the characteristics of the secondary battery are retained. In addition, a system in which a control signal generation circuit is also integrated is formed. With this system structure, the control circuit enters a low-power consumption mode in accordance with the circuit operation after an overdischarge is detected. When recovering from an overdischarged state, the control circuit enters a normally-operating mode in accordance with the voltage increase when charging is started.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: October 17, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Kozuma, Takayuki Ikeda
  • Publication number: 20230320100
    Abstract: A memory device having large memory capacity is provided. A highly reliable memory device is provided. A semiconductor device includes a first conductive layer extending in a first direction, a structure body extending in a second direction intersecting with the first direction, a first insulating layer, and a second insulating layer. The structure body includes a functional layer, a semiconductor layer, a third insulating layer, and a second conductive layer. In an intersection portion of the first conductive layer and the structure body, the third insulating layer, the semiconductor layer, and the functional layer are placed concentrically around the second conductive layer in this order. The first insulating layer and the second insulating layer are stacked in the second direction. The functional layer and the first conductive layer are placed between the first insulating layer and the second insulating layer.
    Type: Application
    Filed: September 16, 2021
    Publication date: October 5, 2023
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA, Tatsuya ONUKI, Hitoshi KUNITAKE, Yasuhiro JINBO
  • Patent number: 11776596
    Abstract: A data device with a small circuit area and reduced power consumption is used. The data processing device includes a NAND memory portion and a controller. The memory portion includes a first string and a second string in different blocks. The first string includes a first memory cell, and the second string includes a second memory cell. On reception of first data and a signal including an instruction to write the first data, the controller writes the first data to the first memory cell. Then, the controller reads the first data from the first memory cell and writes the first data to the second memory cell.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: October 3, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takayuki Ikeda, Hitoshi Kunitake
  • Patent number: 11776645
    Abstract: An electronic device applicable to an artificial neuron network. The electronic device includes a first circuit, a second circuit, and first to sixth wirings. The first circuit includes a first transistor, a second transistor, and a capacitor. The second circuit includes a third transistor. A gate of the third transistor is electrically connected to the third wiring. The capacitor capacitively couples the third wiring and the gate of the second transistor. The first circuit is capable of storing a weight as an analog value. The first transistor is typically an oxide semiconductor transistor.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: October 3, 2023
    Inventors: Takayuki Ikeda, Yoshiyuki Kurokawa
  • Publication number: 20230297822
    Abstract: An imaging device connected to a neural network is provided. An imaging device having a neuron in a neural network includes a plurality of first pixels, a first circuit, a second circuit, and a third circuit. Each of the plurality of first pixels includes a photoelectric conversion element. The plurality of first pixels is electrically connected to the first circuit. The first circuit is electrically connected to the second circuit. The second circuit is electrically connected to the third circuit. Each of the plurality of first pixels generates an input signal of the neuron. The first circuit, the second circuit, and the third circuit function as the neuron. The third circuit includes an interface connected to the neural network.
    Type: Application
    Filed: May 24, 2023
    Publication date: September 21, 2023
    Inventors: Takayuki IKEDA, Takahiro FUKUTOME
  • Publication number: 20230298517
    Abstract: A semiconductor device includes first to tenth transistors and first to fourth capacitors. Gates of the first and the fourth transistors are electrically connected to each other. First terminals of the first, second, fifth, and eighth transistors are electrically connected to a first terminal of the fourth capacitor. A second terminal of the fifth transistor is electrically connected to a gate of the sixth transistor and a first terminal of the second capacitor. A second terminal of the eighth transistor is electrically connected to a gate of the ninth transistor and a first terminal of the third capacitor. Gates of the second, seventh, and tenth transistors are electrically connected to first terminals of the third and fourth transistors and a first terminal of the first capacitor. First terminals of the sixth and seventh transistors are electrically connected to a second terminal of the second capacitor.
    Type: Application
    Filed: May 19, 2023
    Publication date: September 21, 2023
    Inventors: Hajime KIMURA, Takayuki IKEDA
  • Publication number: 20230283276
    Abstract: A semiconductor device with high arithmetic performance is provided. The semiconductor device employs the translinear principle, and the semiconductor device includes first to tenth transistors each including a metal oxide in a channel formation region and a first capacitor. A first terminal of the first transistor is electrically connected to a first terminal of the second transistor, a first terminal of the third transistor is electrically connected to a second terminal of the second transistor and a gate of the second transistor through the first capacitor. The second terminal of the second transistor is electrically connected to first terminals of the fourth and the seventh transistors and gates of the fifth and the eighth transistors. A gate of the seventh transistor is electrically connected to first terminals of the fifth and the sixth transistors, and a gate of the tenth transistor is electrically connected to first terminals of the eighth and the ninth transistors.
    Type: Application
    Filed: July 19, 2021
    Publication date: September 7, 2023
    Inventors: Takayuki IKEDA, Shuhei NAGATSUKA
  • Publication number: 20230274779
    Abstract: A semiconductor device that restores degraded data is provided. The semiconductor device includes a first circuit, a storage portion, and an arithmetic portion. The first circuit includes a current source and a first switch. The storage portion includes a first transistor and a first capacitor. The arithmetic portion includes a second transistor. A first terminal of the first transistor is electrically connected to a control terminal of the first switch, a first terminal of the first switch is electrically connected to an output terminal of the current source, and a second terminal of the first switch is electrically connected to a first terminal of the second transistor. When data retained in the arithmetic portion is restored, the first transistor is turned on, and the data retained in the storage portion is supplied to the control terminal of the first switch through the first transistor.
    Type: Application
    Filed: July 5, 2021
    Publication date: August 31, 2023
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Takayuki IKEDA, Yoshiyuki KUROKAWA
  • Publication number: 20230272145
    Abstract: A composite fiber contains a component A as a core component and a component B at least partially covering the component A. The component A contains a vibration damping elastomer having a peak top intensity of tan ? of 0.5 or more. The component B contains a thermoplastic elastomer having a peak top intensity of tan ? of less than 0.5. The component B covers 70% or more of the cross-sectional perimeter of the component A in the fiber cross-section.
    Type: Application
    Filed: October 4, 2021
    Publication date: August 31, 2023
    Applicant: KURARAY TRADING CO., LTD.
    Inventors: Kohei YAMASAKI, Hitoshi NAKATSUKA, Takayuki IKEDA, Shoji ONOGI
  • Publication number: 20230273637
    Abstract: A control circuit of a secondary battery with a novel structure is provided. The control circuit of a secondary battery includes a first transistor, a first voltage generation circuit generating a first voltage, and a second voltage generation circuit generating a second voltage. The first voltage generation circuit includes a second transistor and a first capacitor. The second voltage generation circuit includes a third transistor and a second capacitor. The difference between the first voltage and the second voltage is set in accordance with the threshold voltage of the first transistor. When the first transistor includes a back gate, a voltage retention circuit having a function of retaining the voltage of the back gate is included. The voltage retention circuit includes a fourth transistor and a third capacitor. The third capacitor includes a ferroelectric layer between a pair of electrodes.
    Type: Application
    Filed: August 25, 2021
    Publication date: August 31, 2023
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki KUROKAWA, Kazuki TSUDA, Hiromichi GODO, Satoru OHSHITA, Takuro KANEMURA, Hidefumi RIKIMARU, Takayuki IKEDA, Yuto YAKUBO, Shunpei YAMAZAKI
  • Patent number: 11742379
    Abstract: A novel functional panel that is highly convenient or highly reliable is provided. The functional panel includes a first pixel. The first pixel includes a first element, a color conversion layer, and a first functional layer. The first functional layer is positioned between the first element and the color conversion layer. The first element has a function of emitting light and contains gallium nitride. The color conversion layer has a function of converting the color of light emitted from the first element into a different color. The first functional layer includes a first insulating film and a pixel circuit. The first insulating film includes a region positioned between the pixel circuit and the first element, and has an opening. The pixel circuit includes a first transistor. The first transistor includes a first oxide semiconductor film and is electrically connected to the first element through the opening.
    Type: Grant
    Filed: August 11, 2022
    Date of Patent: August 29, 2023
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Takayuki Ikeda
  • Publication number: 20230261017
    Abstract: A highly functional imaging device is provided. A small imaging device is provided. An imaging device or the like capable of high-speed operation is provided. A highly reliable imaging device is provided. The imaging device includes a pixel array, and a light-blocking layer and a transparent conductive layer that are over the pixel array. The light-blocking layer includes a first region overlapping with a first pixel and a second region overlapping with a second pixel. The transparent conductive layer includes a region overlapping with the first region and a region overlapping with the second region. The transparent conductive layer has a light-transmitting property. The transparent conductive layer is electrically connected to the first region and the second region. First light enters the photoelectric conversion device included in the first pixel. Second light enters the photoelectric conversion device included in the second pixel.
    Type: Application
    Filed: July 16, 2021
    Publication date: August 17, 2023
    Inventors: Hiroki INOUE, Seiichi YONEDA, Yusuke NEGORO, Takayuki IKEDA, Naoto KUSUMOTO, Kensuke YOSHIZUMI, Shunpei YAMAZAKI
  • Patent number: 11728355
    Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: August 15, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Yoshiyuki Kurokawa, Shintaro Harada, Hidetomo Kobayashi, Roh Yamamoto, Kiyotaka Kimura, Takashi Nakagawa, Yusuke Negoro
  • Patent number: 11727873
    Abstract: A semiconductor device with low power consumption is provided. A semiconductor device that operates at high speed is provided. A semiconductor device with a small circuit area is provided. A novel semiconductor device is provided. In the semiconductor device, a signal line is electrically connected to a plurality of pixels between a first node and a second node; an amplifier circuit has a function of amplifying a supplied current and supplying the amplified current to the first node; an analog-to-digital converter circuit has a function of converting a potential of the first node into a first signal, and a function of converting a potential of the second node into a second signal; a sensing circuit has a function of comparing the first signal and the second signal and generating a third signal; and the current amplification factor of the amplifier circuit is determined in accordance with the third signal.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: August 15, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kiyotaka Kimura, Hidetomo Kobayashi, Takayuki Ikeda
  • Patent number: 11728354
    Abstract: An object is to provide a pixel structure of a display device including a photosensor which prevents changes in an output of the photosensor and a decrease in imaging quality. The display device has a pixel layout structure in which a shielding wire is disposed between an FD and an imaging signal line (a PR line, a TX line, or an SE line) or between the FD and an image-display signal line in order to reduce or eliminate parasitic capacitance between the FD and a signal line for the purpose of suppressing changes in the potential of the FD. An imaging power supply line, image-display power supply line, a GND line, a common line, or the like whose potential is fixed, such as a common potential line, is used as a shielding wire.
    Type: Grant
    Filed: August 23, 2022
    Date of Patent: August 15, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Aoki, Yoshiyuki Kurokawa, Takayuki Ikeda, Hikaru Tamura
  • Patent number: 11729960
    Abstract: A semiconductor device with a large storage capacity per unit area is provided. A semiconductor device includes a memory cell. The memory cell includes a first conductor; a first insulator over the first conductor; a first oxide over the first insulator and including a first region, a second region, and a third region positioned between the first region and the second region; a second insulator over the first oxide; a second conductor over the second insulator; a third insulator positioned in contact with a side surface of the first region; and a second oxide positioned on the side surface of the first region, with the third insulator therebetween. The first region includes a region overlapping the first conductor. The third region includes a region overlapped by the second conductor. The first region and the second region have a lower resistance than the third region.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: August 15, 2023
    Inventors: Shunpei Yamazaki, Hajime Kimura, Takayuki Ikeda, Kiyoshi Kato, Yuta Endo, Junpei Sugao