Patents by Inventor Takayuki Ikeda

Takayuki Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220367775
    Abstract: A display unit with high resolution is provided. A display unit with high display quality is provided. A display unit includes a transistor, a light-emitting diode, a first conductive layer over the transistor and electrically connected to the transistor, a second conductive layer over the first conductive layer and electrically connected to the light-emitting diode, a first insulating layer over the transistor, and a second insulating layer over the first insulating layer. The top surface of the first conductive layer is substantially level with the top surface of the first insulating layer, and the bottom surface of the second conductive layer is substantially level with the bottom surface of the second insulating layer. The first insulating layer and the second insulating layer are bonded to each other, and the first conductive layer and the second conductive layer are bonded to each other.
    Type: Application
    Filed: October 29, 2020
    Publication date: November 17, 2022
    Inventors: Shunpei YAMAZAKI, Koji KUSUNOKI, Shingo EGUCHI, Takayuki IKEDA
  • Publication number: 20220367575
    Abstract: A high-resolution display apparatus is provided. The display apparatus includes a first to a fourth subpixels continuously lined up in this order, where the first and second subpixels emit light of a first color and the third and fourth subpixels emit light of a second color. The first color and the second color are different from each other. The first subpixel includes a first light-emitting device and a first coloring layer overlapping with the first light-emitting device; the second subpixel includes a second light-emitting device and the first coloring layer overlapping with the second light-emitting device; the third subpixel includes a third light-emitting device and a second coloring layer overlapping with the third light-emitting device; and the fourth subpixel includes a fourth light-emitting device and the second coloring layer overlapping with the fourth light-emitting device. The first to fourth light-emitting devices emit light of one color and are driven independently.
    Type: Application
    Filed: May 3, 2022
    Publication date: November 17, 2022
    Inventors: Takayuki IKEDA, Yoshiaki OIKAWA, Natsuko TAKASE, Kensuke YOSHIZUMI
  • Publication number: 20220366845
    Abstract: A semiconductor device includes first to tenth transistors and first to fourth capacitors. Gates of the first and the fourth transistors are electrically connected to each other. First terminals of the first, second, fifth, and eighth transistors are electrically connected to a first terminal of the fourth capacitor. A second terminal of the fifth transistor is electrically connected to a gate of the sixth transistor and a first terminal of the second capacitor. A second terminal of the eighth transistor is electrically connected to a gate of the ninth transistor and a first terminal of the third capacitor. Gates of the second, seventh, and tenth transistors are electrically connected to first terminals of the third and fourth transistors and a first terminal of the first capacitor. First terminals of the sixth and seventh transistors are electrically connected to a second terminal of the second capacitor.
    Type: Application
    Filed: April 19, 2022
    Publication date: November 17, 2022
    Inventors: Hajime KIMURA, Takayuki IKEDA
  • Publication number: 20220359592
    Abstract: An imaging device that has an image processing function and is capable of a high-speed operation is provided. The imaging device, which has an additional function such as image processing, can retain analog data obtained by an image capturing operation in a pixel and extract data obtained by multiplying the analog data by a predetermined weight coefficient. In the imaging device, some of potentials used for an arithmetic operation in pixels are generated by redistribution of charge with which wirings are charged. This enables an arithmetic operation to be performed at high speed with low power consumption, compared with the case where the potentials are supplied from another circuit to the pixels.
    Type: Application
    Filed: August 7, 2020
    Publication date: November 10, 2022
    Inventors: Seiichi YONEDA, Yusuke NEGORO, Takayuki IKEDA, Shunpei YAMAZAKI
  • Publication number: 20220350432
    Abstract: To provide an inexpensive display device. The display device includes a pixel and an IC chip. The pixel includes a first pixel circuit including a display element and a second pixel circuit including a light-receiving device. The one IC chip includes a control circuit, a data driver circuit, and a read circuit. The first and second pixel circuits are electrically connected to the read circuit. The control circuit has a function of controlling driving of the data driver circuit and the read circuit. The data driver circuit has a function of supplying image data to the first pixel circuit. The read circuit has a function of outputting a monitor signal corresponding to a monitor current when the monitor current flows through the first pixel circuit. The read circuit also has a function of outputting an imaging signal corresponding to imaging data acquired by the second pixel circuit.
    Type: Application
    Filed: September 22, 2020
    Publication date: November 3, 2022
    Inventors: Kei TAKAHASHI, Hidetomo KOBAYASHI, Hajime KIMURA, Takeshi OSADA, Hideaki SHISHIDO, Kiyotaka KIMURA, Shuichi KATSUI, Takeya HIROSE, Takayuki IKEDA
  • Publication number: 20220350571
    Abstract: A novel information processing device with least signal transmission delay and low power consumption is provided. A storage device includes a first layer, a second layer, and a third layer. The first layer is provided with a circuit. The second layer is provided with a memory cell portion. The third layer is provided with a first electrode. The circuit has a function of switching and performing reading or writing of first data or second data from or to the memory cell portion. At least part of the second layer is stacked above the first layer. At least part of the third layer is stacked above the second layer. An arithmetic device includes a fourth layer and a fifth layer. The fourth layer is provided with a central processing device. The fifth layer is provided with a second electrode. At least part of the fifth layer is stacked above the fourth layer. The circuit is electrically connected to the central processing device through the first electrode and the second electrode.
    Type: Application
    Filed: November 25, 2020
    Publication date: November 3, 2022
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA, Tatsuya ONUKI, Hitoshi KUNITAKE
  • Publication number: 20220352279
    Abstract: A display device with less display unevenness is provided. The display device includes a first layer and a second layer over the first layer; the first layer includes first circuits arranged in m rows and n columns; the second layer includes pixel blocks arranged in the m rows and the n columns; the pixel blocks each comprise pixels arranged in a rows and b columns; the pixel block includes a first wiring and a second wiring electrically connected to the pixel; the first wiring and the second wiring included in the pixel block in the i-th row and the j-th column are each electrically connected to the first circuit in the i-th row and the j-th column; the first wiring has a function of supplying an input signal from the first circuit to the pixel; and the second wiring has a function of supplying an output signal from the pixel to the first circuit.
    Type: Application
    Filed: June 15, 2020
    Publication date: November 3, 2022
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidetomo Kobayashi, Takayuki IKEDA
  • Publication number: 20220352865
    Abstract: An amplifier is formed in a wiring layer. A semiconductor device includes a second layer over a first layer with a metal oxide therebetween. The first layer includes a first transistor including a first semiconductor layer containing silicon. The second layer includes an impedance matching circuit, and the impedance matching circuit includes a second transistor including a second semiconductor layer containing gallium. The first transistor forms first coupling capacitance between the first transistor and the metal oxide, and the impedance matching circuit forms second coupling capacitance between the impedance matching circuit and the metal oxide. The impedance matching circuit is electrically connected to the metal oxide through the second coupling capacitance. The metal oxide inhibits the influence of first radiation noise emitted from the impedance matching circuit on the operation of the first transistor.
    Type: Application
    Filed: October 5, 2020
    Publication date: November 3, 2022
    Inventors: Kazuaki OHSHIMA, Hitoshi KUNITAKE, Yuto YAKUBO, Takayuki IKEDA
  • Publication number: 20220345095
    Abstract: A semiconductor device is provided in which power consumption is reduced and an increase in circuit area is inhibited. The semiconductor device includes a high frequency amplifier circuit, an envelope detection circuit, and a power supply circuit. The power supply circuit has a function of supplying a power supply potential to the high frequency amplifier circuit, an output of the high frequency amplifier circuit is connected to the envelope detection circuit, and an output of the envelope detection circuit is connected to the power supply circuit. The power supply circuit can reduce the power consumption by changing the power supply potential in accordance with the output of the high frequency amplifier circuit. The use of an OS transistor in the envelope detection circuit can inhibit an increase in circuit area.
    Type: Application
    Filed: June 16, 2020
    Publication date: October 27, 2022
    Inventors: Hitoshi KUNITAKE, Takayuki IKEDA, Kiyoshi KATO, Yuichi YANAGISAWA, Shota MIZUKAMI, Kazuki TSUDA
  • Patent number: 11482146
    Abstract: An object is to provide a display system with a novel structure and a vehicle. The display system includes a display and a control IC. The control IC includes a frame memory, an arithmetic circuit, and a memory circuit. The display has a curved display surface. The frame memory has a function of holding first image data dedicated to displaying an image on a flat surface. The memory circuit has a function of storing shape data on the display. The arithmetic circuit has a function of converting first coordinates of the curved display surface into second coordinates of the flat surface included in the first image data, by performing arithmetic operation in accordance with the shape data. The arithmetic circuit has a function of outputting the first image data stored in the frame memory to the display as second image data on the basis of the second coordinates.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: October 25, 2022
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Takayuki Ikeda
  • Patent number: 11473218
    Abstract: A modified ethylene-vinyl alcohol copolymer fiber includes an ethylene-vinyl alcohol copolymer containing 0.1 to 10 mol % of a modified component and 5 to 55 mol % of ethylene, and has a crystallinity of 25% to 50%.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: October 18, 2022
    Assignee: KURARAY CO., LTD.
    Inventors: Shoji Onogi, Hitoshi Nakatsuka, Shinya Kawakado, Takayuki Ikeda
  • Publication number: 20220310148
    Abstract: To provide a semiconductor device with a novel structure. The semiconductor device includes a plurality of constant current circuits each given a digital signal. The constant current circuits each include a first transistor to a third transistor. The first transistor has a function of making a first current corresponding to set analog potential flow therethrough. The second transistor has a function of controlling the first current flowing between a source and a drain of the first transistor, in response to the digital signal. The third transistor has a function of holding the analog potential supplied to a gate of the first transistor, by being turned off. The first transistor to the third transistor each include a semiconductor layer including an oxide semiconductor in a channel formation region.
    Type: Application
    Filed: June 30, 2020
    Publication date: September 29, 2022
    Inventors: Takayuki IKEDA, Hitoshi KUNITAKE
  • Publication number: 20220302880
    Abstract: A semiconductor device including an amplifier with improved accuracy is provided. The semiconductor device includes a switch, a capacitor, a chopping circuit, and the amplifier. The amplifier includes a non-inverting input terminal, an inverting input terminal, an inverting output terminal, and a non-inverting output terminal. The semiconductor device, with use of the switch and the capacitor, has a function of sampling and holding a first potential and a second potential input in a first period. The chopping circuit is provided on each of the input terminal side and the output terminal side of the amplifier, and the first potential and the second potential are each input to either one of the non-inverting input terminal and the inverting input terminal in a second period. In a third period, the first potential and the second potential are each input to either one of the non-inverting input terminal and the inverted input terminal, which is different from the second period.
    Type: Application
    Filed: August 20, 2020
    Publication date: September 22, 2022
    Inventors: Kei TAKAHASHI, Takayuki IKEDA
  • Patent number: 11450709
    Abstract: A novel functional panel that is highly convenient or highly reliable is provided. The functional panel includes a first pixel. The first pixel includes a first element, a color conversion layer, and a first functional layer. The first functional layer is positioned between the first element and the color conversion layer. The first element has a function of emitting light and contains gallium nitride. The color conversion layer has a function of converting the color of light emitted from the first element into a different color. The first functional layer includes a first insulating film and a pixel circuit. The first insulating film includes a region positioned between the pixel circuit and the first element, and has an opening. The pixel circuit includes a first transistor. The first transistor includes a first oxide semiconductor film and is electrically connected to the first element through the opening.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: September 20, 2022
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Takayuki Ikeda
  • Publication number: 20220294402
    Abstract: A novel comparison circuit, a novel amplifier circuit, a novel battery control circuit, a novel battery protection circuit, a power storage device, a semiconductor device, an electric device, and the like are provided. In a semiconductor device, one of a source and a drain of a first transistor is electrically connected to one of a source and a drain of a second transistor and one of a source and a drain of a third transistor; the other of the source and the drain of the third transistor is electrically connected to a first output terminal; and the other of the source and the drain of the second transistor is electrically connected to a second output terminal.
    Type: Application
    Filed: August 11, 2020
    Publication date: September 15, 2022
    Inventors: Kei TAKAHASHI, Takeshi AOKI, Munehiro KOZUMA, Takayuki IKEDA
  • Publication number: 20220293603
    Abstract: A semiconductor device that occupies a small area is provided. The semiconductor device includes a first transistor including a first oxide semiconductor; a second transistor including a second oxide semiconductor; a capacitor element; a first insulator; and a first conductor in contact with a source or a drain of the second transistor. The capacitor element includes a second conductor, a third conductor, and a second insulator. The first transistor, the second transistor, and the first conductor are placed to be embedded in the first insulator. The second conductor is placed in contact with a top surface of the first conductor and a top surface of a gate of the first transistor. The second insulator is placed over the second conductor and the first insulator. The third conductor is placed to cover the second conductor with the second insulator therebetween.
    Type: Application
    Filed: August 26, 2020
    Publication date: September 15, 2022
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hitoshi Kunitake, Tatsuya ONUKI, Hajime KIMURA, Takayuki IKEDA, Shunpei YAMAZAKI
  • Publication number: 20220286090
    Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a mixer circuit including a digital-analog converter circuit, a control circuit for controlling the digital-analog converter circuit, a power source control switch, and a plurality of Gilbert circuits. The plurality of Gilbert circuits each include an analog potential holding circuit for holding an analog potential output from the digital-analog converter circuit. The control circuit has a function of outputting a signal for controlling the analog potential holding circuit and the digital-analog converter circuit. The power source control switch has a function of stopping supply of a power source voltage to the control circuit in a period during which the analog potential held in the analog potential holding circuit is not updated. The analog potential holding circuit includes a first transistor. The first transistor includes a semiconductor layer including an oxide semiconductor in a channel formation region.
    Type: Application
    Filed: April 27, 2020
    Publication date: September 8, 2022
    Inventors: Kiyotaka KIMURA, Takeya HIROSE, Hidetomo KOBAYASHI, Takayuki IKEDA
  • Publication number: 20220278187
    Abstract: A display device with high design flexibility that can be designed easily is provided. One embodiment of the present invention includes a first substrate (101) provided with a driver circuit including first and second pulse output circuits (91_1, 91_2), a second substrate (103) provided with a display unit (92) including a first pixel circuit including a first source wiring (SL_1) and a first contact portion (SC_1) and a second pixel circuit including a second source wiring (SL_2) adjacent to the first source wiring and a second contact portion (SC_2) electrically connected to the second source wiring, and a connection unit where the first and second substrates are electrically connected to each other.
    Type: Application
    Filed: July 21, 2020
    Publication date: September 1, 2022
    Inventors: Hidetomo KOBAYASHI, Takayuki IKEDA, Shunpei YAMAZAKI
  • Publication number: 20220278139
    Abstract: A display device with a novel structure is provided. The display device includes a first substrate provided with a plurality of pixels including a display element, and a second substrate including a first conductive layer provided with a plurality of first openings. The first conductive layer has a function of an antenna capable of transmitting and receiving a radio signal. The pixel and the first opening include a region where the pixel and the first opening overlap with each other. The second substrate includes an element layer. The element layer includes a transistor. The transistor has a function of an amplifier capable of amplifying the radio signal. The transistor each includes a semiconductor layer including a metal oxide in a channel formation region. The metal oxide contains In, Ga, and Zn.
    Type: Application
    Filed: July 10, 2020
    Publication date: September 1, 2022
    Inventors: Takayuki IKEDA, Hitoshi KUNITAKE, Koji KUSUNOKI, Yoshiaki OIKAWA, Shunpei YAMAZAKI
  • Publication number: 20220276839
    Abstract: A semiconductor device includes a CPU and an accelerator that includes a first memory circuit, a driver circuit, and a product-sum operation circuit. The first memory circuit includes a first data retention portion, a second data retention portion, and a data reading portion. The first data retention portion, the second data retention portion, and the data reading portion each include a first transistor. The first transistor contains a metal oxide in a channel formation region. First data stored in the first data retention portion and second data stored in the second data retention portion are each weight data input to the product-sum operation circuit. The product-sum operation circuit has a function of performing product-sum operation of the weight data and input data input through the driver circuit. The product-sum operation circuit and the driver circuit each include a second transistor. The second transistor contains silicon in a channel formation region.
    Type: Application
    Filed: September 18, 2020
    Publication date: September 1, 2022
    Inventors: Takahiko ISHIZU, Takeshi AOKI, Kazuma FURUTANI, Takayuki IKEDA, Shunpei YAMAZAKI