Patents by Inventor Takayuki Okada
Takayuki Okada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11985034Abstract: A management device comprises an extracting means that extracts, from a database storing configuration information, the client terminals belonging to a specified group, network devices directly serving the client terminals, network devices between the serving network devices, and MEC devices to be treated as candidates for selection, and a selecting means that selects the MEC device to be accessed by the plurality of client terminals forming the group by using first and second amounts of latency, the first amount of latency being the amount of latency between each network device directly serving the client terminals belonging to the group and each MEC device, and the second amount of latency being the amount of latency between each network device directly serving the client terminals belonging to the group and each client terminal.Type: GrantFiled: February 27, 2020Date of Patent: May 14, 2024Assignee: Nippon Telegraph and Telephone CorporationInventors: Takuya Sato, Tomohiro Okada, Takayuki Nakamura, Shunsuke Homma, Mitsuo Amasaka
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Patent number: 11980031Abstract: According to an embodiment, a non-volatile memory device includes first electrodes stacked on an underlying layer, a second electrode provided on the first electrodes, a semiconductor layer extending in a first direction from the underlying layer to the second electrode, and a memory film provided between each of the first electrodes and the semiconductor layer. The semiconductor layer includes a first portion adjacent to the first electrodes and a second portion adjacent to the second electrode. The second portion has a thickness thinner than a thickness of the first portion in a second direction perpendicular to the first direction.Type: GrantFiled: December 21, 2020Date of Patent: May 7, 2024Assignee: Kioxia CorporationInventors: Takashi Ishida, Yoshiaki Fukuzumi, Takayuki Okada, Masaki Tsuji
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Publication number: 20240141217Abstract: Provided is a resin film that has a stress integral value of greater than 10 MPa and 1000 MPa or less when uniaxially stretched at a tensile speed of 300 mm/min at 25° C. until it breaks. The resin film showing these properties is supple and durable.Type: ApplicationFiled: February 28, 2022Publication date: May 2, 2024Inventors: Satoshi HONDA, Masahiro KUZE, Kenichi OKADA, Takayuki KUROKAWA, Jian Ping GONG
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Patent number: 11659654Abstract: A stretchable wiring board that includes: a stretchable substrate; a first wiring line on the stretchable substrate; an insulating layer overlapping a first part of the first wiring line in a plan view of the stretchable wiring board; and a second wiring line overlapping the first part of the first wiring line in the plan view with the insulating layer interposed therebetween. The insulating layer has at least one first notch, and in the plan view, the at least one first notch does not overlap the first wiring line and overlaps the second wiring line.Type: GrantFiled: April 23, 2021Date of Patent: May 23, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Takahito Tomoda, Shinsuke Tani, Takaaki Miyasako, Takayuki Okada, Yui Nakamura, Hayato Katsu, Keisuke Nishida
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Patent number: 11653445Abstract: A stretchable mounting board that includes a stretchable substrate having a main surface, a stretchable wiring disposed on the main surface of the stretchable substrate, a mounting electrode section electrically connected to the stretchable wiring, solder electrically connected to the mounting electrode section and including bismuth and tin, and an electronic component electrically connected to the mounting electrode section with the solder interposed therebetween. The mounting electrode section has a first electrode layer on a side thereof facing the stretchable wiring and which includes bismuth and tin, and a second electrode layer on a side thereof facing the solder and which includes bismuth and tin. A concentration of the bismuth in the first electrode layer is lower than a concentration of the bismuth in the second electrode layer.Type: GrantFiled: November 16, 2021Date of Patent: May 16, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Hayato Katsu, Keisuke Nishida, Ryo Asai, Takayuki Okada, Shinsuke Tani
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Patent number: 11501923Abstract: A multilayer capacitor includes a capacitor main body including dielectric layers, first inner electrodes, and second inner electrodes that are laminated together, first outer electrodes, second outer electrodes, first via conductors that electrically connect the respective first outer electrodes to the first inner electrodes, and second via conductors that electrically connect the respective second outer electrodes to the second inner electrodes. Through holes are provided in the second inner electrodes, and the first via conductors pass through the through holes. Through holes are provided in the first inner electrodes, and the second via conductors pass through the through holes. The first outer electrodes and the second outer electrodes are not provided on the first principal surface of the capacitor main body and provided only on its second principal surface.Type: GrantFiled: August 31, 2020Date of Patent: November 15, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Yukihiro Fujita, Kazuhiro Tabata, Shunsuke Abe, Takayuki Okada
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Patent number: 11309322Abstract: A semiconductor memory device according to an embodiment includes a semiconductor substrate; a laminated body formed by laminating a plurality of electrode layers on the semiconductor substrate; a memory film provided in the laminated body and including a first block insulation film disposed in a direction perpendicular to the electrode layer, a charge storage film facing the first block insulation film, a tunnel insulation film facing the charge storage film, and a channel film facing the tunnel insulation film; and a barrier layer provided at at least one of interface between the plurality of electrode layers and the memory film and an interface in the memory film and mainly composed of carbon.Type: GrantFiled: September 12, 2019Date of Patent: April 19, 2022Assignee: KIOXIA CORPORATIONInventors: Ryota Fujitsuka, Kenta Yamada, Takanori Yamanaka, Takayuki Okada, Hirokazu Ishigaki, Hiroki Kishi, Nobushi Matsuura, Takashi Yamane, Ryota Suzuki
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Publication number: 20220078904Abstract: A stretchable mounting board that includes a stretchable substrate having a main surface, a stretchable wiring disposed on the main surface of the stretchable substrate, a mounting electrode section electrically connected to the stretchable wiring, solder electrically connected to the mounting electrode section and including bismuth and tin, and an electronic component electrically connected to the mounting electrode section with the solder interposed therebetween. The mounting electrode section has a first electrode layer on a side thereof facing the stretchable wiring and which includes bismuth and tin, and a second electrode layer on a side thereof facing the solder and which includes bismuth and tin. A concentration of the bismuth in the first electrode layer is lower than a concentration of the bismuth in the second electrode layer.Type: ApplicationFiled: November 16, 2021Publication date: March 10, 2022Inventors: Hayato Katsu, Keisuke Nishida, Ryo Asai, Takayuki Okada, Shinsuke Tani
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Patent number: 11212915Abstract: A stretchable mounting board that includes a mounting electrode section electrically connected to stretchable wiring, and solder electrically connected to the mounting electrode section. The mounting electrode section has a first electrode layer on a side thereof facing the stretchable wiring and which includes bismuth and tin, and a second electrode layer on a side thereof facing the solder and which includes bismuth and tin. A concentration of the bismuth in the first electrode layer is lower than a concentration of the bismuth in the second electrode layer, and the concentration of the bismuth in the second electrode layer is constant along a thickness direction thereof.Type: GrantFiled: October 14, 2020Date of Patent: December 28, 2021Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Hayato Katsu, Keisuke Nishida, Ryo Asai, Takayuki Okada, Shinsuke Tani
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Publication number: 20210243891Abstract: A stretchable wiring board that includes: a stretchable substrate; a first wiring line on the stretchable substrate; an insulating layer overlapping a first part of the first wiring line in a plan view of the stretchable wiring board; and a second wiring line overlapping the first part of the first wiring line in the plan view with the insulating layer interposed therebetween. The insulating layer has at least one first notch, and in the plan view, the at least one first notch does not overlap the first wiring line and overlaps the second wiring line.Type: ApplicationFiled: April 23, 2021Publication date: August 5, 2021Inventors: Takahito Tomoda, Shinsuke Tani, Takaaki Miyasako, Takayuki Okada, Yui Nakamura, Hayato Katsu, Keisuke Nishida
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Patent number: 11024451Abstract: A multilayer coil component includes coil conductors including silver planar conductors and ferrite layers containing copper and stacked with the coil conductors and the planar conductors interposed therebetween. The coil conductors define a portion of a coil with a winding axis extending in a lamination direction. The planar conductors are arranged in the lamination direction at a position on an upper side of the coil so that each of principal surfaces thereof faces in the lamination direction and a specific region of the principal surface overlaps with the coil when viewed from the lamination direction. Each of the planar conductors includes first through holes penetrating the principal surface in the lamination direction in the specific region.Type: GrantFiled: January 17, 2017Date of Patent: June 1, 2021Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Tomoya Yokoyama, Takayuki Okada
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Publication number: 20210111189Abstract: According to an embodiment, a non-volatile memory device includes first electrodes stacked on an underlying layer, a second electrode provided on the first electrodes, a semiconductor layer extending in a first direction from the underlying layer to the second electrode, and a memory film provided between each of the first electrodes and the semiconductor layer. The semiconductor layer includes a first portion adjacent to the first electrodes and a second portion adjacent to the second electrode. The second portion has a thickness thinner than a thickness of the first portion in a second direction perpendicular to the first direction.Type: ApplicationFiled: December 21, 2020Publication date: April 15, 2021Applicant: Toshiba Memory CorporationInventors: Takashi ISHIDA, Yoshiaki FUKUZUMI, Takayuki OKADA, Masaki TSUJI
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Publication number: 20210082625Abstract: A multilayer capacitor includes a capacitor main body including dielectric layers, first inner electrodes, and second inner electrodes that are laminated together, first outer electrodes, second outer electrodes, first via conductors that electrically connect the respective first outer electrodes to the first inner electrodes, and second via conductors that electrically connect the respective second outer electrodes to the second inner electrodes. Through holes are provided in the second inner electrodes, and the first via conductors pass through the through holes. Through holes are provided in the first inner electrodes, and the second via conductors pass through the through holes. The first outer electrodes and the second outer electrodes are not provided on the first principal surface of the capacitor main body and provided only on its second principal surface.Type: ApplicationFiled: August 31, 2020Publication date: March 18, 2021Inventors: Yukihiro FUJITA, Kazuhiro TABATA, Shunsuke ABE, Takayuki OKADA
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Publication number: 20210045236Abstract: A stretchable mounting board that includes a stretchable substrate having a main surface, a stretchable wiring disposed on the main surface of the stretchable substrate, a mounting electrode section electrically connected to the stretchable wiring, solder electrically connected to the mounting electrode section and including bismuth and tin, and an electronic component electrically connected to the mounting electrode section with the solder interposed therebetween. The mounting electrode section has a first electrode layer on a side thereof facing the stretchable wiring and which includes bismuth and tin, and a second electrode layer on a side thereof facing the solder and which includes bismuth and tin. A concentration of the bismuth in the first electrode layer is lower than a concentration of the bismuth in the second electrode layer, and the concentration of the bismuth in the second electrode layer is constant along a thickness direction thereof.Type: ApplicationFiled: October 14, 2020Publication date: February 11, 2021Inventors: Hayato Katsu, Keisuke Nishida, Ryo Asai, Takayuki Okada, Shinsuke Tani
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Patent number: 10916562Abstract: According to an embodiment, a non-volatile memory device includes first electrodes stacked on an underlying layer, a second electrode provided on the first electrodes, a semiconductor layer extending in a first direction from the underlying layer to the second electrode, and a memory film provided between each of the first electrodes and the semiconductor layer. The semiconductor layer includes a first portion adjacent to the first electrodes and a second portion adjacent to the second electrode. The second portion has a thickness thinner than a thickness of the first portion in a second direction perpendicular to the first direction.Type: GrantFiled: May 14, 2019Date of Patent: February 9, 2021Assignee: Toshiba Memory CorporationInventors: Takashi Ishida, Yoshiaki Fukuzumi, Takayuki Okada, Masaki Tsuji
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Publication number: 20200303393Abstract: A semiconductor memory device according to an embodiment includes a semiconductor substrate; a laminated body formed by laminating a plurality of electrode layers on the semiconductor substrate; a memory film provided in the laminated body and including a first block insulation film disposed in a direction perpendicular to the electrode layer, a charge storage film facing the first block insulation film, a tunnel insulation film facing the charge storage film, and a channel film facing the tunnel insulation film; and a barrier layer provided at at least one of interface between the plurality of electrode layers and the memory film and an interface in the memory film and mainly composed of carbon.Type: ApplicationFiled: September 12, 2019Publication date: September 24, 2020Applicant: Toshiba Memory CorporationInventors: Ryota Fujitsuka, Kenta Yamada, Takanori Yamanaka, Takayuki Okada, Hirokazu Ishigaki, Hiroki Kishi, Nobushi Matsuura, Takashi Yamane, Ryota Suzuki
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Publication number: 20200281152Abstract: A livestock stall system which can take measures against the cold of winter and against the heat of summer while preventing worsening of the condition of the litter (the flooring) and maintaining a favorable environment inside the livestock stall. This livestock stall system includes a livestock stall in which livestock is raised, and a second pipe which is arranged so as to pass beneath the floor of the livestock stall and which adjusts the temperature of the floor surface of the livestock stall by circulating a medium through the inside of the pipe.Type: ApplicationFiled: October 31, 2018Publication date: September 10, 2020Applicant: MAYEKAWA MFG. CO., LTD.Inventors: Kiyoshi HIGUCHI, Hidehiro KITAYAMA, Kazutoshi ITO, Takayuki OKADA
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Publication number: 20200075217Abstract: A ceramic multilayer body includes an outer layer including a first ceramic base material, a hollow portion provided in an inner side of the outer layer, an intermediate layer including a second ceramic base material and provided inside the hollow portion, and a pair of coupling portions each coupling one of both principal surfaces of the intermediate layer to the outer layer, wherein a void is provided by the hollow portion between the outer layer and the intermediate layer except for regions occupied by the coupling portions, and wherein, when observed through the ceramic multilayer body in the lamination direction, the pair of coupling portions at least partially overlap with each other, and areas of the pair of coupling portions are each smaller than an area of the intermediate layer. The first ceramic base material and the second ceramic base material have different material compositions from each other.Type: ApplicationFiled: November 11, 2019Publication date: March 5, 2020Inventors: Takayuki OKADA, Daigo MATSUBARA
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Publication number: 20190267398Abstract: According to an embodiment, a non-volatile memory device includes first electrodes stacked on an underlying layer, a second electrode provided on the first electrodes, a semiconductor layer extending in a first direction from the underlying layer to the second electrode, and a memory film provided between each of the first electrodes and the semiconductor layer. The semiconductor layer includes a first portion adjacent to the first electrodes and a second portion adjacent to the second electrode. The second portion has a thickness thinner than a thickness of the first portion in a second direction perpendicular to the first direction.Type: ApplicationFiled: May 14, 2019Publication date: August 29, 2019Applicant: Toshiba Memory CorporationInventors: Takashi ISHIDA, Yoshiaki FUKUZUMI, Takayuki OKADA, Masaki TSUJI
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Patent number: 10340285Abstract: According to an embodiment, a non-volatile memory device includes first electrodes stacked on an underlying layer, a second electrode provided on the first electrodes, a semiconductor layer extending in a first direction from the underlying layer to the second electrode, and a memory film provided between each of the first electrodes and the semiconductor layer. The semiconductor layer includes a first portion adjacent to the first electrodes and a second portion adjacent to the second electrode. The second portion has a thickness thinner than a thickness of the first portion in a second direction perpendicular to the first direction.Type: GrantFiled: March 22, 2018Date of Patent: July 2, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Takashi Ishida, Yoshiaki Fukuzumi, Takayuki Okada, Masaki Tsuji