Patents by Inventor Takayuki Okada

Takayuki Okada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190267398
    Abstract: According to an embodiment, a non-volatile memory device includes first electrodes stacked on an underlying layer, a second electrode provided on the first electrodes, a semiconductor layer extending in a first direction from the underlying layer to the second electrode, and a memory film provided between each of the first electrodes and the semiconductor layer. The semiconductor layer includes a first portion adjacent to the first electrodes and a second portion adjacent to the second electrode. The second portion has a thickness thinner than a thickness of the first portion in a second direction perpendicular to the first direction.
    Type: Application
    Filed: May 14, 2019
    Publication date: August 29, 2019
    Applicant: Toshiba Memory Corporation
    Inventors: Takashi ISHIDA, Yoshiaki FUKUZUMI, Takayuki OKADA, Masaki TSUJI
  • Patent number: 10340285
    Abstract: According to an embodiment, a non-volatile memory device includes first electrodes stacked on an underlying layer, a second electrode provided on the first electrodes, a semiconductor layer extending in a first direction from the underlying layer to the second electrode, and a memory film provided between each of the first electrodes and the semiconductor layer. The semiconductor layer includes a first portion adjacent to the first electrodes and a second portion adjacent to the second electrode. The second portion has a thickness thinner than a thickness of the first portion in a second direction perpendicular to the first direction.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: July 2, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takashi Ishida, Yoshiaki Fukuzumi, Takayuki Okada, Masaki Tsuji
  • Publication number: 20180211971
    Abstract: According to an embodiment, a non-volatile memory device includes first electrodes stacked on an underlying layer, a second electrode provided on the first electrodes, a semiconductor layer extending in a first direction from the underlying layer to the second electrode, and a memory film provided between each of the first electrodes and the semiconductor layer. The semiconductor layer includes a first portion adjacent to the first electrodes and a second portion adjacent to the second electrode. The second portion has a thickness thinner than a thickness of the first portion in a second direction perpendicular to the first direction.
    Type: Application
    Filed: March 22, 2018
    Publication date: July 26, 2018
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Takashi ISHIDA, Yoshiaki Fukuzumi, Takayuki Okada, Masaki Tsuji
  • Patent number: 9991278
    Abstract: According to an embodiment, a non-volatile memory device includes first electrodes stacked on an underlying layer, a second electrode provided on the first electrodes, a semiconductor layer extending in a first direction from the underlying layer to the second electrode, and a memory film provided between each of the first electrodes and the semiconductor layer. The semiconductor layer includes a first portion adjacent to the first electrodes and a second portion adjacent to the second electrode. The second portion has a thickness thinner than a thickness of the first portion in a second direction perpendicular to the first direction.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: June 5, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takashi Ishida, Yoshiaki Fukuzumi, Takayuki Okada, Masaki Tsuji
  • Patent number: 9953757
    Abstract: In a laminated coil component include coil conductors are respectively included on magnetic layers and a carbon paste is included on a magnetic layer. The coil conductors include a partial coil conductor and a partial coil conductor respectively corresponding to an outer side portion circle and an inner side portion circle defining two circles. A width of the carbon paste at least partially overlaps an interval between the outer side portion circle and the inner side portion circle defining the two circles, and extends circularly along the two circles. The carbon paste is shifted to the interval between the outer side portion circle and the inner side portion circle defining the two circles at the time of pressure-bonding the magnetic layers. The carbon paste vanishes when being calcined to define an air gap.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: April 24, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kazuki Eshima, Tomoya Yokoyama, Takayuki Okada
  • Patent number: 9725596
    Abstract: Provided is a polyarylene sulfide resin composition including a polyarylene sulfide resin, an epoxy resin, glass fiber, and glass flake. The amount of the epoxy resin is 0.5 to 20 parts by mass, the amount of the glass fiber is 10 to 350 parts by mass, and the amount of the glass flake is 1 to 250 parts by mass relative to 100 parts by mass of the polyarylene sulfide resin. The epoxy resin is a combination of a bisphenol-type epoxy resin and a novolac-type epoxy resin. Also provided is a molded body formed by melt-molding the resin composition. The resin composition has good adhesiveness to epoxy resins and good flowability. Furthermore, a molded body having high thermal shock resistance can be produced using the resin composition.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: August 8, 2017
    Assignee: DIC Corporation
    Inventors: Masanori Uchigata, Takayuki Okada, Taku Shimaya
  • Publication number: 20170125155
    Abstract: A multilayer coil component includes coil conductors including silver planar conductors and ferrite layers containing copper and stacked with the coil conductors and the planar conductors interposed therebetween. The coil conductors define a portion of a coil with a winding axis extending in a lamination direction. The planar conductors are arranged in the lamination direction at a position on an upper side of the coil so that each of principal surfaces thereof faces in the lamination direction and a specific region of the principal surface overlaps with the coil when viewed from the lamination direction. Each of the planar conductors includes first through holes penetrating the principal surface in the lamination direction in the specific region.
    Type: Application
    Filed: January 17, 2017
    Publication date: May 4, 2017
    Inventors: Tomoya YOKOYAMA, Takayuki OKADA
  • Publication number: 20170104001
    Abstract: According to an embodiment, a non-volatile memory device includes first electrodes stacked on an underlying layer, a second electrode provided on the first electrodes, a semiconductor layer extending in a first direction from the underlying layer to the second electrode, and a memory film provided between each of the first electrodes and the semiconductor layer. The semiconductor layer includes a first portion adjacent to the first electrodes and a second portion adjacent to the second electrode. The second portion has a thickness thinner than a thickness of the first portion in a second direction perpendicular to the first direction.
    Type: Application
    Filed: December 22, 2016
    Publication date: April 13, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takashi ISHIDA, Yoshiaki FUKUZUMI, Takayuki OKADA, Masaki TSUJI
  • Patent number: 9583505
    Abstract: According to an embodiment, a non-volatile memory device includes first electrodes stacked on an underlying layer, a second electrode provided on the first electrodes, a semiconductor layer extending in a first direction from the underlying layer to the second electrode, and a memory film provided between each of the first electrodes and the semiconductor layer. The semiconductor layer includes a first portion adjacent to the first electrodes and a second portion adjacent to the second electrode. The second portion has a thickness thinner than a thickness of the first portion in a second direction perpendicular to the first direction.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: February 28, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Ishida, Yoshiaki Fukuzumi, Takayuki Okada, Masaki Tsuji
  • Publication number: 20170053727
    Abstract: In a laminated coil component include coil conductors are respectively included on magnetic layers and a carbon paste is included on a magnetic layer. The coil conductors include a partial coil conductor and a partial coil conductor respectively corresponding to an outer side portion circle and an inner side portion circle defining two circles. A width of the carbon paste at least partially overlaps an interval between the outer side portion circle and the inner side portion circle defining the two circles, and extends circularly along the two circles. The carbon paste is shifted to the interval between the outer side portion circle and the inner side portion circle defining the two circles at the time of pressure-bonding the magnetic layers. The carbon paste vanishes when being calcined to define an air gap.
    Type: Application
    Filed: November 7, 2016
    Publication date: February 23, 2017
    Inventors: Kazuki ESHIMA, Tomoya YOKOYAMA, Takayuki OKADA
  • Patent number: 9511080
    Abstract: The present invention provides compositions, methods of manufacture, process and uses for diagnosing, preventing, inhibiting, and treating the development and proliferation of diseases and disorders associated with Okadaella gastrococcus (Og) bacterial infection in a patient.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: December 6, 2016
    Assignee: Okada Medical Services Pty Ltd
    Inventor: Takayuki Okada
  • Patent number: 9324406
    Abstract: According to one embodiment, a semiconductor memory device includes a memory cell and a control circuit. The memory cell is such that a ferroelectric film is provided as a gate dielectric film. When data is stored in the memory cell, the control circuit applies a first voltage to the gate dielectric film and thereafter applies a second voltage, whose amplitude is smaller than that of the first voltage and whose polarity is opposite to that of the first voltage.
    Type: Grant
    Filed: January 8, 2015
    Date of Patent: April 26, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Susumu Shuto, Takayuki Okada, Iwao Kunishima
  • Publication number: 20160064041
    Abstract: According to one embodiment, a semiconductor memory device includes a substrate; a memory cell array including a plurality of memory cells stacked on the substrate; an inter-layer insulating layer provided on the memory cell array; and a first control circuit. The first control circuit includes a first transistor and first semiconductor layer, a number of a grain boundary of the first semiconductor layer is not less than a number of a grain boundary of the substrate, and the first control circuit is provided on the inter-layer insulating layer and electrically connected to the memory cells.
    Type: Application
    Filed: December 10, 2014
    Publication date: March 3, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takayuki OKADA, Yoshiaki FUKUZUMI, Hideaki AOCHI
  • Publication number: 20150357343
    Abstract: According to an embodiment, a non-volatile memory device includes first electrodes stacked on an underlying layer, a second electrode provided on the first electrodes, a semiconductor layer extending in a first direction from the underlying layer to the second electrode, and a memory film provided between each of the first electrodes and the semiconductor layer. The semiconductor layer includes a first portion adjacent to the first electrodes and a second portion adjacent to the second electrode. The second portion has a thickness thinner than a thickness of the first portion in a second direction perpendicular to the first direction.
    Type: Application
    Filed: September 11, 2014
    Publication date: December 10, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takashi ISHIDA, Yoshiaki Fukuzumi, Takayuki Okada, Masaki Tsuji
  • Patent number: 9118847
    Abstract: The present invention includes: LCDs (47, 48, 49) corresponding to red, green, and blue, respectively; an air duct for red, an air duct for green, and an air duct for blue provided to blow cooling air to the LCDs (47, 48, 49), respectively; air filters (43, 50) provided in each of the air duct for red, the air duct for green, and the air duct for blue; and air filters (41, 42) provided in at least one air duct of the air duct for green and the air duct for blue and having filter mesh size smaller than that of the air filters (43, 50).
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: August 25, 2015
    Assignee: NEC DISPLAY SOLUTIONS, LTD.
    Inventors: Yusuke Tani, Takayuki Okada
  • Patent number: 9048424
    Abstract: The method of manufacturing a semiconductor device selectively forms a resist film on the multilayer gate film and the gate side wall insulating film extending on the semiconductor substrate. An upper part of the gate side wall insulating film and the hard mask film selectively are removed by etching using the resist film as a mask so as to expose a surface of the metal film. the metal film and the barrier metal film adjoining the metal film are removed, by wet etching. After the removal of the resist film, embedding a space formed by removal of the metal film and the barrier metal film and depositing a pre-metal dielectric to a level higher than an upper surface of the remaining hard mask film. A top part of the pre-metal dielectric is planarized by CMP using the remaining hard mask film as a stopper.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: June 2, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takayuki Okada, Tetsu Morooka
  • Patent number: 9039192
    Abstract: A projection display device projects light modulated based on a video signal. The projection display device includes a light source, a first fan for cooling the light source, and a second fan different from the first fan. The number of revolutions of the first fan is increased or decreased with the increase or decrease of the output of the light source. The number of revolutions of the second fan is decreased when the number of revolutions of the first fan is increased, and increased when the number of revolutions of the first fan is decreased.
    Type: Grant
    Filed: November 24, 2009
    Date of Patent: May 26, 2015
    Assignee: NEC Display Solutions, Ltd.
    Inventors: Shunsuke Okazawa, Takayuki Okada
  • Patent number: 9022574
    Abstract: Provided is a projection type display device that has dust-proof and coolable optical components. According to an aspect of the present invention, the display device includes a case, a dust-proof structure that has a plurality of walls surrounding a plurality of optical components to prevent dust, and which is located in the case, and suction ports (7b and 7b?) formed in the case and configured to suck cooling air along one wall of the dust-proof structure to cool the optical components. The suction ports are separated into first suction port (7b) and second suction port (7b?) with a position of one wall set as a reference. First suction port (7b) is located to blow the cooling air to the dust-proof structure, while second suction port (7b?) is located to prevent direct blowing of the cooling air to the dust-proof structure. An area of first suction port (7b) is smaller than that of second suction port (7b?).
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: May 5, 2015
    Assignee: NEC Display Solutions, Ltd.
    Inventors: Yoshifumi Nishimura, Takayuki Okada
  • Publication number: 20150117085
    Abstract: According to one embodiment, a semiconductor memory device includes a memory cell and a control circuit. The memory cell is such that a ferroelectric film is provided as a gate dielectric film. When data is stored in the memory cell, the control circuit applies a first voltage to the gate dielectric film and thereafter applies a second voltage, whose amplitude is smaller than that of the first voltage and whose polarity is opposite to that of the first voltage.
    Type: Application
    Filed: January 8, 2015
    Publication date: April 30, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Susumu SHUTO, Takayuki OKADA, Iwao KUNISHIMA
  • Publication number: 20150080498
    Abstract: Provided is a polyarylene sulfide resin composition including a polyarylene sulfide resin, an epoxy resin, glass fiber, and glass flake. The amount of the epoxy resin is 0.5 to 20 parts by mass, the amount of the glass fiber is 10 to 350 parts by mass, and the amount of the glass flake is 1 to 250 parts by mass relative to 100 parts by mass of the polyarylene sulfide resin. The epoxy resin is a combination of a bisphenol-type epoxy resin and a novolac-type epoxy resin. Also provided is a molded body formed by melt-molding the resin composition. The resin composition has good adhesiveness to epoxy resins and good flowability. Furthermore, a molded body having high thermal shock resistance can be produced using the resin composition.
    Type: Application
    Filed: March 22, 2013
    Publication date: March 19, 2015
    Inventors: Masanori Uchigata, Takayuki Okada, Taku Shimaya