Patents by Inventor Taro Nishiguchi
Taro Nishiguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11984480Abstract: A silicon carbide epitaxial substrate includes a silicon carbide substrate, a first silicon carbide epitaxial layer, and a second silicon carbide epitaxial layer. The silicon carbide substrate has a first main surface and a second main surface opposite to the first main surface. The first silicon carbide epitaxial layer is in contact with a whole of the first main surface. The second silicon carbide epitaxial layer is in contact with a whole of the second main surface. A carrier concentration of the silicon carbide substrate is higher than a carrier concentration of each of the first silicon carbide epitaxial layer and the second silicon carbide epitaxial layer.Type: GrantFiled: June 2, 2020Date of Patent: May 14, 2024Assignee: Sumitomo Electronic Industries, Ltd.Inventors: Taro Enokizono, Tsutomu Hori, Taro Nishiguchi
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Publication number: 20240026569Abstract: A silicon carbide epitaxial substrate includes a silicon carbide substrate, a silicon carbide epitaxial film. The silicon carbide epitaxial film is on the silicon carbide substrate. The first extended defect is in the silicon carbide epitaxial film. The first extended defect includes a particle, a triangular defect extending from the particle along an off-direction, and a basal plane dislocation originating from the particle and having a portion extending along a direction perpendicular to each of a thickness direction of the silicon carbide substrate and the off-direction. In the direction perpendicular to each of the thickness direction of the silicon carbide substrate and the off-direction, an extended width of the basal plane dislocation is twice or more a base width of the triangular defect. In a second main surface, an area density of the basal plane dislocation included in the first extended defect is 3/cm2 or less.Type: ApplicationFiled: September 2, 2021Publication date: January 25, 2024Inventors: Hiroki NISHIHARA, Takaya MIYASE, Taro NISHIGUCHI
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Publication number: 20230369411Abstract: A method of manufacturing a silicon carbide semiconductor device includes the following steps. In a silicon carbide substrate including a silicon carbide single-crystal substrate and a silicon carbide epitaxial film provided on the silicon carbide single-crystal substrate, a reference mark serving as a reference of two dimensional position coordinates is formed. After forming the reference mark, at least one of polishing or cleaning is performed on a reference mark formation surface of the silicon carbide substrate. Position coordinates of a defect present in the silicon carbide substrate are specified based on the reference mark. A device active region is formed in the silicon carbide substrate. Position coordinates of the device active region are specified based on the reference mark. A pass/fail judgement of the device active region is made by associating the position coordinates of the defect with the position of the device active region.Type: ApplicationFiled: July 27, 2021Publication date: November 16, 2023Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Takashi SAKURADA, Taro NISHIGUCHI, Tetsuro KONDO, Naoki MATSUMOTO, Makoto SASAKI, Hirofumi YAMAMOTO
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Publication number: 20230272550Abstract: When an area density of a first protrusion present in a central region is denoted by Xa, an area density of a second protrusion present in the central region is denoted by Xb, an area density of a third protrusion present in the central region is denoted by Xc, an area density of a fourth protrusion present in an outer circumferential region is denoted by Ya, an area density of a fifth protrusion present in the outer circumferential region is denoted by Yb, and an area density of a sixth protrusion present in the outer circumferential region is denoted by Yc, as viewed in a thickness direction of a silicon carbide substrate, the first protrusion and the fourth protrusion each have an area of 100 ?m2 or more and less than 1,000 ?m2.Type: ApplicationFiled: June 29, 2021Publication date: August 31, 2023Inventors: Takaya MIYASE, Taro NISHIGUCHI
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Publication number: 20230261057Abstract: A silicon carbide epitaxial substrate according to the present disclosure includes: a silicon carbide substrate; a first silicon carbide epitaxial layer disposed on the silicon carbide substrate; and a second silicon carbide epitaxial layer disposed on the first silicon carbide epitaxial layer. When an area density of first particles in the first silicon carbide epitaxial layer is defined as a first area density and an area density of second particles in the second silicon carbide epitaxial layer is defined as a second area density, a value determined by dividing the first area density by the second area density is more than 0.5 and less than 1. The first particles and the second particles each have a maximum diameter of 2 ?m to 50 ?m.Type: ApplicationFiled: May 20, 2021Publication date: August 17, 2023Inventor: Taro NISHIGUCHI
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SILICON CARBIDE EPITAXIAL SUBSTRATE AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
Publication number: 20230059737Abstract: A silicon carbide epitaxial substrate according to a present disclosure includes a silicon carbide substrate and a silicon carbide epitaxial layer disposed on the silicon carbide substrate. The silicon carbide epitaxial layer includes a boundary surface in contact with the silicon carbide substrate and a main surface opposite to the boundary surface. The main surface has an outer circumferential edge, an outer circumferential region extending within 5 mm from the outer circumferential edge, and a central region surrounded by the outer circumferential region. When an area density of double Shockley stacking faults in the outer circumferential region is defined as a first area density, and an area density of double Shockley stacking faults in the central region is defined as a second area density, the first area density is five or more times as large as the second area density, the second area density is 0.2 cm?2 or more.Type: ApplicationFiled: January 19, 2021Publication date: February 23, 2023Inventors: Hironori ITOH, Taro NISHIGUCHI, Takashi SAKURADA -
Patent number: 11530491Abstract: A silicon carbide epitaxial substrate includes a silicon carbide single crystal substrate and a silicon carbide layer. In a direction parallel to a central region, a ratio of a standard deviation of a carrier concentration of the silicon carbide layer to an average value of the carrier concentration of the silicon carbide layer is less than 5%. The average value of the carrier concentration is more than or equal to 1×1014 cm?3 and less than or equal to 5×1016 cm?3. In the direction parallel to the central region, a ratio of a standard deviation of a thickness of the silicon carbide layer to an average value of the thickness of the silicon carbide layer is less than 5%. The central region has an arithmetic mean roughness (Sa) of less than or equal to 1 nm. The central region has a haze of less than or equal to 50.Type: GrantFiled: June 3, 2021Date of Patent: December 20, 2022Assignee: Sumitomo Electric Industries, Ltd.Inventors: Keiji Wada, Tsutomu Hori, Taro Nishiguchi
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Patent number: 11242618Abstract: A silicon carbide substrate capable of stably forming a device of excellent performance, and a method of manufacturing the same are provided. A silicon carbide substrate is made of a single crystal of silicon carbide, and has a width of not less than 100 mm, a micropipe density of not more than 7 cm?2, a threading screw dislocation density of not more than 1×104 cm?2, a threading edge dislocation density of not more than 1×104 cm?2, a basal plane dislocation density of not more than 1×104 cm?2, a stacking fault density of not more than 0.1 cm?1, a conductive impurity concentration of not less than 1×1018 cm?3, a residual impurity concentration of not more than 1×1016 cm?3, and a secondary phase inclusion density of not more than 1 cm?3.Type: GrantFiled: December 22, 2015Date of Patent: February 8, 2022Assignee: Sumitomo Electric Industries, Ltd.Inventors: Shin Harada, Shinsuke Fujiwara, Taro Nishiguchi
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Publication number: 20210328024Abstract: A silicon carbide epitaxial substrate includes a silicon carbide substrate, a first silicon carbide epitaxial layer, and a second silicon carbide epitaxial layer. The silicon carbide substrate has a first main surface and a second main surface opposite to the first main surface. The first silicon carbide epitaxial layer is in contact with a whole of the first main surface. The second silicon carbide epitaxial layer is in contact with a whole of the second main surface. A carrier concentration of the silicon carbide substrate is higher than a carrier concentration of each of the first silicon carbide epitaxial layer and the second silicon carbide epitaxial layer.Type: ApplicationFiled: June 2, 2020Publication date: October 21, 2021Inventors: Taro ENOKIZONO, Tsutomu HORI, Taro NISHIGUCHI
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Publication number: 20210296443Abstract: A silicon carbide epitaxial substrate includes a silicon carbide single crystal substrate and a silicon carbide layer. In a direction parallel to a central region, a ratio of a standard deviation of a carrier concentration of the silicon carbide layer to an average value of the carrier concentration of the silicon carbide layer is less than 5%. The average value of the carrier concentration is more than or equal to 1×1014 cm?3 and less than or equal to 5×1016 cm?3. In the direction parallel to the central region, a ratio of a standard deviation of a thickness of the silicon carbide layer to an average value of the thickness of the silicon carbide layer is less than 5%. The central region has an arithmetic mean roughness (Sa) of less than or equal to 1 nm. The central region has a haze of less than or equal to 50.Type: ApplicationFiled: June 3, 2021Publication date: September 23, 2021Applicant: Sumitomo Electric Industries, Ltd.Inventors: Keiji Wada, Tsutomu Hori, Taro Nishiguchi
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Patent number: 11053607Abstract: A silicon carbide epitaxial substrate includes a silicon carbide single crystal substrate and a silicon carbide layer. In a direction parallel to a central region, a ratio of a standard deviation of a carrier concentration of the silicon carbide layer to an average value of the carrier concentration of the silicon carbide layer is less than 5%. The average value of the carrier concentration is more than or equal to 1×1014 cm?3 and less than or equal to 5×1016 cm?3. In the direction parallel to the central region, a ratio of a standard deviation of a thickness of the silicon carbide layer to an average value of the thickness of the silicon carbide layer is less than 5%. The central region has an arithmetic mean roughness (Sa) of less than or equal to 1 nm. The central region has a haze of less than or equal to 50.Type: GrantFiled: October 11, 2016Date of Patent: July 6, 2021Assignee: Sumitomo Electric Industries, Ltd.Inventors: Keiji Wada, Tsutomu Hori, Taro Nishiguchi
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Patent number: 11004941Abstract: A silicon carbide epitaxial substrate has a silicon carbide single-crystal substrate and a silicon carbide layer. An average value of carrier concentration in the silicon carbide layer is not less than 1×1015 cm?3 and not more than 5×1016 cm?3. In-plane uniformity of the carrier concentration is not more than 2%. The second main surface has: a groove 80 extending in one direction along the second main surface, a width of the groove in the one direction being twice or more as large as a width thereof in a direction perpendicular to the one direction, and a maximum depth of the groove from the second main surface being not more than 10 nm; and a carrot defect. A value obtained by dividing a number of the carrot defects by a number of the grooves is not more than 1/500.Type: GrantFiled: August 6, 2020Date of Patent: May 11, 2021Assignee: Sumitomo Electric Industries, Ltd.Inventors: Keiji Wada, Hironori Itoh, Taro Nishiguchi
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Publication number: 20200365693Abstract: A silicon carbide epitaxial substrate has a silicon carbide single-crystal substrate and a silicon carbide layer. An average value of carrier concentration in the silicon carbide layer is not less than 1×1015 cm?3 and not more than 5×1016 cm?3. In-plane uniformity of the carrier concentration is not more than 2%. The second main surface has: a groove 80 extending in one direction along the second main surface, a width of the groove in the one direction being twice or more as large as a width thereof in a direction perpendicular to the one direction, and a maximum depth of the groove from the second main surface being not more than 10 nm; and a carrot defect. A value obtained by dividing a number of the carrot defects by a number of the grooves is not more than 1/500.Type: ApplicationFiled: August 6, 2020Publication date: November 19, 2020Applicant: Sumitomo Electric Industries, Ltd.Inventors: Keiji Wada, Hironori ltoh, Taro Nishiguchi
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Patent number: 10770550Abstract: A silicon carbide epitaxial substrate has a silicon carbide single-crystal substrate and a silicon carbide layer. An average value of carrier concentration in the silicon carbide layer is not less than 1×1015 cm?3 and not more than 5×1016 cm?3. In-plane uniformity of the carrier concentration is not more than 2%. The second main surface has: a groove 80 extending in one direction along the second main surface, a width of the groove in the one direction being twice or more as large as a width thereof in a direction perpendicular to the one direction, and a maximum depth of the groove from the second main surface being not more than 10 nm; and a carrot defect. A value obtained by dividing a number of the carrot defects by a number of the grooves is not more than 1/500.Type: GrantFiled: October 23, 2019Date of Patent: September 8, 2020Assignee: Sumitomo Electric Industries, Ltd.Inventors: Keiji Wada, Hironori Itoh, Taro Nishiguchi
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Patent number: 10741683Abstract: A semiconductor device has a semiconductor layer and a substrate. The semiconductor layer constitutes at least a part of a current path, and is made of silicon carbide. The substrate has a first surface supporting the semiconductor layer, and a second surface opposite to the first surface. Further, the substrate is made of silicon carbide having a 4H type single-crystal structure. Further, the substrate has a physical property in which a ratio of a peak strength in a wavelength of around 500 nm to a peak strength in a wavelength of around 390 nm is 0.1 or smaller in photoluminescence measurement. In this way, the semiconductor device is obtained to have a low on-resistance.Type: GrantFiled: March 12, 2018Date of Patent: August 11, 2020Assignee: Sumitomo Electric Industries, Ltd.Inventors: Shin Harada, Makoto Sasaki, Taro Nishiguchi, Kyoko Okita, Keiji Wada, Tomihito Miyazaki
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Patent number: 10734222Abstract: A semiconductor stack includes a substrate made of silicon carbide, and an epi layer disposed on the substrate and made of silicon carbide. An epi principal surface, which is a principal surface opposite to the substrate, of the epi layer is a carbon surface having an off angle of 4° or smaller relative to a c-plane. In the epi principal surface, a plurality of first recessed portions having a rectangular circumferential shape in a planar view is formed. Density of a second recessed portion that is formed in the first recessed portions and is a recessed portion deeper than the first recessed portions is lower than or equal to 10 cm?2 in the epi principal surface.Type: GrantFiled: January 17, 2020Date of Patent: August 4, 2020Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Taro Nishiguchi, Yu Saitoh, Hirofumi Yamamoto
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Publication number: 20200152457Abstract: A semiconductor stack includes a substrate made of silicon carbide, and an epi layer disposed on the substrate and made of silicon carbide. An epi principal surface, which is a principal surface opposite to the substrate, of the epi layer is a carbon surface having an off angle of 4° or smaller relative to a c-plane. In the epi principal surface, a plurality of first recessed portions having a rectangular circumferential shape in a planar view is formed. Density of a second recessed potion that is formed in the first recessed portions and is a recessed portion deeper than the first recessed portions is lower than or equal to 10 cm?2 in the epi principal surface.Type: ApplicationFiled: January 17, 2020Publication date: May 14, 2020Inventors: Taro Nishiguchi, Yu Saitoh, Hirofumi Yamamoto
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Patent number: 10612160Abstract: An epitaxial wafer includes a silicon carbide film having a first main surface. A groove portion is formed in the first main surface. The groove portion extends in one direction along the first main surface. Moreover, a width of the groove portion in the one direction is twice or more as large as a width of the groove portion in a direction perpendicular to the one direction. Moreover, a maximum depth of the groove portion from the first main surface is not more than 10 nm.Type: GrantFiled: March 23, 2018Date of Patent: April 7, 2020Assignee: Sumitomo Electric Industries, Ltd.Inventors: Taro Nishiguchi, Jun Genba, Hironori Itoh, Tomoaki Hatayama, Hideyuki Doi
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Patent number: 10580647Abstract: A semiconductor stack includes a substrate made of silicon carbide, and an epi layer disposed on the substrate and made of silicon carbide. An epi principal surface, which is a principal surface opposite to the substrate, of the epi layer is a carbon surface having an off angle of 4° or smaller relative to a c-plane. In the epi principal surface, a plurality of first recessed portions having a rectangular circumferential shape in a planar view is formed. Density of a second recessed potion that is formed in the first recessed portions and is a recessed portion deeper than the first recessed portions is lower than or equal to 10 cm?2 in the epi principal surface.Type: GrantFiled: July 16, 2019Date of Patent: March 3, 2020Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Taro Nishiguchi, Yu Saitoh, Hirofumi Yamamoto
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SILICON CARBIDE EPITAXIAL SUBSTRATE AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
Publication number: 20200052074Abstract: A silicon carbide epitaxial substrate has a silicon carbide single-crystal substrate and a silicon carbide layer. An average value of carrier concentration in the silicon carbide layer is not less than 1×1015 cm?3 and not more than 5×1016 cm?3. In-plane uniformity of the carrier concentration is not more than 2%. The second main surface has: a groove 80 extending in one direction along the second main surface, a width of the groove in the one direction being twice or more as large as a width thereof in a direction perpendicular to the one direction, and a maximum depth of the groove from the second main surface being not more than 10 nm; and a carrot defect. A value obtained by dividing a number of the carrot defects by a number of the grooves is not more than 1/500.Type: ApplicationFiled: October 23, 2019Publication date: February 13, 2020Applicant: Sumitomo Electric Industries, Ltd.Inventors: Keiji Wada, Hironori Itoh, Taro Nishiguchi