Abstract: A method of manufacturing a super-junction semiconductor device is disclosed that allows forming a high concentration layer with high precision and improves the trade-off relationship between the Eoff and the dV/dt. The method comprises a step of forming a parallel pn layer and a step of forming a proton irradiated layer in the upper region of the pn layer. Then, heat treatment is conducted on the proton irradiated layer for transforming the protons into donors to form a high concentration n type semiconductor layer.

Abstract: A semiconductor device and method of manufacturing the semiconductor device is disclosed in which the tradeoff relationship between the Eoff and the turning OFF dV/dt is improved at a low cost using a trench embedding method. The method comprises a step of forming a parallel pn layer that is a superjunction structure using a trench embedding method and a step of ion implantation into an upper part of an n type semiconductor layer, i.e., an n type column, forming a high concentration n type semiconductor region. This method improves the trade-off relationship between the Eoff and the turning OFF dV/dt as compared with a high concentration n type semiconductor region formed of an epitaxial layer. This method achieves shorter process time and lower cost in manufacturing because it eliminates the redundant repeating of steps performed in the conventional method of forming a superjunction structure through multi-stage epitaxial growth.

Abstract: A semiconductor device and method of manufacturing the semiconductor device is disclosed in which the tradeoff relationship between the Eoff and the turning OFF dV/dt is improved at a low cost using a trench embedding method. The method comprises a step of forming a parallel pn layer that is a superjunction structure using a trench embedding method and a step of ion implantation into an upper part of an n type semiconductor layer, i.e., an n type column, forming a high concentration n type semiconductor region. This method improves the trade-off relationship between the Eoff and the turning OFF dV/dt as compared with a high concentration n type semiconductor region formed of an epitaxial layer. This method achieves shorter process time and lower cost in manufacturing because it eliminates the redundant repeating of steps performed in the conventional method of forming a superjunction structure through multi-stage epitaxial growth.

Abstract: A combined semiconductor device performs low conduction loss and low recovery loss characteristics suited to a circuit technology in a soft switching mode at a low cost. The device has a SJ-MOSFET and a wide band gap Schottky barrier diode connected in parallel to a built-in body diode in the SJ-MOSFET. The device includes a MOS type semiconductor element having a superjunction structure and a wide band gap Schottky barrier diode antiparallel-connected to the MOS type semiconductor element. The MOS type semiconductor element has a resistance section series-connected to a built-in body diode in the element. A resistance value of the resistance section is such a value that the forward voltage drop of the built-in body diode in the MOS type semiconductor element is higher than the forward voltage drop of the wide band gap Schottky barrier diode at a rated current of the MOS type semiconductor element.

Abstract: A semiconductor device is configured to prevent destruction of elements and/or miss-operation of the circuit by parasitic effects produced by parasitic transistors when a MOSFET of a bridge circuit is formed on a single chip. A Schottky junction is formed by providing an anode electrode in an n well region where a source region, a drain region, and a p well region of a lateral MOSFET. A Schottky barrier diode constituting a majority carrier device is connected in parallel with a PN junction capable of being forward-biased so that the PN junction is not forward-biased so that minority carriers are not generated, and thereby suppressing parasitic effects.

Abstract: A semiconductor device in includes a transistor and a surge absorption element such as Zener diode, that are formed on the same substrate and connected in parallel. The surge absorption element has a resistance during breakdown operation that is smaller than the resistance of the surge absorption element during breakdown operation of the transistor. In addition, the secondary breakdown current of the surge absorption element is larger than the secondary breakdown current of the transistor. Upon application of a high ESD voltage and high surge voltage, the energy of the ESD and surge is absorbed by operation of the surge absorption element and is limited to a voltage equal to or less than the breakdown voltage of the transistor, which would otherwise be destroyed.

Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.

Abstract: A semiconductor device having an alternating conductivity type layer improves the tradeoff between the on-resistance and the breakdown voltage and facilitates increasing the current capacity by reducing the on resistance while maintaining a high breakdown voltage. The semiconductor device includes a semiconductive substrate region, through which a current flows in the ON-state of the device and that is depleted in the OFF-state. The semiconductive substrate region includes a plurality of vertical alignments of n-type buried regions 32 and a plurality of vertical alignments of p-type buried regions. The vertically aligned n-type buried regions and the vertically aligned p-type buried regions are alternately arranged horizontally. The n-type buried regions and p-type buried regions are formed by diffusing respective impurities into highly resistive n-type layers 32a laminated one by one epitaxially.

Abstract: A semiconductor device realizes a high electrostatic discharge withstanding capability and a high surge withstanding capability within the narrow chip area of a lateral MOSFET used in integrated intelligent switching devices, double-integration-type signal input and transfer IC's, and combined power IC's. The semiconductor device includes a vertical bipolar transistor in which a base is electrically connected to an emitter and a collector, and a lateral MOSFET including a drain electrode connected to a surface electrode. The vertical bipolar transistor absorbs electrostatic discharge or surge energy when a high electrostatic discharge voltage or a high surge voltage is applied and limits the electrostatic discharge voltage or the surge voltage to be lower than the breakdown voltage of the lateral MOSFET.

Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.

Abstract: A high breakdown voltage junction terminating structure having a loop-like RESURF structure formed on a SOI substrate is disclosed. A lateral IGBT, a lateral FWD, an output stage element and a driving circuit are formed in the inside region of the structure. The lateral IGBT and the lateral FWD are surrounded by a trench isolation region as an insulation region. Drain electrodes of high breakdown voltage NMOSFETs are provided on the inside of the high breakdown voltage junction terminating structure. Along with this, a gate electrode and a source electrode of each of the NMOSFETs are provided on the outside of the high breakdown voltage junction terminating structure. The periphery of the high breakdown voltage junction terminating structure is surrounded by a trench isolation region as a second insulation region. A control circuit is provided on the outside of the second insulation region.

Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.

Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.

Abstract: Disclosed is a semiconductor device facilitating a peripheral portion thereof with a breakdown voltage higher than the breakdown voltage in the drain drift layer without employing a guard ring or field plate. A preferred embodiment includes a drain drift region with a first alternating conductivity type layer formed of n drift current path regions and p partition regions arranged alternately with each other, and a breakdown withstanding region with a second alternating conductivity type layer formed of n regions and p regions arranged alternately with each other, the breakdown withstanding region providing no current path in the ON-state of the device and being depleted in the OFF-state of the device. Since depletion layers expand in both directions from multiple pn-junctions into n regions and p regions in the OFF-state of the device, the adjacent areas of p-type base regions, the outer area of the semiconductor chip and the deep area of the semiconductor chip are depleted.

Abstract: Disclosed is a semiconductor device facilitating a peripheral portion thereof with a breakdown voltage higher than the breakdown voltage in the drain drift layer without employing a guard ring or field plate. A preferred embodiment includes a drain drift region with a first alternating conductivity type layer formed of n drift current path regions and p partition regions arranged alternately with each other, and a breakdown withstanding region with a second alternating conductivity type layer formed of n regions and p regions arranged alternately with each other, the breakdown withstanding region providing no current path in the ON-state of the device and being depleted in the OFF-state of the device. Since depletion layers expand in both directions from multiple pn-junctions into n regions and p regions in the OFF-state of the device, the adjacent areas of p-type base regions, the outer area of the semiconductor chip and the deep area of the semiconductor chip are depleted.

Abstract: A lateral semiconductor device includes an alternating conductivity type layer for providing a first semiconductor current path in the ON-state of the device and for being depleted in the OFF-state of the device, that has an improved structure for realizing a high breakdown voltage in the curved sections of the alternating conductivity type layer.

Abstract: A semiconductor device realizes a high electrostatic discharge withstanding capability and a high surge withstanding capability within the narrow chip area of a lateral MOSFET used in integrated intelligent switching devices, double-integration-type signal input and transfer IC's, and combined power IC's. The semiconductor device includes a vertical bipolar transistor in which a base is electrically connected to an emitter and a collector, and a lateral MOSFET including a drain electrode connected to a surface electrode. The vertical bipolar transistor absorbs electrostatic discharge or surge energy when a high electrostatic discharge voltage or a high surge voltage is applied and limits the electrostatic discharge voltage or the surge voltage to be lower than the breakdown voltage of the lateral MOSFET.

Abstract: A semiconductor device realizes a high electrostatic discharge withstanding capability and a high surge withstanding capability within the narrow chip area of a lateral MOSFET used in integrated intelligent switching devices, double-integration-type signal input and transfer IC's, and combined power IC's. The semiconductor device includes a vertical bipolar transistor in which a base is electrically connected to an emitter and a collector, and a lateral MOSFET including a drain electrode connected to a surface electrode. The vertical bipolar transistor absorbs electrostatic discharge or surge energy when a high electrostatic discharge voltage or a high surge voltage is applied and limits the electrostatic discharge voltage or the surge voltage to be lower than the breakdown voltage of the lateral MOSFET.

Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.

Abstract: A vertical MOS semiconductor device exhibits a high breakdown voltage and low on-resistance, reduces the tradeoff relation between the on-resistance and the breakdown voltage, and realizes high speed switching. The semiconductor device has a breakdown-voltage sustaining layer, such as an n?-type drift layer, and a well region, such as a p-type well region, in the breakdown-voltage sustaining layer. The resistivity ? (?cm) of the breakdown-voltage layer is within a range expressed in terms of the breakdown voltage Vbr (V). The semiconductor device also has stripe shaped surface drain regions that extend from the well region and are surrounded by the well region. The surface area ratio between surface drain regions and the well region, which includes the source region, is from 0.01 to 0.2.