Patents by Inventor Terry L. Gilton

Terry L. Gilton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6953720
    Abstract: The present invention provides a design for a PCRAM element which incorporates multiple metal-containing germanium-selenide glass layers of diverse stoichiometries. The present invention also provides a method of fabricating the disclosed PCRAM structure.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: October 11, 2005
    Assignee: Micron Technology, Inc.
    Inventors: John T. Moore, Terry L. Gilton, Kristy A. Campbell
  • Patent number: 6949402
    Abstract: A method of metal doping a chalcogenide material includes forming a metal over a substrate. A chalcogenide material is formed on the metal. Irradiating is conducted through the chalcogenide material to the metal effective to break a chalcogenide bond of the chalcogenide material at an interface of the metal and chalcogenide material and diffuse at least some of the metal outwardly into the chalcogenide material. A method of metal doping a chalcogenide material includes surrounding exposed outer surfaces of a projecting metal mass with chalcogenide material. Irradiating is conducted through the chalcogenide material to the projecting metal mass effective to break a chalcogenide bond of the chalcogenide material at an interface of the projecting metal mass outer surfaces and diffuse at least some of the projecting metal mass outwardly into the chalcogenide material. In certain aspects, the above implementations are incorporated in methods of forming non-volatile resistance variable devices.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: September 27, 2005
    Assignee: Micron Technology, Inc.
    Inventors: John T. Moore, Terry L. Gilton
  • Patent number: 6946347
    Abstract: A non-volatile memory cell utilizes a programmable conductor random access memory (PCRAM) structure instead of a polysilicon layer for a floating gate. Instead of storing or removing electrons from a floating gate, the programmable conductor is switched between its low and high resistive states to operate the flash memory cell. The resulting cell can be erased faster and has better endurance than a conventional flash memory cell.
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: September 20, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Terry L. Gilton
  • Patent number: 6933665
    Abstract: Improved methods and structures are provided for an array of vertical geometries which may be used as emitter tips, as a self aligned gate structure surrounding field emitter tips, or as part of a flat panel display. The present invention offers controlled size in emitter tip formation under a more streamlined process. The present invention further provides a more efficient method to control the gate to emitter tip proximity in field emission devices. The novel method of the present invention includes implanting a dopant in a patterned manner into the silicon substrate and anodizing the silicon substrate in a controlled manner causing a more heavily doped region in the silicon substrate to form a porous silicon region.
    Type: Grant
    Filed: July 9, 2002
    Date of Patent: August 23, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Terry L. Gilton, Paul A. Morgan
  • Patent number: 6912147
    Abstract: The invention is related to methods and apparatus for providing a two-terminal constant current device, and its operation thereof. The invention provides a constant current device that maintains a constant current over an applied voltage range of at least approximately 700 mV. The invention also provides a method of changing and resetting the constant current value in a constant current device by either applying a positive potential to decrease the constant current value, or by applying a voltage more negative than the existing constant current's voltage upper limit, thereby resetting or increasing its constant current level to its original fabricated value. The invention further provides a method of forming and converting a memory device into a constant current device. The invention also provides a method for using a constant current device as an analog memory device.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: June 28, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Kristy A. Campbell, Terry L. Gilton, John T. Moore, Joseph F. Brooks
  • Patent number: 6908808
    Abstract: A method for forming a multiple state memory cell is provided. The method including forming a first electrode layer from a first conductive material, forming a second electrode layer from a second conductive material, and forming a first layer of a metal-doped chalcogenide material on the first electrode layer. The first layer providing a medium in which a conductive growth can be formed to electrically couple together the first and second electrode layers. The method further includes forming a second layer of a metal-doped chalcogenide material on the second electrode layer, and forming a third electrode layer from a third conductive material, the second layer providing a medium in which a conductive growth can be formed to electrically couple together the second and third electrode layers. A method for storing multiple data states in a memory is also provided.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: June 21, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Terry L. Gilton
  • Patent number: 6903361
    Abstract: A non-volatile memory cell utilizes a programmable conductor random access memory (PCRAM) structure instead of a polysilicon layer for a floating gate. Instead of storing or removing electrons from a floating gate, the programmable conductor is switched between its low and high resistive states to operate the flash memory cell. The resulting cell can be erased faster and has better endurance than a conventional flash memory cell.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: June 7, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Terry L. Gilton
  • Patent number: 6891749
    Abstract: A resistance variable memory element and method for stabilizing the resistance variable memory element by providing a first and second electrode connected to a resistance variable material whereby the first and second electrodes comprise materials capable of providing a differential electrochemical potential across the resistance variable memory element which causes the resistance variable memory element to write to a predetermined “on” state. The resistance variable memory element is stabilized in a low resistance “on” state by the differential electrochemical potential. The first electrode preferably is a platinum electrode and the second electrode is preferably a silver electrode. The method and circuitry further includes a reverse refresh for stabilizing the resistance variable memory element in a high resistance state by applying a reverse voltage to the memory element.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: May 10, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Kristy A. Campbell, John T. Moore, Terry L. Gilton
  • Patent number: 6867114
    Abstract: The invention relates to the fabrication of a resistance variable material cell or programmable metallization cell. The processes described herein can form a metal-rich metal chalcogenide, such as, for example, silver-rich silver selenide. Advantageously, the processes can form the metal-rich metal chalcogenide without the use of photodoping techniques and without direct deposition of the metal. For example, the process can remove selenium from silver selenide. One embodiment of the process implants oxygen to silver selenide to form selenium oxide. The selenium oxide is then removed by annealing, which results in silver-rich silver selenide. Advantageously, the processes can dope silver into a variety of materials, including non-transparent materials, with relatively high uniformity and with relatively precise control.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: March 15, 2005
    Assignee: Micron Technology Inc.
    Inventors: John T. Moore, Terry L. Gilton, Kristy A. Campbell
  • Patent number: 6867996
    Abstract: A resistance variable memory element with improved data retention and switching characteristics switched between resistance memory states upon the application of write pulses having the same polarity. The resistance variable memory element can be provided having at least one silver-selenide layer in between glass layers, the glass layers are a chalcogenide glass having a GexSe100?x composition.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: March 15, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Kristy A. Campbell, John T. Moore, Terry L. Gilton
  • Patent number: 6867064
    Abstract: The present invention is related to methods of fabricating a resistance variable memory element and a device formed therefrom having improved switching characteristics. According to an embodiment of the present invention a resistance variable material memory element is annealed to remove stoichiometric amounts of a component of the resistance variable material. According to another embodiment of the present invention a silver-germanium-selenide glass is annealed for a duration of about 10 minutes in the presence of oxygen to drive off selenium and increase the rigidity of the glass.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: March 15, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Kristy A. Campbell, John Moore, Terry L. Gilton, Joseph F. Brooks
  • Patent number: 6864521
    Abstract: A method for controlling silver doping of a chalcogenide glass in a resistance variable memory element is disclosed herein. The method includes forming a thin metal containing layer having a thickness of less than about 250 Angstroms over a second chalcogenide glass layer, formed over a first metal containing layer, formed over a first chalcogenide glass layer. The thin metal containing layer preferably is a silver layer. An electrode may be formed over the thin silver layer. The electrode preferably does not contain silver.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: March 8, 2005
    Assignee: Micron Technology, Inc.
    Inventors: John T. Moore, Kristy A. Campbell, Terry L. Gilton
  • Patent number: 6864500
    Abstract: In programmable conductor memory cells, metal ions precipitate out of a glass electrolyte element in response to an applied electric field in one direction only, causing a conductive pathway to grow from cathode to anode. The amount of conductive pathway growth, and therefore the programming, depends, in part, on the availability of metal ions. It is important that the metal ions come only from the solid solution of the memory cell body. If additional metal ions are supplied from other sources, such as the sidewall edge at the anode interface, the amount of metal ions may not be directly related to the strength of the electric field, and the programming will not respond consistently from cell to cell. The embodiments described herein provide new and novel structures that block interface diffusion paths for metal ions, leaving diffusion from the bulk glass electrolyte as the only supply of metal ions for conductive pathway formation.
    Type: Grant
    Filed: April 10, 2002
    Date of Patent: March 8, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Terry L. Gilton
  • Patent number: 6861367
    Abstract: A semiconductor processing method includes forming an antireflective coating comprising Ge and Se over a substrate to be patterned. Photoresist is formed over the antireflective coating. The photoresist is exposed to actinic radiation effective to pattern the photoresist. The antireflective coating reduces reflection of actinic radiation during the exposing than would otherwise occur under identical conditions in the absence of the antireflective coating. After the exposing, the substrate is patterned through openings in the photoresist and the antireflective coating using the photoresist and the antireflective coating as a mask. In one implementation, after patterning the substrate, the photoresist and the antireflective coating are chemically etched substantially completely from the substrate using a single etching chemistry.
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: March 1, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Terry L. Gilton, Steve W. Bowes, John T. Moore, Joseph F. Brooks, Kristy A. Campbell
  • Patent number: 6861007
    Abstract: Embodiments in accordance with the present invention provide for removing organic materials from substrates, for example substrates employed in the fabrication of integrated circuits, liquid crystal displays and the like. Such embodiments also provide for forming self-limiting oxide layers on oxidizable materials disposed on such substrates where such materials are exposed to the methods of the present invention. The methods of the present invention provide for contacting substrates with a solution of ozone, water and a surfactant, the solution being effective for removing organic materials and forming self-limiting oxide layers on oxidizable materials.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: March 1, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Terry L. Gilton
  • Patent number: 6858482
    Abstract: Programmable conductor memory cells in a stud configuration are fabricated in an integrated circuit by blanket deposition of layers. The layers include a bottom electrode in contact with a conductive region in a semiconductor substrate, a glass electrolyte layer that forms the body of the cell and a top electrode layer. Under the influence of an applied voltage, conductive paths grow through or along the cell body. The layers are patterned and etched to define separate pillars or cells of these stacked materials. A liner layer of an insulating material is deposited over the cells and acts as a barrier to prevent diffusion of the metal in the cell body into other parts of the integrated circuit. Remaining regions between the cells are filled with an insulating layer. At least some of the insulating layer and some of the liner layer are removed to make contact to the top electrode layer of the cell and to the substrate.
    Type: Grant
    Filed: April 10, 2002
    Date of Patent: February 22, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Terry L. Gilton
  • Patent number: 6856002
    Abstract: The present invention provides a design for a PCRAM element which incorporates multiple metal-containing germanium-selenide glass layers of diverse stoichiometries. The present invention also provides a method of fabricating the disclosed PCRAM structure.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: February 15, 2005
    Assignee: Micron Technology, Inc.
    Inventors: John T. Moore, Terry L. Gilton, Kristy A. Campbell
  • Patent number: 6855975
    Abstract: An integrated programmable conductor memory cell and diode device in an integrated circuit comprises a diode and a glass electrolyte element, the glass electrolyte element having metal ions mixed or dissolved therein and being able to selectively form a conductive pathway under the influence of an applied voltage. In one embodiment, both the diode and the memory cell comprise a chalcogenide glass, such as germanium selenide (e.g., Ge2Se8 or Ge25Se75). The first diode element comprises a chalcogenide glass layer having a first conductivity type, the second diode element comprises a chalcogenide glass layer doped with an element such as bismuth and having a second conductivity type opposite to the first conductivity type and the memory cell comprises a chalcogenide glass element with silver ions therein. In another embodiment, the diode comprises silicon and there is a diffusion barrier layer between the diode and the chalcogenide glass memory element.
    Type: Grant
    Filed: April 10, 2002
    Date of Patent: February 15, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Terry L. Gilton
  • Patent number: 6852642
    Abstract: A method for moving resist stripper across the surface of a semiconductor substrate includes applying a wet chemical resist stripper, such as an organic or oxidizing wet chemical resist stripper, to at least a portion of a photomask positioned over the semiconductor substrate. A carrier fluid, such as a gas, is then directed toward the semiconductor substrate so as to move the resist stripper across the substrate. The carrier fluid may be directed toward the substrate as the resist stripper is being applied thereto or following application of the resist stripper. A system for effecting the method is also disclosed.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: February 8, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Terry L. Gilton
  • Patent number: 6847535
    Abstract: A removable memory card and an associated read/write device and its method of operation are disclosed. The memory card may be formed of a sheet of chalcogenide glass material which has memory storage locations therein defined by the locations of conductive read/write elements of the read/write device.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: January 25, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Terry L. Gilton, Trung T. Doan