Patents by Inventor Terry L. Gilton

Terry L. Gilton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6838307
    Abstract: In programmable conductor memory cells, metal ions precipitate out of a glass electrolyte element in response to an applied electric field in one direction only, causing a conductive pathway to grow from cathode to anode. The amount of conductive pathway growth, and therefore the programming, depends, in part, on the availability of metal ions. It is important that the metal ions come only from the solid solution of the memory cell body. If additional metal ions are supplied from other sources, such as the sidewall edge at the anode interface, the amount of metal ions may not be directly related to the strength of the electric field, and the programming will not respond consistently from cell to cell. The embodiments described herein provide new and novel structures that block interface diffusion paths for metal ions, leaving diffusion from the bulk glass electrolyte as the only supply of metal ions for conductive pathway formation.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: January 4, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Terry L. Gilton
  • Patent number: 6831019
    Abstract: In one implementation, a plasma etching method comprises forming a GexSey chalcogenide comprising layer over a substrate. A mask comprising an organic masking material is formed over the GexSey chalcogenide comprising layer. The mask comprises a sidewall. At least prior to plasma etching the GexSey comprising layer, the sidewall of the mask is exposed to a fluorine comprising material. After exposing, the GexSey chalcogenide comprising layer is plasma etched using the mask and a hydrogen containing etching gas. The plasma etching forms a substantially vertical sidewall of the GexSey chalcogenide comprising layer which is aligned with a lateral outermost extent of the sidewall of the mask.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: December 14, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Li Li, Terry L. Gilton, Kei-Yu Ko, John T. Moore, Karen Signorini
  • Publication number: 20040238918
    Abstract: The invention provides a method of forming a resistance variable memory element and the resulting element. The method includes forming an insulating layer having an opening therein; forming a metal containing layer recessed in the opening; forming a resistance variable material in the opening and over the metal containing layer; and processing the resistance variable material and metal containing layer to produce a resistance variable material containing a diffused metal within the opening.
    Type: Application
    Filed: July 9, 2004
    Publication date: December 2, 2004
    Inventors: John T. Moore, Kristy A. Campbell, Terry L. Gilton
  • Publication number: 20040233728
    Abstract: The invention is related to methods and apparatus for providing a two-terminal constant current device, and its operation thereof. The invention provides a constant current device that maintains a constant current over an applied voltage range of at least approximately 700 mV. The invention also provides a method of changing and resetting the constant current value in a constant current device by either applying a positive potential to decrease the constant current value, or by applying a voltage more negative than the existing constant current's voltage upper limit, thereby resetting or increasing its constant current level to its original fabricated value. The invention further provides a method of forming and converting a memory device into a constant current device. The invention also provides a method for using a constant current device as an analog memory device.
    Type: Application
    Filed: June 28, 2004
    Publication date: November 25, 2004
    Inventors: Kristy A. Campbell, Terry L. Gilton, John T. Moore, Joseph F. Brooks
  • Publication number: 20040228164
    Abstract: In programmable conductor memory cells, metal ions precipitate out of a glass electrolyte element in response to an applied electric field in one direction only, causing a conductive pathway to grow from cathode to anode. The amount of conductive pathway growth, and therefore the programming, depends, in part, on the availability of metal ions. It is important that the metal ions come only from the solid solution of the memory cell body. If additional metal ions are supplied from other sources, such as the sidewall edge at the anode interface, the amount of metal ions may not be directly related to the strength of the electric field, and the programming will not respond consistently from cell to cell. The embodiments described herein provide new and novel structures that block interface diffusion paths for metal ions, leaving diffusion from the bulk glass electrolyte as the only supply of metal ions for conductive pathway formation.
    Type: Application
    Filed: February 27, 2004
    Publication date: November 18, 2004
    Inventor: Terry L. Gilton
  • Patent number: 6818481
    Abstract: An exemplary embodiment of the present invention includes a method for forming a programmable cell by forming an opening in a dielectric material to expose a portion of an underlying first conductive electrode, forming a recessed chalcogenide-metal ion material in said opening and forming a second conductive electrode overlying the dielectric material and the chalcogenide-metal ion material. A method for forming the recessed chalcogenide-metal ion material comprises forming a metal material being recessed approximately 10-90%, in the opening in the dielectric material, forming a glass material on the metal material within the opening and diffusing metal ions from the metal material into the glass material by using ultraviolet light or ultraviolet light in combination with a heat treatment, to cause a resultant metal ion concentration in the glass material.
    Type: Grant
    Filed: March 7, 2001
    Date of Patent: November 16, 2004
    Assignee: Micron Technology, Inc.
    Inventors: John T. Moore, Terry L. Gilton
  • Publication number: 20040223357
    Abstract: A programmable multiple data state memory cell including a first electrode layer formed from a first conductive material, a second electrode layer formed from a second conductive material, and a first layer of a metal-doped chalcogenide material disposed between the first and second electrode layers. The first layer providing a medium in which a conductive growth can be formed to electrically couple together the first and second electrode layers. The memory cell further includes a third electrode layer formed from a third conductive material, and a second layer of a metal-doped chalcogenide material disposed between the second and third electrode layers, the second layer providing a medium in which a conductive growth can be formed to electrically couple together the second and third electrode layers.
    Type: Application
    Filed: June 10, 2004
    Publication date: November 11, 2004
    Inventor: Terry L. Gilton
  • Publication number: 20040223390
    Abstract: The present invention is related to methods of fabricating a resistance variable memory element and a device formed therefrom having improved switching characteristics. According to an embodiment of the present invention a resistance variable material memory element is annealed to remove stoichiometric amounts of a component of the resistance variable material. According to another embodiment of the present invention a silver-germanium-selenide glass is annealed for a duration of about 10 minutes in the presence of oxygen to drive off selenium and increase the rigidity of the glass.
    Type: Application
    Filed: June 14, 2004
    Publication date: November 11, 2004
    Inventors: Kristy A. Campbell, John Moore, Terry L. Gilton, Joseph F. Brooks
  • Patent number: 6813178
    Abstract: The invention is related to methods and apparatus for providing a two-terminal constant current device, and its operation thereof. The invention provides a constant current device that maintains a constant current over an applied voltage range of at least approximately 700 mV. The invention also provides a method of changing and resetting the constant current value in a constant current device by either applying a positive potential to decrease the constant current value, or by applying a voltage more negative than the existing constant current's voltage upper limit, thereby resetting or increasing its constant current level to its original fabricated value. The invention further provides a method of forming and converting a memory device into a constant current device. The invention also provides a method for using a constant current device as an analog memory device.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: November 2, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Kristy A. Campbell, Terry L. Gilton, John T. Moore, Joseph F. Brooks
  • Patent number: 6813176
    Abstract: A non-volatile memory device, such as a Programmable Conductor Random Access Memory (PCRAM) device, having an exemplary memory stored state retention characteristic is disclosed. There is provided a method for retaining stored states in a random access memory device generally comprising the steps of programming a memory cell or an array of memory cells by applying a first voltage to the cells and stabilizing the cells by applying a second voltage to the cells, which is less than the first voltage. The second voltage, which acts as a stabilizing voltage, may be a read-out voltage. The second voltage may also be continuously applied to the cells. The second voltage may also be provided as a sweep voltage, a pulse voltage, or a step voltage.
    Type: Grant
    Filed: November 5, 2003
    Date of Patent: November 2, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Terry L. Gilton, Kristy A. Campbell
  • Publication number: 20040211957
    Abstract: A method for controlling silver doping of a chalcogenide glass in a resistance variable memory element is disclosed herein. The method includes forming a silver layer over a chalcogenide glass layer. Processing the silver layer via heat treating, light irradiation, or a combination of both to form a layer comprising silver interstitially formed in a chalcogenide glass layer; silver-selenide formed in a layer comprising silver interstitially formed in a chalcogenide glass layer; or a silver doped chalcogenide glass layer having silver-selenide formed therein.
    Type: Application
    Filed: May 20, 2004
    Publication date: October 28, 2004
    Inventors: John T. Moore, Kristy A. Campbell, Terry L. Gilton
  • Patent number: 6809362
    Abstract: A programmable multiple data state memory cell including a first electrode layer formed from a first conductive material, a second electrode layer formed from a second conductive material, and a first layer of a metal-doped chalcogenide material disposed between the first and second electrode layers. The first layer providing a medium in which a conductive growth can be formed to electrically couple together the first and second electrode layers. The memory cell further includes a third electrode layer formed from a third conductive material, and a second layer of a metal-doped chalcogenide material disposed between the second and third electrode layers, the second layer providing a medium in which a conductive growth can be formed to electrically couple together the second and third electrode layers.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: October 26, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Terry L. Gilton
  • Publication number: 20040203167
    Abstract: Methods for separating one or more constituents from a sample include drawing a sample through a matrix that is part of a column, trench, or channel. The matrix may be formed from hemispherical grain silicon or from pores formed in a semiconductor substrate. The sample may be drawn through the column, trench or channel by application of pressure thereto, by capillary action, electrophoretically, or by any other suitable technique. As the sample is drawn through the channel, a stationary phase within the matrix may cause different constituents of the sample to flow through the column, trench, or channel at different rates from one another. Capture molecules may be applied to the matrix to bind constituents of the sample, or analytes, for prolonged periods of time, facilitating their detection.
    Type: Application
    Filed: May 3, 2004
    Publication date: October 14, 2004
    Inventor: Terry L. Gilton
  • Publication number: 20040203239
    Abstract: A sample separation apparatus including a porous, or rough, capillary column. The porous capillary column includes a matrix which defines pores, and may be formed from a material such as porous silicon. The capillary column is defined in a surface of a substrate, such as a silicon substrate. The sample separation apparatus may include a stationary phase or a capture substrate disposed on the surfaces of the matrices thereof. The sample separation apparatus may also include a detector positioned proximate the capillary column. A variation of the sample separation apparatus includes an electrode proximate each end of the capillary column. The sample separation apparatus may be employed to effect various types of chromatographic separation, electrophoretic separation, and analyte identification.
    Type: Application
    Filed: May 3, 2004
    Publication date: October 14, 2004
    Inventor: Terry L. Gilton
  • Patent number: 6800560
    Abstract: A method for moving resist stripper across the surface of a semiconductor substrate. The method includes applying a wet chemical resist stripper, such as an organic or oxidizing wet chemical resist stripper, to at least a portion of a photomask positioned over the semiconductor substrate. A carrier fluid, such as a gas, is then directed toward the semiconductor substrate so as to move the resist stripper across the substrate. The carrier fluid may be directed toward the substrate as the resist stripper is being applied thereto or following application of the resist stripper. A system for effecting the method is also disclosed.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: October 5, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Terry L. Gilton
  • Publication number: 20040185625
    Abstract: The present invention provides a design for a PCRAM element which incorporates multiple metal-containing germanium-selenide glass layers of diverse stoichiometries. The present invention also provides a method of fabricating the disclosed PCRAM structure.
    Type: Application
    Filed: February 27, 2004
    Publication date: September 23, 2004
    Inventors: John T. Moore, Terry L. Gilton, Kristy A. Campbell
  • Publication number: 20040179390
    Abstract: The invention is related to methods and apparatus for providing a two-terminal constant current device, and its operation thereof. The invention provides a constant current device that maintains a constant current over an applied voltage range of at least approximately 700 mV. The invention also provides a method of changing and resetting the constant current value in a constant current device by either applying a positive potential to decrease the constant current value, or by applying a voltage more negative than the existing constant current's voltage upper limit, thereby resetting or increasing its constant current level to its original fabricated value. The invention further provides a method of forming and converting a memory device into a constant current device. The invention also provides a method for using a constant current device as an analog memory device.
    Type: Application
    Filed: March 12, 2003
    Publication date: September 16, 2004
    Inventors: Kristy A. Campbell, Terry L. Gilton, John T. Moore, Joseph F. Brooks
  • Patent number: 6790783
    Abstract: Methods and apparatus for fabricating and cleaning in-process semi-conductor wafers are provided. An in-process wafer is placed within a closed chamber. A reactant gas is incorporated in a liquid solvent to form a “reactant mixture” that is capable of reacting with photoresist material (or other material) on a wafer surface to facilitate removal of the material from the wafer surface. The reactant mixture is condensed on one or more of the in-process wafer surfaces to form a thin film on the surface(s) of the wafer. The solvent in the reactant mixture acts as a transport medium to place the reactant gas on the wafer surface. The reactant gas is then able to react with the photoresist material (or other material) on the in-process wafer surface to effect removal the material. Following reaction of the reactant gas with the photoresist, the thin film of reactant mixture is removed from the wafer surface by flash heating, rinsing, draining, or other suitable means.
    Type: Grant
    Filed: May 27, 1999
    Date of Patent: September 14, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Terry L. Gilton, Li Li
  • Publication number: 20040175859
    Abstract: A resistance variable memory element with improved data retention and switching characteristics switched between resistance memory states upon the application of write pulses having the same polarity. The resistance variable memory element can be provided having at least one silver-selenide layer in between glass layers, the glass layers are a chalcogenide glass having a GexSe100−x composition.
    Type: Application
    Filed: March 16, 2004
    Publication date: September 9, 2004
    Inventors: Kristy A. Campbell, John T. Moore, Terry L. Gilton
  • Publication number: 20040171208
    Abstract: Programmable conductor memory cells in a stud configuration are fabricated in an integrated circuit by blanket deposition of layers. The layers include a bottom electrode in contact with a conductive region in a semiconductor substrate, a glass electrolyte layer that forms the body of the cell and a top electrode layer. Under the influence of an applied voltage, conductive paths grow through or along the cell body. The layers are patterned and etched to define separate pillars or cells of these stacked materials. A liner layer of an insulating material is deposited over the cells and acts as a barrier to prevent diffusion of the metal in the cell body into other parts of the integrated circuit. Remaining regions between the cells are filled with an insulating layer. At least some of the insulating layer and some of the liner layer are removed to make contact to the top electrode layer of the cell and to the substrate.
    Type: Application
    Filed: March 3, 2004
    Publication date: September 2, 2004
    Inventor: Terry L. Gilton