Abstract: An active matrix substrate includes a first TFT (10), a second TFT (20) disposed per pixel, and a circuit including the first TFT. The first and second TFTs each include a gate electrode (102A, 102B), a gate insulating layer (103), an oxide semiconductor layer (104A, 104B), and source and drain electrodes in contact with an upper surface of the oxide semiconductor layer. The oxide semiconductor layer (104A, 104B) has a stacked structure including a first semiconductor layer (104e, 104c) in contact with the source and drain electrodes and a second semiconductor layer that is disposed on a substrate-side of the first semiconductor layer and that has a smaller energy gap than the first semiconductor layer. The oxide semiconductor layers (104A) and (104B) are different from each other in terms of the composition and/or the number of stacked layers. The first TFT has a larger threshold voltage than the second TFT.

Abstract: The purpose of the present invention is to provide a highly safe and highly effective pharmaceutical composition and the like for the prevention and treatment of respiratory diseases. The present invention provides a pharmaceutical composition with which it is possible to effectively repair damaged lung tissue by including a cell culture supernatant fluid derived from lung tissue. The present invention also provides a method and a kit for using said culture supernatant fluid to induce differentiation into lung surfactant protein positive cells.

Abstract: A semiconductor film 21 is provided so as to overlap with a light-shielding film 11 when viewed in a plan view. A second insulating film 30 has a contact hole CH1 that reaches a source electrode 22 and a drain electrode 23. A gate electrode 41 is provided on the second insulating film 30 so as to overlap with the semiconductor film 21 when viewed in a plan view, and at the same time, so as to overlap with none of the source electrode 22 and the drain electrode 23 when viewed in a plan view. A third insulating film 50 is provided on the second insulating film 30 so as to cover the gate electrode 41, and at the same time, so as to be in contact with the source electrode 22 and the drain electrode 23 through the contact hole CH1.

Abstract: A semiconductor device includes a thin-film transistor (101), a terminal portion (102), an interlevel insulating layer (14) including a first insulating layer (12) which contacts with the surface of a drain electrode (11d), and a first transparent conductive layer (15), a first dielectric layer (17) and a second transparent conductive layer (19a) formed on the interlevel insulating layer (14). The terminal portion (102) includes a lower conductive layer (3t), a second semiconductor layer (7t) arranged on a gate insulating layer (5), and lower and upper transparent connecting layers (15t, 19t). The gate insulating layer (5) and the second semiconductor layer (7t) have a contact hole (CH2), and their side surfaces located on a side of the contact hole (CH2) are aligned with each other. The lower transparent connecting layer (15t) contacts with the lower conductive layer (3t) in the contact hole (CH2).

Abstract: A semiconductor device (100) is provided with a thin film transistor including an oxide semiconductor layer (5), a gate electrode (3), a gate insulating layer (4), and a source electrode (7s) and a drain electrode (7d) that are in contact with the oxide semiconductor layer, at least one electrode of the source electrode (7s), the drain electrode (7d), and the gate electrode (3) has a multilayer structure that includes a first layer (3A, 7A) containing copper and a second layer (3B, 7B) containing titanium or molybdenum, the thickness of the first layer (3A, 7A) is more than the thickness of the second layer (3B, 7B), when the source electrode (7s) or the drain electrode (7d) has the multilayer structure, the second layer is arranged on the oxide semiconductor layer side of the first layer so as to be in contact with the surface of the oxide semiconductor layer (5), when the gate electrode (3) has the multilayer structure, the second layer is arranged on the substrate (1) side of the first layer, and the thick

Abstract: A semiconductor device includes a substrate and a thin film transistor supported by the substrate. The thin film transistor includes a gate electrode, an oxide semiconductor layer, a gate insulating layer provided between the gate electrode and the oxide semiconductor layer, and source and drain electrodes electrically connected to the oxide semiconductor layer. The gate insulating layer includes a first portion which is covered with the oxide semiconductor layer and a second portion which is adjacent to the first portion and which is not covered with any of the oxide semiconductor layer, the source electrode and the drain electrode. The second portion is smaller in thickness than the first portion, and the difference in thickness between the second portion and the first portion is more than 0 nm and not more than 50 nm.

Abstract: A semiconductor device (100) includes: a substrate (10); and a thin film transistor (5) supported on the substrate, the thin film transistor including a gate electrode (12), an oxide semiconductor layer (18), a gate insulating layer (20) provided between the gate electrode and the oxide semiconductor layer, and a source electrode (14) and a drain electrode (16) electrically connected to the oxide semiconductor layer, wherein: the drain electrode is shaped so as to project toward the oxide semiconductor layer; a width W1 and a width W2 satisfy a relationship |W1?W2|?1 ?m, where the width W1 is a width of the oxide semiconductor layer in a channel width direction of the thin film transistor, and the width W2 is a width of the drain electrode in a direction perpendicular to a direction in which the drain electrode projects; and the width W1 and the width W2 are 3 ?m or more and 6 ?m or less.

Abstract: A semiconductor device (100A) includes: a substrate (1); a thin film transistor (101) whose active layer is an oxide semiconductor layer 5; at least one metal wiring layer including copper (7S, 7D); a metal oxide film including copper (8) arranged on an upper surface of the at least one metal wiring layer (7S, 7D); an insulating layer (11) covering at least one metal wiring layer with the metal oxide film (8) interposed therebetween; and a conductive layer (19) in direct contact with a portion of the at least one metal wiring layer, without the metal oxide film (8) interposed therebetween, in an opening formed in the insulating layer (11).

Abstract: A semiconductor device (100A) includes a substrate (101) and a thin film transistor (10) supported by the substrate. The thin film transistor includes a gate electrode (102), an oxide semiconductor layer (104), a gate insulating layer (103), a source electrode (105) and a drain electrode (106). The oxide semiconductor layer includes an upper semiconductor layer (104b) which is in contact with the source electrode and the drain electrode and which has a first energy gap, and a lower semiconductor layer (104a) which is provided under the upper semiconductor layer and which has a second energy gap that is smaller than the first energy gap. The source electrode and the drain electrode include a lower layer electrode (105a, 106a) which is in contact with the oxide semiconductor layer and which does not contain Cu, and a major layer electrode (105b, 106b) which is provided over the lower layer electrode and which contains Cu.

Abstract: A semiconductor device (200A) includes: a thin film transistor (201) including a gate electrode (3), an oxide semiconductor layer (5), a gate insulating layer (4), and a source electrode (7S) and a drain electrode (7D); an interlayer insulating layer (11) arranged so as to cover the thin film transistor (201) and to be in contact with a channel region (5c) of the thin film transistor (201); a transparent conductive layer (19) arranged on interlayer insulating layer (11), wherein: the source and drain electrodes (7) each include copper; a copper alloy oxide film (10) including copper and at least one metal element other than copper is arranged between the source and drain electrodes (7) and the interlayer insulating layer (11); the interlayer insulating layer (11) covers the drain electrode (7D) with the copper alloy oxide film (10) interposed therebetween; and in a contact hole (CH1) formed in the interlayer insulating layer (11), the transparent conductive layer (19) is in direct contact with the drain elect

Abstract: A semiconductor device (100A) includes: a thin film transistor (101) including a gate electrode (3), an oxide semiconductor layer (5), a gate insulating layer (4), and a source electrode (7S) and a drain electrode (7D); an interlayer insulating layer (11) arranged so as to cover the thin film transistor (101) and to be in contact with a channel region (5c) of the thin film transistor (101); and a transparent conductive layer (19) arranged on the interlayer insulating layer (11), wherein: the source electrode (7S) and the drain electrode (7D) each include a copper layer (7a); a copper oxide film (8) is further provided between the source and drain electrodes and the interlayer insulating layer (11); the interlayer insulating layer (11) covers the drain electrode (7D) with the copper oxide film (8) interposed therebetween; and in a contact hole (CH1) formed in the interlayer insulating layer (11), the transparent conductive layer (19) is in direct contact with the copper layer (7a) of the drain electrode (7D) w

Abstract: This semiconductor device (100) includes: a thin-film transistor (101); an interlevel insulating layer (14) including a first insulating layer (12); a first transparent conductive layer (15) formed on the interlevel insulating layer and having a first hole (15p); a dielectric layer (17) covering the side surface of the first transparent conductive layer closer to the first hole; and a second transparent conductive layer (19a) overlapping at least partially with the first transparent conductive layer via the dielectric layer, which has a second hole (17p). The first insulating layer has a third hole (12p). The interlevel insulating layer and dielectric layer have a first contact hole (CH1), the sidewall of which includes the side surfaces of the second and third holes (17p, 12p). At least a part of the side surface of the third hole is aligned with that of the second hole.

Abstract: The semiconductor device of the present invention is provided with: source wiring lines that are formed on a substrate; light-shielding members that are in the same layer as the source wiring lines; a source insulating film that covers the source wiring lines and the like; holes that penetrate the source insulating film; channel region that are formed of an oxide semiconductor film that is formed on the source insulating film so as to overlap the light-shielding members; source electrode portions that are formed of the oxide semiconductor film, the resistance of which has been decreased, and that are connected to the source wiring lines via the holes; drain electrode portions that are formed of the oxide semiconductor film, the resistance of which has been decreased, and that oppose the source electrode portions with the channel region being interposed therebetween; gate insulating films that are formed on the channel region; and gate electrodes that are formed on the gate insulating films so as to overlap th

Abstract: This semiconductor device (100) includes: a thin-film transistor (101); an interlevel insulating layer (14) including a first insulating layer (12); a first transparent conductive layer (15) formed on the interlevel insulating layer and having a first hole (15p); a dielectric layer (17) covering the side surface of the first transparent conductive layer closer to the first hole; and a second transparent conductive layer (19a) overlapping at least partially with the first transparent conductive layer via the dielectric layer, which has a second hole (17p). The first insulating layer has a third hole (12p). The interlevel insulating layer and dielectric layer have a first contact hole (CH1), the sidewall of which includes the side surfaces of the second and third holes (17p, 12p). At least a part of the side surface of the third hole is aligned with that of the second hole.

Abstract: This semiconductor device (100) includes: a thin-film transistor (101); an interlevel insulating layer (14) including a first insulating layer (12); a first transparent conductive layer (15) formed on the interlevel insulating layer and having a first hole (15p); a dielectric layer (17) covering the side surface of the first transparent conductive layer closer to the first hole; and a second transparent conductive layer (19a) overlapping at least partially with the first transparent conductive layer via the dielectric layer, which has a second hole (17p). The first insulating layer has a third hole (12p). The interlevel insulating layer and dielectric layer have a first contact hole (CH1), the sidewall of which includes the side surfaces of the second and third holes (17p, 12p). At least a part of the side surface of the third hole is aligned with that of the second hole.

Abstract: A liquid crystal display device which can suppress generation of a locally luminous part where a dark line disappears. The display device includes: a pair of substrates, a liquid crystal layer sandwiched between the pair of substrates, wherein one of the pair of substrates includes a pair of electrodes in pixel. At least one of the electrodes may include a comb-tooth portion. A first comb-tooth portion of one of the pair of electrodes and a second comb-tooth portion of the other one of the pair of electrodes may be disposed to face each other. The distance between the pair of electrodes in a transverse direction of the comb-tooth portions of the pair of electrodes is at most 10 ?m in example embodiments, and a rotational viscosity of the p-type nematic liquid crystals may be at least 130 mPa·s.

Abstract: A semiconductor device includes a thin-film transistor (101), a terminal portion (102), an interlevel insulating layer (14) including a first insulating layer (12) which contacts with the surface of a drain electrode (11d), and a first transparent conductive layer (15), a first dielectric layer (17) and a second transparent conductive layer (19a) formed on the interlevel insulating layer (14). The terminal portion (102) includes a lower conductive layer (3t), a second semiconductor layer (7t) arranged on a gate insulating layer (5), and lower and upper transparent connecting layers (15t, 19t). The gate insulating layer (5) and the second semiconductor layer (7t) have a contact hole (CH2), and their side surfaces located on a side of the contact hole (CH2) are aligned with each other. The lower transparent connecting layer (15t) contacts with the lower conductive layer (3t) in the contact hole (CH2).

Abstract: This semiconductor device (100A) includes: a thin-film transistor (101); a gate line layer; an interlevel insulating layer (14) including a first insulating layer (12) which contacts at least with the surface of a drain electrode (11d); a first transparent conductive layer (15) on the interlevel insulating layer (14); a drain connected transparent conductive layer (15a) arranged on the interlevel insulating layer (14) and not electrically connected to the first transparent conductive layer (15); a dielectric layer (17) arranged on the first transparent conductive layer (15); and a second transparent conductive layer (19a) which is arranged over the dielectric layer (17) so as to overlap at least partially with the first transparent conductive layer (15) with the dielectric layer (17) interposed between them.

Abstract: A method for producing a semiconductor device according to the present invention includes a step of sputtering a target (100A). The target (100A) includes a plurality of target tiles (11A) located while having a gap therebetween; a backing plate (15A) for supporting the plurality of target tiles (11A); and a bonding member (17A) provided between the backing plate (15A) and the plurality of target tiles (11A). The plurality of target tiles (11A) each contain In, Ga and Zn. When the target (100A) is seen in a direction normal thereto from the side on which the plurality of target tiles (11A) are located, the plurality of target tiles (11A) are each smaller than an insulating substrate (1), and the bonding member (17A) cannot be seen through the gap.

Abstract: A method for producing a semiconductor device according to the present invention includes a step of sputtering a target (100A). The target (100A) includes a plurality of target tiles (11A) located while having a gap therebetween; a backing plate (15A) for supporting the plurality of target tiles (11A); and a bonding member (17A) provided between the backing plate (15A) and the plurality of target tiles (11A). The plurality of target tiles (11A) each contain In, Ga and Zn. When the target (100A) is seen in a direction normal thereto from the side on which the plurality of target tiles (11A) are located, the plurality of target tiles (11A) are each smaller than an insulating substrate (1), and the bonding member (17A) cannot be seen through the gap.