Patents by Inventor Tetsuo Hatakeyama
Tetsuo Hatakeyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10627925Abstract: According to one embodiment, a wearable device includes a display, a detector, and a hardware processor. The display displays a screen keyboard on a screen when an instruction is input. The detector includes a polygonal plate and detects a tracing action of a finger over a side of the polygonal plate. The hardware processor determines whether the screen keyboard is displayed on the screen when the detector detects the tracing action, and executes an action on the screen in accordance with the tracing action detected by the detector when the hardware processor determines that the screen keyboard is displayed.Type: GrantFiled: June 18, 2018Date of Patent: April 21, 2020Assignee: Toshiba Client Solutions CO., LTD.Inventor: Tetsuo Hatakeyama
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Publication number: 20190235651Abstract: According to one embodiment, a wearable device includes a display, a detector, and a hardware processor. The display displays a screen keyboard on a screen when an instruction is input. The detector includes a polygonal plate and detects a tracing action of a finger over a side of the polygonal plate. The hardware processor determines whether the screen keyboard is displayed on the screen when the detector detects the tracing action, and executes an action on the screen in accordance with the tracing action detected by the detector when the hardware processor determines that the screen keyboard is displayed.Type: ApplicationFiled: June 18, 2018Publication date: August 1, 2019Inventor: Tetsuo Hatakeyama
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Publication number: 20160188706Abstract: According to one embodiment, a system includes a first server, a second server, and an electronic device, all being communicably connected to one another.Type: ApplicationFiled: September 18, 2015Publication date: June 30, 2016Inventors: Kohei MOMOSAKI, Tetsuo HATAKEYAMA, Atsushi MATSUNO
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Patent number: 9276067Abstract: An SiC semiconductor device having a p-type 4H—SiC region formed on a part of a surface portion of an SiC substrate, a defect reduction layer formed in a surface portion of the 4H—SiC region, the defect reduction layer having C defect density <1015 cm?3 by introduction of carbon, a thickness of the defect reduction layer being equal to or less than 5 nm from a surface of the SiC substrate, a gate insulating film formed on the defect reduction layer, and a gate electrode formed on the gate insulating film.Type: GrantFiled: March 4, 2013Date of Patent: March 1, 2016Assignee: National Institute of Advanced Industrial Science and TechnologyInventors: Tatsuo Shimizu, Tetsuo Hatakeyama
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Publication number: 20150134820Abstract: According to one embodiment, an information processing apparatus with a multiuser function includes first, second and third controllers. The first controller disconnects a first network when a basic user or an additional user is selected, and disconnects a second network when a specific additional user is selected. The second controller terminates an application program of the specific additional user when the basic user or the additional user is selected, and terminates an application program of the additional user when the specific additional user is selected. The third controller restricts network use by an application program of the basic user when the specific additional user is selected.Type: ApplicationFiled: August 11, 2014Publication date: May 14, 2015Inventor: Tetsuo Hatakeyama
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Publication number: 20150135304Abstract: According to one embodiment, an electronic apparatus is capable of switching a plurality of applications corresponding to a plurality of users in accordance with a selected user. The apparatus includes a communication controller which communicates with an apparatus connected to a network, a first determination controller which determines whether the selected user is a first user, a second determination controller which determines whether a connection is made to a first virtual private network server via the communication controller, and a first controller which controls use of the network by a first application corresponding to the first user and controls use of the network by a second application corresponding to a user in accordance with a determination results of the first and second determination controllers.Type: ApplicationFiled: October 6, 2014Publication date: May 14, 2015Inventor: Tetsuo Hatakeyama
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Publication number: 20140351879Abstract: According to one embodiment, an electronic apparatus includes a multiuser function. The apparatus includes a manager and controller. The manager is configured to provide an environment for restricting a process executable by the apparatus. The controller is configured to detect a request to execute the process, and to transmit contents related to the request to the manager prior to the execution of the process. The manager is configured to transmit a determination result to the controller based on a policy applied to each user and indicative of permission or prohibition of the execution of the process.Type: ApplicationFiled: December 16, 2013Publication date: November 27, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Jun Ohashi, Tetsuo Hatakeyama, Tatsuo Yamaguchi
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Patent number: 8829536Abstract: According to one embodiment, an SiC semiconductor device including a p-type 4H—SiC region formed on at least part of a surface portion of an SiC substrate, a first gate insulating film formed on the 4H—SiC region and formed of a 3C—SiC thin film having p-type dopant introduced therein, a second gate insulating film formed on the first gate insulating film, and a gate electrode formed on the second gate insulating film.Type: GrantFiled: March 12, 2013Date of Patent: September 9, 2014Assignee: National Institute of Advanced Industrial Science and TechnologyInventors: Tatsuo Shimizu, Tetsuo Hatakeyama
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Patent number: 8796694Abstract: A semiconductor device includes a semiconductor substrate made of silicon carbide and having a surface, a normal vector for the surface having an off angle with respect to a <0001> direction or a <000-1> direction, a semiconductor layer of a first conductivity type formed on the semiconductor substrate, a first semiconductor region of a second conductivity type formed in a surface region of the semiconductor layer, a source region of a first conductivity type formed in a surface region of the first semiconductor region, a second semiconductor region of a second conductivity type formed in the surface region of the semiconductor layer, contacting the first semiconductor region, and having a bottom surface lower than a bottom surface of the first semiconductor region, wherein at least one end of the bottom surface of the second semiconductor region is perpendicular to an off angle direction.Type: GrantFiled: March 19, 2009Date of Patent: August 5, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Tetsuo Hatakeyama, Takashi Shinohe
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Publication number: 20140145959Abstract: According to one embodiment, an information processing apparatus includes a main body having a display screen and an extension device. The extension device includes a detector. The detector is configured to detect an operation with an operating part performed on a virtual operating surface and output detection information on the operation. The virtual operating surface is a virtual plane spaced apart from the display screen by a predetermined distance. The main body includes a connection detector, a virtual input module, and an input controller. The virtual input module is configured to receive the detection information from the extension device and determine a position of the operating part on the virtual operating surface based on the detection information. The input controller is configured to perform input processing as a touch operation at the position having been determined.Type: ApplicationFiled: August 26, 2013Publication date: May 29, 2014Applicant: Kabushiki Kaisha ToshibaInventor: Tetsuo Hatakeyama
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Patent number: 8669561Abstract: A semiconductor device includes: a semiconductor substrate; a first conductivity type semiconductor layer that is formed on the substrate and is made of silicon carbide; an active area formed on a surface of the semiconductor layer; a first semiconductor area of a second conductivity type formed on the surface of the semiconductor layer to surround the active area; a second semiconductor area, provided to adjoin an outer side of the first semiconductor area on the surface of the semiconductor layer and surround the first semiconductor area, in which a second conductivity type impurity area having the same impurity concentration and the same depth as those of the first semiconductor area is formed in a mesh shape; a first electrode provided on the active area; and a second electrode provided on the rear surface of the semiconductor substrate.Type: GrantFiled: September 7, 2011Date of Patent: March 11, 2014Assignee: Kabushiki Kaisha ToshibaInventor: Tetsuo Hatakeyama
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Publication number: 20140026198Abstract: According to one embodiment, a control module detects each of a plurality of events. A management module transmits a determination result indicative of one of permission and prohibition of execution of a specific process to the control module when a second event of requesting execution of the specific process is detected before detection of a first event of requesting a connection to a specific external communication device. When the second event is detected after the detection of the first event, the management module transmits the other of permission and prohibition of the execution of the specific process to the control module.Type: ApplicationFiled: August 27, 2013Publication date: January 23, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Hiroshi Isozaki, Jun Kanai, Ryuiti Koike, Tatsuo Yamaguchi, Tetsuo Hatakeyama, Yuki Kanbe, Jun Ohashi, Tatsunori Saito, Satoshi Ozaki
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Patent number: 8629456Abstract: A semiconductor device includes a semiconductor substrate made of silicon carbide and having a surface, a normal vector for the surface having an off angle with respect to a <0001> direction or a <000-1> direction, a semiconductor layer of a first conductivity type formed on the semiconductor substrate, a first semiconductor region of a second conductivity type formed in a surface region of the semiconductor layer, a source region of a first conductivity type formed in a surface region of the first semiconductor region, a second semiconductor region of a second conductivity type formed in the surface region of the semiconductor layer, contacting the first semiconductor region, and having a bottom surface lower than a bottom surface of the first semiconductor region, wherein at least one end of the bottom surface of the second semiconductor region is perpendicular to an off angle direction.Type: GrantFiled: March 19, 2009Date of Patent: January 14, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Tetsuo Hatakeyama, Takashi Shinohe
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Publication number: 20130240906Abstract: According to one embodiment, an SiC semiconductor device including a p-type 4H—SiC region formed on at least part of a surface portion of an SiC substrate, a first gate insulating film formed on the 4H—SiC region and formed of a 3C—SiC thin film having p-type dopant introduced therein, a second gate insulating film formed on the first gate insulating film, and a gate electrode formed on the second gate insulating film.Type: ApplicationFiled: March 12, 2013Publication date: September 19, 2013Applicant: Natl. Inst. of Advanced Indust. Science and Tech.Inventors: Tatsuo SHIMIZU, Tetsuo Hatakeyama
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Publication number: 20130234161Abstract: According to one embodiment, an SiC semiconductor device comprises a p-type 4H—SiC region formed on at least part of a surface portion of an SiC substrate, a defect reduction layer formed on a surface portion of the 4H—SiC region, a gate insulating film formed on the defect reduction layer, and a gate electrode formed on the gate insulating film. The defect reduction layer has the C defect density that is defined as follows and is set to Cdef<1015 cm?3 by introduction of carbon.Type: ApplicationFiled: March 4, 2013Publication date: September 12, 2013Applicant: Nat'I Inst. of Advanced Industrial Sci. and Tech.Inventors: Tatsuo SHIMIZU, Tetsuo HATAKEYAMA
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Patent number: 8362586Abstract: According to one embodiment, a semiconductor device provided with a structure, which prevents withstand voltage deterioration and may be manufactured at a low cost, is provided.Type: GrantFiled: September 7, 2010Date of Patent: January 29, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Tetsuo Hatakeyama
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Publication number: 20120228633Abstract: A semiconductor device includes: a semiconductor substrate; a first conductivity type semiconductor layer that is formed on the substrate and is made of silicon carbide; an active area formed on a surface of the semiconductor layer; a first semiconductor area of a second conductivity type formed on the surface of the semiconductor layer to surround the active area; a second semiconductor area, provided to adjoin an outer side of the first semiconductor area on the surface of the semiconductor layer and surround the first semiconductor area, in which a second conductivity type impurity area having the same impurity concentration and the same depth as those of the first semiconductor area is formed in a mesh shape; a first electrode provided on the active area; and a second electrode provided on the rear surface of the semiconductor substrate.Type: ApplicationFiled: September 7, 2011Publication date: September 13, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Tetsuo HATAKEYAMA
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Publication number: 20110220913Abstract: According to one embodiment, a semiconductor device provided with a structure, which prevents withstand voltage deterioration and may be manufactured at a low cost, is provided.Type: ApplicationFiled: September 7, 2010Publication date: September 15, 2011Applicant: Kabushiki Kaisha ToshibaInventor: Tetsuo HATAKEYAMA
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Patent number: 7777292Abstract: A semiconductor device includes a semiconductor substrate of a first conductivity type having a top surface and a bottom surface, a semiconductor layer of a first conductivity type formed on the top surface of the semiconductor substrate, and having an active region and an edge termination region surrounding the active region, a first semiconductor region of a second conductivity type formed in the edge termination region adjacent to an edge of the active region, a second semiconductor region of a second conductivity type buried in the edge termination region in a sheet shape or a mesh shape substantially in parallel with a surface of the semiconductor layer, a first electrode formed on the active region of the semiconductor layer and a part of the first semiconductor region, and a second electrode formed on the bottom surface of the semiconductor substrate.Type: GrantFiled: June 25, 2007Date of Patent: August 17, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Chiharu Ota, Johji Nishio, Tetsuo Hatakeyama, Takashi Shinohe
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Publication number: 20100078650Abstract: A semiconductor device includes a semiconductor substrate made of silicon carbide and having a surface, a normal vector for the surface having an off angle with respect to a <0001> direction or a <000-1> direction, a semiconductor layer of a first conductivity type formed on the semiconductor substrate, a first semiconductor region of a second conductivity type formed in a surface region of the semiconductor layer, a source region of a first conductivity type formed in a surface region of the first semiconductor region, a second semiconductor region of a second conductivity type formed in the surface region of the semiconductor layer, contacting the first semiconductor region, and having a bottom surface lower than a bottom surface of the first semiconductor region, wherein at least one end of the bottom surface of the second semiconductor region is perpendicular to an off angle direction.Type: ApplicationFiled: March 19, 2009Publication date: April 1, 2010Inventors: Tetsuo Hatakeyama, Takashi Shinohe