Patents by Inventor Tetsuo Hatakeyama

Tetsuo Hatakeyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10627925
    Abstract: According to one embodiment, a wearable device includes a display, a detector, and a hardware processor. The display displays a screen keyboard on a screen when an instruction is input. The detector includes a polygonal plate and detects a tracing action of a finger over a side of the polygonal plate. The hardware processor determines whether the screen keyboard is displayed on the screen when the detector detects the tracing action, and executes an action on the screen in accordance with the tracing action detected by the detector when the hardware processor determines that the screen keyboard is displayed.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: April 21, 2020
    Assignee: Toshiba Client Solutions CO., LTD.
    Inventor: Tetsuo Hatakeyama
  • Publication number: 20190235651
    Abstract: According to one embodiment, a wearable device includes a display, a detector, and a hardware processor. The display displays a screen keyboard on a screen when an instruction is input. The detector includes a polygonal plate and detects a tracing action of a finger over a side of the polygonal plate. The hardware processor determines whether the screen keyboard is displayed on the screen when the detector detects the tracing action, and executes an action on the screen in accordance with the tracing action detected by the detector when the hardware processor determines that the screen keyboard is displayed.
    Type: Application
    Filed: June 18, 2018
    Publication date: August 1, 2019
    Inventor: Tetsuo Hatakeyama
  • Publication number: 20160188706
    Abstract: According to one embodiment, a system includes a first server, a second server, and an electronic device, all being communicably connected to one another.
    Type: Application
    Filed: September 18, 2015
    Publication date: June 30, 2016
    Inventors: Kohei MOMOSAKI, Tetsuo HATAKEYAMA, Atsushi MATSUNO
  • Patent number: 9276067
    Abstract: An SiC semiconductor device having a p-type 4H—SiC region formed on a part of a surface portion of an SiC substrate, a defect reduction layer formed in a surface portion of the 4H—SiC region, the defect reduction layer having C defect density <1015 cm?3 by introduction of carbon, a thickness of the defect reduction layer being equal to or less than 5 nm from a surface of the SiC substrate, a gate insulating film formed on the defect reduction layer, and a gate electrode formed on the gate insulating film.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: March 1, 2016
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Tatsuo Shimizu, Tetsuo Hatakeyama
  • Publication number: 20150134820
    Abstract: According to one embodiment, an information processing apparatus with a multiuser function includes first, second and third controllers. The first controller disconnects a first network when a basic user or an additional user is selected, and disconnects a second network when a specific additional user is selected. The second controller terminates an application program of the specific additional user when the basic user or the additional user is selected, and terminates an application program of the additional user when the specific additional user is selected. The third controller restricts network use by an application program of the basic user when the specific additional user is selected.
    Type: Application
    Filed: August 11, 2014
    Publication date: May 14, 2015
    Inventor: Tetsuo Hatakeyama
  • Publication number: 20150135304
    Abstract: According to one embodiment, an electronic apparatus is capable of switching a plurality of applications corresponding to a plurality of users in accordance with a selected user. The apparatus includes a communication controller which communicates with an apparatus connected to a network, a first determination controller which determines whether the selected user is a first user, a second determination controller which determines whether a connection is made to a first virtual private network server via the communication controller, and a first controller which controls use of the network by a first application corresponding to the first user and controls use of the network by a second application corresponding to a user in accordance with a determination results of the first and second determination controllers.
    Type: Application
    Filed: October 6, 2014
    Publication date: May 14, 2015
    Inventor: Tetsuo Hatakeyama
  • Publication number: 20140351879
    Abstract: According to one embodiment, an electronic apparatus includes a multiuser function. The apparatus includes a manager and controller. The manager is configured to provide an environment for restricting a process executable by the apparatus. The controller is configured to detect a request to execute the process, and to transmit contents related to the request to the manager prior to the execution of the process. The manager is configured to transmit a determination result to the controller based on a policy applied to each user and indicative of permission or prohibition of the execution of the process.
    Type: Application
    Filed: December 16, 2013
    Publication date: November 27, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jun Ohashi, Tetsuo Hatakeyama, Tatsuo Yamaguchi
  • Patent number: 8829536
    Abstract: According to one embodiment, an SiC semiconductor device including a p-type 4H—SiC region formed on at least part of a surface portion of an SiC substrate, a first gate insulating film formed on the 4H—SiC region and formed of a 3C—SiC thin film having p-type dopant introduced therein, a second gate insulating film formed on the first gate insulating film, and a gate electrode formed on the second gate insulating film.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: September 9, 2014
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Tatsuo Shimizu, Tetsuo Hatakeyama
  • Patent number: 8796694
    Abstract: A semiconductor device includes a semiconductor substrate made of silicon carbide and having a surface, a normal vector for the surface having an off angle with respect to a <0001> direction or a <000-1> direction, a semiconductor layer of a first conductivity type formed on the semiconductor substrate, a first semiconductor region of a second conductivity type formed in a surface region of the semiconductor layer, a source region of a first conductivity type formed in a surface region of the first semiconductor region, a second semiconductor region of a second conductivity type formed in the surface region of the semiconductor layer, contacting the first semiconductor region, and having a bottom surface lower than a bottom surface of the first semiconductor region, wherein at least one end of the bottom surface of the second semiconductor region is perpendicular to an off angle direction.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: August 5, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuo Hatakeyama, Takashi Shinohe
  • Publication number: 20140145959
    Abstract: According to one embodiment, an information processing apparatus includes a main body having a display screen and an extension device. The extension device includes a detector. The detector is configured to detect an operation with an operating part performed on a virtual operating surface and output detection information on the operation. The virtual operating surface is a virtual plane spaced apart from the display screen by a predetermined distance. The main body includes a connection detector, a virtual input module, and an input controller. The virtual input module is configured to receive the detection information from the extension device and determine a position of the operating part on the virtual operating surface based on the detection information. The input controller is configured to perform input processing as a touch operation at the position having been determined.
    Type: Application
    Filed: August 26, 2013
    Publication date: May 29, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Tetsuo Hatakeyama
  • Patent number: 8669561
    Abstract: A semiconductor device includes: a semiconductor substrate; a first conductivity type semiconductor layer that is formed on the substrate and is made of silicon carbide; an active area formed on a surface of the semiconductor layer; a first semiconductor area of a second conductivity type formed on the surface of the semiconductor layer to surround the active area; a second semiconductor area, provided to adjoin an outer side of the first semiconductor area on the surface of the semiconductor layer and surround the first semiconductor area, in which a second conductivity type impurity area having the same impurity concentration and the same depth as those of the first semiconductor area is formed in a mesh shape; a first electrode provided on the active area; and a second electrode provided on the rear surface of the semiconductor substrate.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: March 11, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tetsuo Hatakeyama
  • Publication number: 20140026198
    Abstract: According to one embodiment, a control module detects each of a plurality of events. A management module transmits a determination result indicative of one of permission and prohibition of execution of a specific process to the control module when a second event of requesting execution of the specific process is detected before detection of a first event of requesting a connection to a specific external communication device. When the second event is detected after the detection of the first event, the management module transmits the other of permission and prohibition of the execution of the specific process to the control module.
    Type: Application
    Filed: August 27, 2013
    Publication date: January 23, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Isozaki, Jun Kanai, Ryuiti Koike, Tatsuo Yamaguchi, Tetsuo Hatakeyama, Yuki Kanbe, Jun Ohashi, Tatsunori Saito, Satoshi Ozaki
  • Patent number: 8629456
    Abstract: A semiconductor device includes a semiconductor substrate made of silicon carbide and having a surface, a normal vector for the surface having an off angle with respect to a <0001> direction or a <000-1> direction, a semiconductor layer of a first conductivity type formed on the semiconductor substrate, a first semiconductor region of a second conductivity type formed in a surface region of the semiconductor layer, a source region of a first conductivity type formed in a surface region of the first semiconductor region, a second semiconductor region of a second conductivity type formed in the surface region of the semiconductor layer, contacting the first semiconductor region, and having a bottom surface lower than a bottom surface of the first semiconductor region, wherein at least one end of the bottom surface of the second semiconductor region is perpendicular to an off angle direction.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: January 14, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuo Hatakeyama, Takashi Shinohe
  • Publication number: 20130240906
    Abstract: According to one embodiment, an SiC semiconductor device including a p-type 4H—SiC region formed on at least part of a surface portion of an SiC substrate, a first gate insulating film formed on the 4H—SiC region and formed of a 3C—SiC thin film having p-type dopant introduced therein, a second gate insulating film formed on the first gate insulating film, and a gate electrode formed on the second gate insulating film.
    Type: Application
    Filed: March 12, 2013
    Publication date: September 19, 2013
    Applicant: Natl. Inst. of Advanced Indust. Science and Tech.
    Inventors: Tatsuo SHIMIZU, Tetsuo Hatakeyama
  • Publication number: 20130234161
    Abstract: According to one embodiment, an SiC semiconductor device comprises a p-type 4H—SiC region formed on at least part of a surface portion of an SiC substrate, a defect reduction layer formed on a surface portion of the 4H—SiC region, a gate insulating film formed on the defect reduction layer, and a gate electrode formed on the gate insulating film. The defect reduction layer has the C defect density that is defined as follows and is set to Cdef<1015 cm?3 by introduction of carbon.
    Type: Application
    Filed: March 4, 2013
    Publication date: September 12, 2013
    Applicant: Nat'I Inst. of Advanced Industrial Sci. and Tech.
    Inventors: Tatsuo SHIMIZU, Tetsuo HATAKEYAMA
  • Patent number: 8362586
    Abstract: According to one embodiment, a semiconductor device provided with a structure, which prevents withstand voltage deterioration and may be manufactured at a low cost, is provided.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: January 29, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tetsuo Hatakeyama
  • Publication number: 20120228633
    Abstract: A semiconductor device includes: a semiconductor substrate; a first conductivity type semiconductor layer that is formed on the substrate and is made of silicon carbide; an active area formed on a surface of the semiconductor layer; a first semiconductor area of a second conductivity type formed on the surface of the semiconductor layer to surround the active area; a second semiconductor area, provided to adjoin an outer side of the first semiconductor area on the surface of the semiconductor layer and surround the first semiconductor area, in which a second conductivity type impurity area having the same impurity concentration and the same depth as those of the first semiconductor area is formed in a mesh shape; a first electrode provided on the active area; and a second electrode provided on the rear surface of the semiconductor substrate.
    Type: Application
    Filed: September 7, 2011
    Publication date: September 13, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Tetsuo HATAKEYAMA
  • Publication number: 20110220913
    Abstract: According to one embodiment, a semiconductor device provided with a structure, which prevents withstand voltage deterioration and may be manufactured at a low cost, is provided.
    Type: Application
    Filed: September 7, 2010
    Publication date: September 15, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Tetsuo HATAKEYAMA
  • Patent number: 7777292
    Abstract: A semiconductor device includes a semiconductor substrate of a first conductivity type having a top surface and a bottom surface, a semiconductor layer of a first conductivity type formed on the top surface of the semiconductor substrate, and having an active region and an edge termination region surrounding the active region, a first semiconductor region of a second conductivity type formed in the edge termination region adjacent to an edge of the active region, a second semiconductor region of a second conductivity type buried in the edge termination region in a sheet shape or a mesh shape substantially in parallel with a surface of the semiconductor layer, a first electrode formed on the active region of the semiconductor layer and a part of the first semiconductor region, and a second electrode formed on the bottom surface of the semiconductor substrate.
    Type: Grant
    Filed: June 25, 2007
    Date of Patent: August 17, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chiharu Ota, Johji Nishio, Tetsuo Hatakeyama, Takashi Shinohe
  • Publication number: 20100078650
    Abstract: A semiconductor device includes a semiconductor substrate made of silicon carbide and having a surface, a normal vector for the surface having an off angle with respect to a <0001> direction or a <000-1> direction, a semiconductor layer of a first conductivity type formed on the semiconductor substrate, a first semiconductor region of a second conductivity type formed in a surface region of the semiconductor layer, a source region of a first conductivity type formed in a surface region of the first semiconductor region, a second semiconductor region of a second conductivity type formed in the surface region of the semiconductor layer, contacting the first semiconductor region, and having a bottom surface lower than a bottom surface of the first semiconductor region, wherein at least one end of the bottom surface of the second semiconductor region is perpendicular to an off angle direction.
    Type: Application
    Filed: March 19, 2009
    Publication date: April 1, 2010
    Inventors: Tetsuo Hatakeyama, Takashi Shinohe