Abstract: A semiconductor device includes an SiC substrate, a normal direction of the substrate surface being off from a <0001> or <000-1> direction in an off direction, an SiC layer formed on the SiC substrate, a junction forming region formed in a substantially central portion of the SiC layer, a junction termination region formed to surround the junction forming region, and including a semiconductor region of a conductivity type different from the SiC layer formed as a substantially quadrangular doughnut ring, having two edges facing each other, each crossing a projection direction, which is obtained when the off direction is projected on the upper surface of the SiC layer, at a right angle, wherein a width of one of the two edges on an upper stream side of the off direction is L1, that of the other edge on a down stream side is L2, and a relation L1>L2 is satisfied.

Abstract: An I/O controller to which an I/O device is connected includes a DMA controller (DMAC) and an access control unit (ACU). The DMAC executes DMA transfer in accordance with data transfer control information set in a control/status register by a user process. The ACU limits execution of DMA transfer by the DMAC based on access control information set in a control/status register by a privileged process, and disables the DMAC from accessing any memory area other than the memory area that can be accessed by the user process.

Abstract: A high-breakdown-voltage semiconductor device comprises a high-resistance semiconductor layer, trenches formed on the surface thereof in a longitudinal plane shape and in parallel, first regions formed on the semiconductor layer to be sandwiched between adjacent ones of the trenches and having an impurity concentration higher than that of the semiconductor layer, a second region having opposite conductivity to the first regions and continuously disposed in a trench sidewall and bottom portion, a sidewall insulating film disposed on the second region of the trench sidewall, a third region disposed on the second region of the trench bottom portion and having the same conductivity as and the higher impurity concentration than the second region, a fourth region disposed on the back surface of the semiconductor layer, a first electrode formed on each first region, a second electrode connected to the third region, and a third electrode formed on the fourth region.

Abstract: According to one embodiment, an information processing apparatus includes a plurality of data encryption devices obtaining and encrypting contents data, a plurality of data decryption devices provided corresponding to the data encryption devices respectively, each of the data decryption devices obtaining the contents data via a user access bus from corresponding one of the data encryption devices and decrypting the contents data, and a data storage device storing the contents data encrypted by the data decryption devices, in which key data for decrypting the contents data stored in the data storage device is stored in one of the data encryption devices.

Abstract: According to one embodiment, an information processing apparatus comprising: a data acquisition unit that acquires contents data encrypted by a first encryption process; and a data processing unit that acquires and processes the contents data from the data acquisition unit; wherein the data acquisition unit is connectable to an IC card that includes decryption data for decrypting the contents data encrypted by the first encryption process; the data acquisition unit includes a plurality of data processor each decrypting the contents data encrypted by a first encryption process using the decryption data through a communication with the IC card; and an arbitration unit exclusively give one of the plurality of data processor a permission for establishment of the communication with the IC card.

Abstract: According to one embodiment, an input/output processing device includes an input controller configured to sequentially input stream data including a plurality of successive packets each having a fixed length, the input controller inputting the stream data in units of data blocks each having a first length shorter than the fixed length, an output controller configured to sequentially output, to a bus, data blocks each having a second length different from the fixed length, a transfer buffer configured to accumulate data blocks input by the input controller while data blocks are output to the bus by the output controller, and a transfer-buffer input controller configured to eliminate overflow, when the overflow occurs in the transfer buffer, by at least temporarily interrupting a data input operation of the input controller, and to cause the input controller to resume the data input operation with at least one of the packets lost.

Abstract: A semiconductor device includes a semiconductor substrate of a first conductivity type having a top surface and a bottom surface, a semiconductor layer of a first conductivity type formed on the top surface of the semiconductor substrate, and having an active region and an edge termination region surrounding the active region, a first semiconductor region of a second conductivity type formed in the edge termination region adjacent to an edge of the active region, a second semiconductor region of a second conductivity type buried in the edge termination region in a sheet shape or a mesh shape substantially in parallel with a surface of the semiconductor layer, a first electrode formed on the active region of the semiconductor layer and a part of the first semiconductor region, and a second electrode formed on the bottom surface of the semiconductor substrate.

Abstract: A semiconductor device includes a semiconductor substrate of a first conductivity type, a semiconductor region of the first conductivity type formed on a top surface of the semiconductor substrate, a lower electrode formed on a bottom surface of the semiconductor substrate, an upper electrode formed on a top surface of the semiconductor region, a buried semiconductor layer of a second conductivity type formed in the semiconductor region, a first semiconductor layer of the second conductivity type, formed on the top surface of the semiconductor region and connected to the upper electrode, and a second semiconductor layer of the second conductivity type, formed on a side surface of the semiconductor region and connected to the buried semiconductor layer and the first semiconductor layer, the second semiconductor layer having a lower second conductivity type impurity concentration than the buried semiconductor layer.

Abstract: According to one embodiment, an electronic apparatus including a processor including an input terminal to which a debug signal is to be input, a first switch configured to switch between permission and inhibition of passage of the debug signal, a first control unit configured to output a control signal for causing the first switch to perform the switching between the permission and inhibition of passage of the debug signal based on an externally supplied command signal, a second switch configured to convert a control signal outputted from the first control unit for permitting the passage of the debug signal into a control signal for inhibiting the debug signal, and a second control unit configured to output a control signal for causing the second switch to determine whether or not to perform the conversion based on a command signal from the processor.

Abstract: A high-breakdown-voltage semiconductor device comprises a high-resistance semiconductor layer, trenches formed on the surface thereof in a longitudinal plane shape and in parallel, first regions formed on the semiconductor layer to be sandwiched between adjacent ones of the trenches and having an impurity concentration higher than that of the semiconductor layer, a second region having opposite conductivity to the first regions and continuously disposed in a trench sidewall and bottom portion, a sidewall insulating film disposed on the second region of the trench sidewall, a third region disposed on the second region of the trench bottom portion and having the same conductivity as and the higher impurity concentration than the second region, a fourth region disposed on the back surface of the semiconductor layer, a first electrode formed on each first region, a second electrode connected to the third region, and a third electrode formed on the fourth region.

Abstract: A high-breakdown-voltage semiconductor device includes a high-resistance semiconductor layer, first trenches formed on the surface thereof in a longitudinal plane shape and in parallel, a Schottky electrode formed thereon and sandwiched between adjacent first trenches, a first region having an opposite conductivity type to the semiconductor layer continuously disposed in a sidewall and a bottom of each of the first trenches, a sidewall insulating film disposed on the sidewall, a second region of the opposite conductivity type disposed in the bottom of each of the first trenches, a third region disposed on the opposite surface of the semiconductor layer, a control electrode filling each of the first trenches in contact with the second region and connected to the Schottky electrode, a backside electrode formed on the third region, wherein second trenches communicate with the first trenches at both ends of longitudinal sides thereof, and the Schottky electrode is surrounded by the first and second trenches.

Abstract: A high withstand voltage semiconductor device does not show any significant fall of its withstand voltage if the impurity concentration of the RESURF layer of a low impurity concentration semiconductor region thereof varies from the optimal level and/or influenced by the fixed electric charge.

Abstract: A high-breakdown-voltage semiconductor device comprises a high-resistance semiconductor layer, trenches formed on the surface thereof in a longitudinal plane shape and in parallel, first regions formed on the semiconductor layer to be sandwiched between adjacent ones of the trenches and having an impurity concentration higher than that of the semiconductor layer, a second region having opposite conductivity to the first regions and continuously disposed in a trench sidewall and bottom portion, a sidewall insulating film disposed on the second region of the trench sidewall, a third region disposed on the second region of the trench bottom portion and having the same conductivity as and the higher impurity concentration than the second region, a fourth region disposed on the back surface of the semiconductor layer, a first electrode formed on each first region, a second electrode connected to the third region, and a third electrode formed on the fourth region.

Abstract: An I/O controller to which an I/O device is connected includes a DMA controller (DMAC) and an access control unit (ACU). The DMAC executes DMA transfer in accordance with data transfer control information set in a control/status register by a user process. The ACU limits execution of DMA transfer by the DMAC based on access control information set in a control/status register by a privileged process, and disables the DMAC from accessing any memory area other than the memory area that can be accessed by the user process.

Abstract: According to one embodiment of the invention, the second processor working as a sub-processor starts up when power has been turned on, runs the boot program stored in the ROM, and starts the first processor working as a main processor. After having been started, the first processor loads a DRAM with the boot program to be run by the second processor, and restarts the second processor in such a way that the boot program newly loaded into the DRAM is run by the second processor.

Abstract: A semiconductor device includes an SiC substrate, a normal direction of the substrate surface being off from a <0001> or <000-1> direction in an off direction, an SiC layer formed on the SiC substrate, a junction forming region formed in a substantially central portion of the SiC layer, a junction termination region formed to surround the junction forming region, and including a semiconductor region of a conductivity type different from the SiC layer formed as a substantially quadrangular doughnut ring, having two edges facing each other, each crossing a projection direction, which is obtained when the off direction is projected on the upper surface of the SiC layer, at a right angle, wherein a width of one of the two edges on an upper stream side of the off direction is L1, that of the other edge on a down stream side is L2, and a relation L1>L2 is satisfied.

Abstract: A semiconductor device comprises a first-conductivity-type semiconductor substrate, a first-conductivity-type first semiconductor layer formed on the semiconductor substrate, a second semiconductor layer formed on the first semiconductor layer and has a first-conductivity-type impurity concentration higher than that of the first semiconductor layer, a second-conductivity-type first semiconductor region selectively formed on an upper surface of the first semiconductor layer at a boundary with the second semiconductor layer, a source electrode selectively formed on the second semiconductor layer and achieves ohmic contact with the second semiconductor layer and the first semiconductor region, a gate electrode selectively formed on the second semiconductor layer and achieves Schottky contact with the second semiconductor layer, and a drain electrode formed on a lower surface of the semiconductor substrate and achieves ohmic contact with the semiconductor substrate.

Abstract: A high-breakdown-voltage semiconductor device comprises a high-resistance semiconductor layer, trenches formed on the surface thereof in a longitudinal plane shape and in parallel, first regions formed on the semiconductor layer to be sandwiched between adjacent ones of the trenches and having an impurity concentration higher than that of the semiconductor layer, a second region having opposite conductivity to the first regions and continuously disposed in a trench sidewall and bottom portion, a sidewall insulating film disposed on the second region of the trench sidewall, a third region disposed on the second region of the trench bottom portion and having the same conductivity as and the higher impurity concentration than the second region, a fourth region disposed on the back surface of the semiconductor layer, a first electrode formed on each first region, a second electrode connected to the third region, and a third electrode formed on the fourth region.

Abstract: A high-breakdown-voltage semiconductor device comprises a high-resistance semiconductor layer, trenches formed on the surface thereof in a longitudinal plane shape and in parallel, first regions formed on the semiconductor layer to be sandwiched between adjacent ones of the trenches and having an impurity concentration higher than that of the semiconductor layer, a second region having opposite conductivity to the first regions and continuously disposed in a trench sidewall and bottom portion, a sidewall insulating film disposed on the second region of the trench sidewall, a third region disposed on the second region of the trench bottom portion and having the same conductivity as and the higher impurity concentration than the second region, a fourth region disposed on the back surface of the semiconductor layer, a first electrode formed on each first region, a second electrode connected to the third region, and a third electrode formed on the fourth region.

Abstract: A high-breakdown-voltage semiconductor device comprises a high-resistance semiconductor layer, trenches formed on the surface thereof in a longitudinal plane shape and in parallel, first regions formed on the semiconductor layer to be sandwiched between adjacent ones of the trenches and having an impurity concentration higher than that of the semiconductor layer, a second region having opposite conductivity to the first regions and continuously disposed in a trench sidewall and bottom portion, a sidewall insulating film disposed on the second region of the trench sidewall, a third region disposed on the second region of the trench bottom portion and having the same conductivity as and the higher impurity concentration than the second region, a fourth region disposed on the back surface of the semiconductor layer, a first electrode formed on each first region, a second electrode connected to the third region, and a third electrode formed on the fourth region.